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Unified Diff: src/arm/assembler-arm.cc

Issue 11040025: Revert r12646 "Support for SDIV" because of failing V8 benchmark. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 8 years, 2 months ago
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Index: src/arm/assembler-arm.cc
diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc
index 7a65ab25cb745beafe7a371079440b2593a2753b..78db06d2675f0b2231baa4cb96a7c1b7a97bb7f2 100644
--- a/src/arm/assembler-arm.cc
+++ b/src/arm/assembler-arm.cc
@@ -110,10 +110,6 @@ void CpuFeatures::Probe() {
if (FLAG_enable_armv7) {
supported_ |= 1u << ARMv7;
}
-
- if (FLAG_enable_sudiv) {
- supported_ |= 1u << SUDIV;
- }
#else // __arm__
// Probe for additional features not already known to be available.
if (!IsSupported(VFP3) && OS::ArmCpuHasFeature(VFP3)) {
@@ -129,10 +125,6 @@ void CpuFeatures::Probe() {
found_by_runtime_probing_ |= 1u << ARMv7;
}
- if (!IsSupported(SUDIV) && OS::ArmCpuHasFeature(SUDIV)) {
- found_by_runtime_probing_ |= 1u << SUDIV;
- }
-
supported_ |= found_by_runtime_probing_;
#endif
@@ -1215,22 +1207,6 @@ void Assembler::mla(Register dst, Register src1, Register src2, Register srcA,
}
-void Assembler::mls(Register dst, Register src1, Register src2, Register srcA,
- Condition cond) {
- ASSERT(!dst.is(pc) && !src1.is(pc) && !src2.is(pc) && !srcA.is(pc));
- emit(cond | B22 | B21 | dst.code()*B16 | srcA.code()*B12 |
- src2.code()*B8 | B7 | B4 | src1.code());
-}
-
-
-void Assembler::sdiv(Register dst, Register src1, Register src2,
- Condition cond) {
- ASSERT(!dst.is(pc) && !src1.is(pc) && !src2.is(pc));
- emit(cond | B26 | B25| B24 | B20 | dst.code()*B16 | 0xf * B12 |
- src2.code()*B8 | B4 | src1.code());
-}
-
-
void Assembler::mul(Register dst, Register src1, Register src2,
SBit s, Condition cond) {
ASSERT(!dst.is(pc) && !src1.is(pc) && !src2.is(pc));
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