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Unified Diff: src/trusted/validator/x86/decoder/gen/nc_opcode_table_32.h

Issue 10790077: Add tzcnt as an acceptable instruction to x86-64 validator (it already (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/
Patch Set: Created 8 years, 5 months ago
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Index: src/trusted/validator/x86/decoder/gen/nc_opcode_table_32.h
===================================================================
--- src/trusted/validator/x86/decoder/gen/nc_opcode_table_32.h (revision 9237)
+++ src/trusted/validator/x86/decoder/gen/nc_opcode_table_32.h (working copy)
@@ -730,7 +730,7 @@
/* 721 */ { RegAX, NACL_OPFLAG(OpSet), "%ax" },
};
-static const NaClInst g_Opcodes[1366] = {
+static const NaClInst g_Opcodes[1367] = {
/* 0 */
{ NACLi_INVALID,
NACL_EMPTY_IFLAGS,
@@ -3828,2370 +3828,2374 @@
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v),
InstPopcnt, 0x00, 2, 61, NACL_OPCODE_NULL_OFFSET },
/* 774 */
- { NACLi_LZCNT,
+ { NACLi_386,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v),
+ InstTzcnt, 0x00, 2, 61, NACL_OPCODE_NULL_OFFSET },
+ /* 775 */
+ { NACLi_386,
+ NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v),
InstLzcnt, 0x00, 2, 61, NACL_OPCODE_NULL_OFFSET },
- /* 775 */
+ /* 776 */
{ NACLi_SSE,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsRep),
InstCmpss, 0x00, 3, 484, NACL_OPCODE_NULL_OFFSET },
- /* 776 */
+ /* 777 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep),
InstMovq2dq, 0x00, 2, 487, NACL_OPCODE_NULL_OFFSET },
- /* 777 */
+ /* 778 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep),
InstCvtdq2pd, 0x00, 2, 489, NACL_OPCODE_NULL_OFFSET },
- /* 778 */
+ /* 779 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovupd, 0x00, 2, 491, NACL_OPCODE_NULL_OFFSET },
- /* 779 */
+ /* 780 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovupd, 0x00, 2, 493, NACL_OPCODE_NULL_OFFSET },
- /* 780 */
+ /* 781 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovlpd, 0x00, 2, 495, NACL_OPCODE_NULL_OFFSET },
- /* 781 */
+ /* 782 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovlpd, 0x00, 2, 436, NACL_OPCODE_NULL_OFFSET },
- /* 782 */
+ /* 783 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstUnpcklpd, 0x00, 2, 497, NACL_OPCODE_NULL_OFFSET },
- /* 783 */
+ /* 784 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstUnpckhpd, 0x00, 2, 497, NACL_OPCODE_NULL_OFFSET },
- /* 784 */
+ /* 785 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovhpd, 0x00, 2, 495, NACL_OPCODE_NULL_OFFSET },
- /* 785 */
+ /* 786 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovhpd, 0x00, 2, 436, NACL_OPCODE_NULL_OFFSET },
- /* 786 */
+ /* 787 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovapd, 0x00, 2, 491, NACL_OPCODE_NULL_OFFSET },
- /* 787 */
+ /* 788 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovapd, 0x00, 2, 493, NACL_OPCODE_NULL_OFFSET },
- /* 788 */
+ /* 789 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstCvtpi2pd, 0x00, 2, 499, NACL_OPCODE_NULL_OFFSET },
- /* 789 */
+ /* 790 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovntpd, 0x00, 2, 501, NACL_OPCODE_NULL_OFFSET },
- /* 790 */
+ /* 791 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstCvttpd2pi, 0x00, 2, 503, NACL_OPCODE_NULL_OFFSET },
- /* 791 */
+ /* 792 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstCvtpd2pi, 0x00, 2, 503, NACL_OPCODE_NULL_OFFSET },
- /* 792 */
+ /* 793 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstUcomisd, 0x00, 2, 505, NACL_OPCODE_NULL_OFFSET },
- /* 793 */
+ /* 794 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstComisd, 0x00, 2, 507, NACL_OPCODE_NULL_OFFSET },
- /* 794 */
+ /* 795 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovmskpd, 0x00, 2, 509, NACL_OPCODE_NULL_OFFSET },
- /* 795 */
+ /* 796 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstSqrtpd, 0x00, 2, 511, NACL_OPCODE_NULL_OFFSET },
- /* 796 */
+ /* 797 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 797 */
+ /* 798 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstAndpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 798 */
+ /* 799 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstAndnpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 799 */
+ /* 800 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstOrpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 800 */
+ /* 801 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstXorpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 801 */
+ /* 802 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstAddpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 802 */
+ /* 803 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMulpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 803 */
+ /* 804 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstCvtpd2ps, 0x00, 2, 511, NACL_OPCODE_NULL_OFFSET },
- /* 804 */
+ /* 805 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstCvtps2dq, 0x00, 2, 478, NACL_OPCODE_NULL_OFFSET },
- /* 805 */
+ /* 806 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstSubpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 806 */
+ /* 807 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMinpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 807 */
+ /* 808 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstDivpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 808 */
+ /* 809 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMaxpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 809 */
+ /* 810 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPunpcklbw, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET },
- /* 810 */
+ /* 811 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPunpcklwd, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET },
- /* 811 */
+ /* 812 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPunpckldq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET },
- /* 812 */
+ /* 813 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPacksswb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 813 */
+ /* 814 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPcmpgtb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 814 */
+ /* 815 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPcmpgtw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 815 */
+ /* 816 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPcmpgtd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 816 */
+ /* 817 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPackuswb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 817 */
+ /* 818 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPunpckhbw, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET },
- /* 818 */
+ /* 819 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPunpckhwd, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET },
- /* 819 */
+ /* 820 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPunpckhdq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET },
- /* 820 */
+ /* 821 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPackssdw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 821 */
+ /* 822 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPunpcklqdq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET },
- /* 822 */
+ /* 823 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPunpckhqdq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET },
- /* 823 */
+ /* 824 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstMovd, 0x00, 2, 517, NACL_OPCODE_NULL_OFFSET },
- /* 824 */
+ /* 825 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovdqa, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET },
- /* 825 */
+ /* 826 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPshufd, 0x00, 3, 519, NACL_OPCODE_NULL_OFFSET },
- /* 826 */
+ /* 827 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
InstInvalid, 0x07, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 827 */
+ /* 828 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
- InstPsllw, 0x06, 2, 522, 826 },
- /* 828 */
+ InstPsllw, 0x06, 2, 522, 827 },
+ /* 829 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x05, 0, 0, 827 },
- /* 829 */
+ InstInvalid, 0x05, 0, 0, 828 },
+ /* 830 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
- InstPsraw, 0x04, 2, 522, 828 },
- /* 830 */
+ InstPsraw, 0x04, 2, 522, 829 },
+ /* 831 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x03, 0, 0, 829 },
- /* 831 */
+ InstInvalid, 0x03, 0, 0, 830 },
+ /* 832 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
- InstPsrlw, 0x02, 2, 522, 830 },
- /* 832 */
+ InstPsrlw, 0x02, 2, 522, 831 },
+ /* 833 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x01, 0, 0, 831 },
- /* 833 */
+ InstInvalid, 0x01, 0, 0, 832 },
+ /* 834 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x00, 0, 0, 832 },
- /* 834 */
+ InstInvalid, 0x00, 0, 0, 833 },
+ /* 835 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
- InstPslld, 0x06, 2, 522, 826 },
- /* 835 */
+ InstPslld, 0x06, 2, 522, 827 },
+ /* 836 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x05, 0, 0, 834 },
- /* 836 */
+ InstInvalid, 0x05, 0, 0, 835 },
+ /* 837 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
- InstPsrad, 0x04, 2, 522, 835 },
- /* 837 */
+ InstPsrad, 0x04, 2, 522, 836 },
+ /* 838 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x03, 0, 0, 836 },
- /* 838 */
+ InstInvalid, 0x03, 0, 0, 837 },
+ /* 839 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
- InstPsrld, 0x02, 2, 522, 837 },
- /* 839 */
+ InstPsrld, 0x02, 2, 522, 838 },
+ /* 840 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x01, 0, 0, 838 },
- /* 840 */
+ InstInvalid, 0x01, 0, 0, 839 },
+ /* 841 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x00, 0, 0, 839 },
- /* 841 */
+ InstInvalid, 0x00, 0, 0, 840 },
+ /* 842 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPslldq, 0x07, 2, 522, NACL_OPCODE_NULL_OFFSET },
- /* 842 */
+ /* 843 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
- InstPsllq, 0x06, 2, 522, 841 },
- /* 843 */
+ InstPsllq, 0x06, 2, 522, 842 },
+ /* 844 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x05, 0, 0, 842 },
- /* 844 */
+ InstInvalid, 0x05, 0, 0, 843 },
+ /* 845 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x04, 0, 0, 843 },
- /* 845 */
+ InstInvalid, 0x04, 0, 0, 844 },
+ /* 846 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
- InstPsrldq, 0x03, 2, 522, 844 },
- /* 846 */
+ InstPsrldq, 0x03, 2, 522, 845 },
+ /* 847 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
- InstPsrlq, 0x02, 2, 522, 845 },
- /* 847 */
+ InstPsrlq, 0x02, 2, 522, 846 },
+ /* 848 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x01, 0, 0, 846 },
- /* 848 */
+ InstInvalid, 0x01, 0, 0, 847 },
+ /* 849 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstInvalid, 0x00, 0, 0, 847 },
- /* 849 */
+ InstInvalid, 0x00, 0, 0, 848 },
+ /* 850 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPcmpeqb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 850 */
+ /* 851 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPcmpeqw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 851 */
+ /* 852 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPcmpeqd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 852 */
+ /* 853 */
{ NACLi_INVALID,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 853 */
+ /* 854 */
{ NACLi_SSE4A,
NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeHasImmed2_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
- InstExtrq, 0x00, 3, 524, 852 },
- /* 854 */
+ InstExtrq, 0x00, 3, 524, 853 },
+ /* 855 */
{ NACLi_SSE4A,
NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstExtrq, 0x00, 2, 451, NACL_OPCODE_NULL_OFFSET },
- /* 855 */
+ /* 856 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstHaddpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 856 */
+ /* 857 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstHsubpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 857 */
+ /* 858 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstMovd, 0x00, 2, 527, NACL_OPCODE_NULL_OFFSET },
- /* 858 */
+ /* 859 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovdqa, 0x00, 2, 482, NACL_OPCODE_NULL_OFFSET },
- /* 859 */
+ /* 860 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstCmppd, 0x00, 3, 529, NACL_OPCODE_NULL_OFFSET },
- /* 860 */
+ /* 861 */
{ NACLi_SSE,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstPinsrw, 0x00, 3, 532, NACL_OPCODE_NULL_OFFSET },
- /* 861 */
+ /* 862 */
{ NACLi_SSE41,
NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPextrw, 0x00, 3, 535, NACL_OPCODE_NULL_OFFSET },
- /* 862 */
+ /* 863 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstShufpd, 0x00, 3, 529, NACL_OPCODE_NULL_OFFSET },
- /* 863 */
+ /* 864 */
{ NACLi_SSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstAddsubpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET },
- /* 864 */
+ /* 865 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsrlw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 865 */
+ /* 866 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsrld, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 866 */
+ /* 867 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsrlq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 867 */
+ /* 868 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPaddq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 868 */
+ /* 869 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmullw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 869 */
+ /* 870 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovq, 0x00, 2, 538, NACL_OPCODE_NULL_OFFSET },
- /* 870 */
+ /* 871 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovmskb, 0x00, 2, 535, NACL_OPCODE_NULL_OFFSET },
- /* 871 */
+ /* 872 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsubusb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 872 */
+ /* 873 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsubusw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 873 */
+ /* 874 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPminub, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 874 */
+ /* 875 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPand, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 875 */
+ /* 876 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPaddusb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 876 */
+ /* 877 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPaddusw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 877 */
+ /* 878 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmaxub, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 878 */
+ /* 879 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPandn, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 879 */
+ /* 880 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPavgb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 880 */
+ /* 881 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsraw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 881 */
+ /* 882 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsrad, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 882 */
+ /* 883 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPavgw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 883 */
+ /* 884 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmulhuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 884 */
+ /* 885 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmulhw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 885 */
+ /* 886 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstCvttpd2dq, 0x00, 2, 540, NACL_OPCODE_NULL_OFFSET },
- /* 886 */
+ /* 887 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovntdq, 0x00, 2, 542, NACL_OPCODE_NULL_OFFSET },
- /* 887 */
+ /* 888 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsubsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 888 */
+ /* 889 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsubsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 889 */
+ /* 890 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPminsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 890 */
+ /* 891 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPor, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 891 */
+ /* 892 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPaddsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 892 */
+ /* 893 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPaddsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 893 */
+ /* 894 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmaxsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 894 */
+ /* 895 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPxor, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 895 */
+ /* 896 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsllw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 896 */
+ /* 897 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPslld, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 897 */
+ /* 898 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsllq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 898 */
+ /* 899 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmuludq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 899 */
+ /* 900 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmaddwd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 900 */
+ /* 901 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsadbw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 901 */
+ /* 902 */
{ NACLi_SSE2,
NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstMaskmovdqu, 0x00, 3, 544, NACL_OPCODE_NULL_OFFSET },
- /* 902 */
+ /* 903 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsubb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 903 */
+ /* 904 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsubw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 904 */
+ /* 905 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsubd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 905 */
+ /* 906 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsubq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 906 */
+ /* 907 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPaddb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 907 */
+ /* 908 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPaddw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 908 */
+ /* 909 */
{ NACLi_SSE2,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPaddd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 909 */
+ /* 910 */
{ NACLi_E3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPi2fw, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 910 */
+ /* 911 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPi2fd, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 911 */
+ /* 912 */
{ NACLi_E3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPf2iw, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 912 */
+ /* 913 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPf2id, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 913 */
+ /* 914 */
{ NACLi_E3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfnacc, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 914 */
+ /* 915 */
{ NACLi_E3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfpnacc, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 915 */
+ /* 916 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfcmpge, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 916 */
+ /* 917 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfmin, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 917 */
+ /* 918 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfrcp, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 918 */
+ /* 919 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfrsqrt, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 919 */
+ /* 920 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfsub, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 920 */
+ /* 921 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfadd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 921 */
+ /* 922 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfcmpgt, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 922 */
+ /* 923 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfmax, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 923 */
+ /* 924 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfrcpit1, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 924 */
+ /* 925 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfrsqit1, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 925 */
+ /* 926 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfsubr, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 926 */
+ /* 927 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfacc, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 927 */
+ /* 928 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfcmpeq, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 928 */
+ /* 929 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfmul, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 929 */
+ /* 930 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPfrcpit2, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 930 */
+ /* 931 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPmulhrw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 931 */
+ /* 932 */
{ NACLi_E3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPswapd, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 932 */
+ /* 933 */
{ NACLi_3DNOW,
NACL_IFLAG(OpcodeUsesModRm),
InstPavgusb, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 933 */
+ /* 934 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPshufb, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 934 */
+ /* 935 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPhaddw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 935 */
+ /* 936 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPhaddd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 936 */
+ /* 937 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPhaddsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 937 */
+ /* 938 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPmaddubsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 938 */
+ /* 939 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPhsubw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 939 */
+ /* 940 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPhsubd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 940 */
+ /* 941 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPhsubsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 941 */
+ /* 942 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPsignb, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 942 */
+ /* 943 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPsignw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 943 */
+ /* 944 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPsignd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 944 */
+ /* 945 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPmulhrsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET },
- /* 945 */
+ /* 946 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPabsb, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 946 */
+ /* 947 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPabsw, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 947 */
+ /* 948 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm),
InstPabsd, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET },
- /* 948 */
+ /* 949 */
{ NACLi_MOVBE,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v),
InstMovbe, 0x00, 2, 547, NACL_OPCODE_NULL_OFFSET },
- /* 949 */
+ /* 950 */
{ NACLi_MOVBE,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v),
InstMovbe, 0x00, 2, 549, NACL_OPCODE_NULL_OFFSET },
- /* 950 */
+ /* 951 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPshufb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 951 */
+ /* 952 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPhaddw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 952 */
+ /* 953 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPhaddd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 953 */
+ /* 954 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPhaddsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 954 */
+ /* 955 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmaddubsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 955 */
+ /* 956 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPhsubw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 956 */
+ /* 957 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPhsubd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 957 */
+ /* 958 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPhsubsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 958 */
+ /* 959 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsignb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 959 */
+ /* 960 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsignw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 960 */
+ /* 961 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPsignd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 961 */
+ /* 962 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmulhrsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 962 */
+ /* 963 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPblendvb, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET },
- /* 963 */
+ /* 964 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstBlendvps, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET },
- /* 964 */
+ /* 965 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstBlendvpd, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET },
- /* 965 */
+ /* 966 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPtest, 0x00, 2, 554, NACL_OPCODE_NULL_OFFSET },
- /* 966 */
+ /* 967 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPabsb, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET },
- /* 967 */
+ /* 968 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPabsw, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET },
- /* 968 */
+ /* 969 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPabsd, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET },
- /* 969 */
+ /* 970 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovsxbw, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET },
- /* 970 */
+ /* 971 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovsxbd, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET },
- /* 971 */
+ /* 972 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovsxbq, 0x00, 2, 560, NACL_OPCODE_NULL_OFFSET },
- /* 972 */
+ /* 973 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovsxwd, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET },
- /* 973 */
+ /* 974 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovsxwq, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET },
- /* 974 */
+ /* 975 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovsxdq, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET },
- /* 975 */
+ /* 976 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmuldq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 976 */
+ /* 977 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPcmpeqq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 977 */
+ /* 978 */
{ NACLi_SSE41,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMovntdqa, 0x00, 2, 462, NACL_OPCODE_NULL_OFFSET },
- /* 978 */
+ /* 979 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPackusdw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 979 */
+ /* 980 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovzxbw, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET },
- /* 980 */
+ /* 981 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovzxbd, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET },
- /* 981 */
+ /* 982 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovzxbq, 0x00, 2, 560, NACL_OPCODE_NULL_OFFSET },
- /* 982 */
+ /* 983 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovzxwd, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET },
- /* 983 */
+ /* 984 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovzxwq, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET },
- /* 984 */
+ /* 985 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmovzxdq, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET },
- /* 985 */
+ /* 986 */
{ NACLi_SSE42,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPcmpgtq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 986 */
+ /* 987 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPminsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 987 */
+ /* 988 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPminsd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 988 */
+ /* 989 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPminuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 989 */
+ /* 990 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPminud, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 990 */
+ /* 991 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmaxsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 991 */
+ /* 992 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmaxsd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 992 */
+ /* 993 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmaxuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 993 */
+ /* 994 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmaxud, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 994 */
+ /* 995 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPmulld, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 995 */
+ /* 996 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPhminposuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET },
- /* 996 */
+ /* 997 */
{ NACLi_VMX,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
InstInvept, 0x00, 2, 562, NACL_OPCODE_NULL_OFFSET },
- /* 997 */
+ /* 998 */
{ NACLi_VMX,
NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),
InstInvvpid, 0x00, 2, 562, NACL_OPCODE_NULL_OFFSET },
- /* 998 */
+ /* 999 */
{ NACLi_SSE42,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRepne) | NACL_IFLAG(OperandSize_b),
InstCrc32, 0x00, 2, 564, NACL_OPCODE_NULL_OFFSET },
- /* 999 */
+ /* 1000 */
{ NACLi_SSE42,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRepne) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v),
InstCrc32, 0x00, 2, 566, NACL_OPCODE_NULL_OFFSET },
- /* 1000 */
+ /* 1001 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b),
InstPalignr, 0x00, 3, 568, NACL_OPCODE_NULL_OFFSET },
- /* 1001 */
+ /* 1002 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstRoundps, 0x00, 3, 519, NACL_OPCODE_NULL_OFFSET },
- /* 1002 */
+ /* 1003 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstRoundpd, 0x00, 3, 519, NACL_OPCODE_NULL_OFFSET },
- /* 1003 */
+ /* 1004 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstRoundss, 0x00, 3, 571, NACL_OPCODE_NULL_OFFSET },
- /* 1004 */
+ /* 1005 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstRoundsd, 0x00, 3, 574, NACL_OPCODE_NULL_OFFSET },
- /* 1005 */
+ /* 1006 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstBlendps, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET },
- /* 1006 */
+ /* 1007 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstBlendpd, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET },
- /* 1007 */
+ /* 1008 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPblendw, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET },
- /* 1008 */
+ /* 1009 */
{ NACLi_SSSE3,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPalignr, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET },
- /* 1009 */
+ /* 1010 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPextrb, 0x00, 3, 580, NACL_OPCODE_NULL_OFFSET },
- /* 1010 */
+ /* 1011 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPextrw, 0x00, 3, 583, NACL_OPCODE_NULL_OFFSET },
- /* 1011 */
+ /* 1012 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstPextrd, 0x00, 3, 586, NACL_OPCODE_NULL_OFFSET },
- /* 1012 */
+ /* 1013 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstExtractps, 0x00, 3, 589, NACL_OPCODE_NULL_OFFSET },
- /* 1013 */
+ /* 1014 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstPinsrb, 0x00, 3, 592, NACL_OPCODE_NULL_OFFSET },
- /* 1014 */
+ /* 1015 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstInsertps, 0x00, 3, 595, NACL_OPCODE_NULL_OFFSET },
- /* 1015 */
+ /* 1016 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstPinsrd, 0x00, 3, 598, NACL_OPCODE_NULL_OFFSET },
- /* 1016 */
+ /* 1017 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstDpps, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET },
- /* 1017 */
+ /* 1018 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstDppd, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET },
- /* 1018 */
+ /* 1019 */
{ NACLi_SSE41,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstMpsadbw, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET },
- /* 1019 */
+ /* 1020 */
{ NACLi_SSE42,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstPcmpestrm, 0x00, 6, 601, NACL_OPCODE_NULL_OFFSET },
- /* 1020 */
+ /* 1021 */
{ NACLi_SSE42,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstPcmpestri, 0x00, 6, 607, NACL_OPCODE_NULL_OFFSET },
- /* 1021 */
+ /* 1022 */
{ NACLi_SSE42,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),
InstPcmpistrm, 0x00, 4, 613, NACL_OPCODE_NULL_OFFSET },
- /* 1022 */
+ /* 1023 */
{ NACLi_SSE42,
NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),
InstPcmpistri, 0x00, 4, 617, NACL_OPCODE_NULL_OFFSET },
- /* 1023 */
+ /* 1024 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1024 */
+ /* 1025 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1025 */
+ /* 1026 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1026 */
+ /* 1027 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1027 */
+ /* 1028 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1028 */
+ /* 1029 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1029 */
+ /* 1030 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1030 */
+ /* 1031 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1031 */
+ /* 1032 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1032 */
+ /* 1033 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1033 */
+ /* 1034 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1034 */
+ /* 1035 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1035 */
+ /* 1036 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1036 */
+ /* 1037 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1037 */
+ /* 1038 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1038 */
+ /* 1039 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1039 */
+ /* 1040 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcom, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET },
- /* 1040 */
+ /* 1041 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcom, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1041 */
+ /* 1042 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcom, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET },
- /* 1042 */
+ /* 1043 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcom, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET },
- /* 1043 */
+ /* 1044 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcom, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET },
- /* 1044 */
+ /* 1045 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcom, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET },
- /* 1045 */
+ /* 1046 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcom, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET },
- /* 1046 */
+ /* 1047 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcom, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET },
- /* 1047 */
+ /* 1048 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomp, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET },
- /* 1048 */
+ /* 1049 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1049 */
+ /* 1050 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomp, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET },
- /* 1050 */
+ /* 1051 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomp, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET },
- /* 1051 */
+ /* 1052 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomp, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET },
- /* 1052 */
+ /* 1053 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomp, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET },
- /* 1053 */
+ /* 1054 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomp, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET },
- /* 1054 */
+ /* 1055 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomp, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET },
- /* 1055 */
+ /* 1056 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1056 */
+ /* 1057 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1057 */
+ /* 1058 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1058 */
+ /* 1059 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1059 */
+ /* 1060 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1060 */
+ /* 1061 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1061 */
+ /* 1062 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1062 */
+ /* 1063 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1063 */
+ /* 1064 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1064 */
+ /* 1065 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1065 */
+ /* 1066 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1066 */
+ /* 1067 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1067 */
+ /* 1068 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1068 */
+ /* 1069 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1069 */
+ /* 1070 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1070 */
+ /* 1071 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1071 */
+ /* 1072 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1072 */
+ /* 1073 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1073 */
+ /* 1074 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1074 */
+ /* 1075 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1075 */
+ /* 1076 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1076 */
+ /* 1077 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1077 */
+ /* 1078 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1078 */
+ /* 1079 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1079 */
+ /* 1080 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1080 */
+ /* 1081 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1081 */
+ /* 1082 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1082 */
+ /* 1083 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1083 */
+ /* 1084 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1084 */
+ /* 1085 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1085 */
+ /* 1086 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1086 */
+ /* 1087 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1087 */
+ /* 1088 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFld, 0x00, 2, 653, NACL_OPCODE_NULL_OFFSET },
- /* 1088 */
+ /* 1089 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFld, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET },
- /* 1089 */
+ /* 1090 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFld, 0x00, 2, 657, NACL_OPCODE_NULL_OFFSET },
- /* 1090 */
+ /* 1091 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFld, 0x00, 2, 659, NACL_OPCODE_NULL_OFFSET },
- /* 1091 */
+ /* 1092 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFld, 0x00, 2, 661, NACL_OPCODE_NULL_OFFSET },
- /* 1092 */
+ /* 1093 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFld, 0x00, 2, 663, NACL_OPCODE_NULL_OFFSET },
- /* 1093 */
+ /* 1094 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFld, 0x00, 2, 665, NACL_OPCODE_NULL_OFFSET },
- /* 1094 */
+ /* 1095 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFld, 0x00, 2, 667, NACL_OPCODE_NULL_OFFSET },
- /* 1095 */
+ /* 1096 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxch, 0x00, 2, 669, NACL_OPCODE_NULL_OFFSET },
- /* 1096 */
+ /* 1097 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxch, 0x00, 2, 671, NACL_OPCODE_NULL_OFFSET },
- /* 1097 */
+ /* 1098 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxch, 0x00, 2, 673, NACL_OPCODE_NULL_OFFSET },
- /* 1098 */
+ /* 1099 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxch, 0x00, 2, 675, NACL_OPCODE_NULL_OFFSET },
- /* 1099 */
+ /* 1100 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxch, 0x00, 2, 677, NACL_OPCODE_NULL_OFFSET },
- /* 1100 */
+ /* 1101 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxch, 0x00, 2, 679, NACL_OPCODE_NULL_OFFSET },
- /* 1101 */
+ /* 1102 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxch, 0x00, 2, 681, NACL_OPCODE_NULL_OFFSET },
- /* 1102 */
+ /* 1103 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxch, 0x00, 2, 683, NACL_OPCODE_NULL_OFFSET },
- /* 1103 */
+ /* 1104 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFnop, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 1104 */
+ /* 1105 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFchs, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1105 */
+ /* 1106 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFabs, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1106 */
+ /* 1107 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFtst, 0x00, 1, 204, NACL_OPCODE_NULL_OFFSET },
- /* 1107 */
+ /* 1108 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxam, 0x00, 1, 204, NACL_OPCODE_NULL_OFFSET },
- /* 1108 */
+ /* 1109 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFld1, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1109 */
+ /* 1110 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFldl2t, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1110 */
+ /* 1111 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFldl2e, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1111 */
+ /* 1112 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFldpi, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1112 */
+ /* 1113 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFldlg2, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1113 */
+ /* 1114 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFldln2, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1114 */
+ /* 1115 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFldz, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1115 */
+ /* 1116 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstF2xm1, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1116 */
+ /* 1117 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFyl2x, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1117 */
+ /* 1118 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFptan, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET },
- /* 1118 */
+ /* 1119 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFpatan, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1119 */
+ /* 1120 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFxtract, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET },
- /* 1120 */
+ /* 1121 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFprem1, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1121 */
+ /* 1122 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdecstp, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 1122 */
+ /* 1123 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFincstp, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 1123 */
+ /* 1124 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFprem, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1124 */
+ /* 1125 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFyl2xp1, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1125 */
+ /* 1126 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsqrt, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1126 */
+ /* 1127 */
{ NACLi_X87_FSINCOS,
NACL_EMPTY_IFLAGS,
InstFsincos, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET },
- /* 1127 */
+ /* 1128 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFrndint, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1128 */
+ /* 1129 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFscale, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1129 */
+ /* 1130 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsin, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1130 */
+ /* 1131 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcos, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET },
- /* 1131 */
+ /* 1132 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovb, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1132 */
+ /* 1133 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovb, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1133 */
+ /* 1134 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovb, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1134 */
+ /* 1135 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovb, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1135 */
+ /* 1136 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovb, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1136 */
+ /* 1137 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovb, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1137 */
+ /* 1138 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovb, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1138 */
+ /* 1139 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovb, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1139 */
+ /* 1140 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmove, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1140 */
+ /* 1141 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmove, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1141 */
+ /* 1142 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmove, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1142 */
+ /* 1143 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmove, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1143 */
+ /* 1144 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmove, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1144 */
+ /* 1145 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmove, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1145 */
+ /* 1146 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmove, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1146 */
+ /* 1147 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmove, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1147 */
+ /* 1148 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovbe, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1148 */
+ /* 1149 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovbe, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1149 */
+ /* 1150 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovbe, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1150 */
+ /* 1151 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovbe, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1151 */
+ /* 1152 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovbe, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1152 */
+ /* 1153 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovbe, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1153 */
+ /* 1154 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovbe, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1154 */
+ /* 1155 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovbe, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1155 */
+ /* 1156 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovu, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1156 */
+ /* 1157 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovu, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1157 */
+ /* 1158 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovu, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1158 */
+ /* 1159 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovu, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1159 */
+ /* 1160 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovu, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1160 */
+ /* 1161 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovu, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1161 */
+ /* 1162 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovu, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1162 */
+ /* 1163 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovu, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1163 */
+ /* 1164 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucompp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1164 */
+ /* 1165 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnb, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1165 */
+ /* 1166 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnb, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1166 */
+ /* 1167 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnb, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1167 */
+ /* 1168 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnb, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1168 */
+ /* 1169 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnb, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1169 */
+ /* 1170 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnb, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1170 */
+ /* 1171 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnb, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1171 */
+ /* 1172 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnb, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1172 */
+ /* 1173 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovne, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1173 */
+ /* 1174 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovne, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1174 */
+ /* 1175 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovne, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1175 */
+ /* 1176 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovne, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1176 */
+ /* 1177 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovne, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1177 */
+ /* 1178 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovne, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1178 */
+ /* 1179 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovne, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1179 */
+ /* 1180 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovne, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1180 */
+ /* 1181 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnbe, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1181 */
+ /* 1182 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnbe, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1182 */
+ /* 1183 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnbe, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1183 */
+ /* 1184 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnbe, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1184 */
+ /* 1185 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnbe, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1185 */
+ /* 1186 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnbe, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1186 */
+ /* 1187 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnbe, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1187 */
+ /* 1188 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnbe, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1188 */
+ /* 1189 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnu, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1189 */
+ /* 1190 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnu, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET },
- /* 1190 */
+ /* 1191 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnu, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET },
- /* 1191 */
+ /* 1192 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnu, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET },
- /* 1192 */
+ /* 1193 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnu, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET },
- /* 1193 */
+ /* 1194 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnu, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET },
- /* 1194 */
+ /* 1195 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnu, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET },
- /* 1195 */
+ /* 1196 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcmovnu, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET },
- /* 1196 */
+ /* 1197 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFnclex, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 1197 */
+ /* 1198 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFninit, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 1198 */
+ /* 1199 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomi, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET },
- /* 1199 */
+ /* 1200 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomi, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1200 */
+ /* 1201 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomi, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET },
- /* 1201 */
+ /* 1202 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomi, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET },
- /* 1202 */
+ /* 1203 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomi, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET },
- /* 1203 */
+ /* 1204 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomi, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET },
- /* 1204 */
+ /* 1205 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomi, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET },
- /* 1205 */
+ /* 1206 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomi, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET },
- /* 1206 */
+ /* 1207 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomi, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET },
- /* 1207 */
+ /* 1208 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomi, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1208 */
+ /* 1209 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomi, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET },
- /* 1209 */
+ /* 1210 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomi, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET },
- /* 1210 */
+ /* 1211 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomi, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET },
- /* 1211 */
+ /* 1212 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomi, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET },
- /* 1212 */
+ /* 1213 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomi, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET },
- /* 1213 */
+ /* 1214 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomi, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET },
- /* 1214 */
+ /* 1215 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1215 */
+ /* 1216 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1216 */
+ /* 1217 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1217 */
+ /* 1218 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1218 */
+ /* 1219 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1219 */
+ /* 1220 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1220 */
+ /* 1221 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFadd, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1221 */
+ /* 1222 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1222 */
+ /* 1223 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1223 */
+ /* 1224 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1224 */
+ /* 1225 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1225 */
+ /* 1226 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1226 */
+ /* 1227 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1227 */
+ /* 1228 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmul, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1228 */
+ /* 1229 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1229 */
+ /* 1230 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1230 */
+ /* 1231 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1231 */
+ /* 1232 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1232 */
+ /* 1233 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1233 */
+ /* 1234 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1234 */
+ /* 1235 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubr, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1235 */
+ /* 1236 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1236 */
+ /* 1237 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1237 */
+ /* 1238 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1238 */
+ /* 1239 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1239 */
+ /* 1240 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1240 */
+ /* 1241 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1241 */
+ /* 1242 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsub, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1242 */
+ /* 1243 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1243 */
+ /* 1244 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1244 */
+ /* 1245 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1245 */
+ /* 1246 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1246 */
+ /* 1247 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1247 */
+ /* 1248 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1248 */
+ /* 1249 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivr, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1249 */
+ /* 1250 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1250 */
+ /* 1251 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1251 */
+ /* 1252 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1252 */
+ /* 1253 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1253 */
+ /* 1254 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1254 */
+ /* 1255 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1255 */
+ /* 1256 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdiv, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1256 */
+ /* 1257 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFfree, 0x00, 1, 699, NACL_OPCODE_NULL_OFFSET },
- /* 1257 */
+ /* 1258 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFfree, 0x00, 1, 700, NACL_OPCODE_NULL_OFFSET },
- /* 1258 */
+ /* 1259 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFfree, 0x00, 1, 701, NACL_OPCODE_NULL_OFFSET },
- /* 1259 */
+ /* 1260 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFfree, 0x00, 1, 702, NACL_OPCODE_NULL_OFFSET },
- /* 1260 */
+ /* 1261 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFfree, 0x00, 1, 703, NACL_OPCODE_NULL_OFFSET },
- /* 1261 */
+ /* 1262 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFfree, 0x00, 1, 704, NACL_OPCODE_NULL_OFFSET },
- /* 1262 */
+ /* 1263 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFfree, 0x00, 1, 705, NACL_OPCODE_NULL_OFFSET },
- /* 1263 */
+ /* 1264 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFfree, 0x00, 1, 706, NACL_OPCODE_NULL_OFFSET },
- /* 1264 */
+ /* 1265 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFst, 0x00, 2, 653, NACL_OPCODE_NULL_OFFSET },
- /* 1265 */
+ /* 1266 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFst, 0x00, 2, 707, NACL_OPCODE_NULL_OFFSET },
- /* 1266 */
+ /* 1267 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFst, 0x00, 2, 709, NACL_OPCODE_NULL_OFFSET },
- /* 1267 */
+ /* 1268 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFst, 0x00, 2, 711, NACL_OPCODE_NULL_OFFSET },
- /* 1268 */
+ /* 1269 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFst, 0x00, 2, 713, NACL_OPCODE_NULL_OFFSET },
- /* 1269 */
+ /* 1270 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFst, 0x00, 2, 715, NACL_OPCODE_NULL_OFFSET },
- /* 1270 */
+ /* 1271 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFst, 0x00, 2, 717, NACL_OPCODE_NULL_OFFSET },
- /* 1271 */
+ /* 1272 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFst, 0x00, 2, 719, NACL_OPCODE_NULL_OFFSET },
- /* 1272 */
+ /* 1273 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFstp, 0x00, 2, 653, NACL_OPCODE_NULL_OFFSET },
- /* 1273 */
+ /* 1274 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFstp, 0x00, 2, 707, NACL_OPCODE_NULL_OFFSET },
- /* 1274 */
+ /* 1275 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFstp, 0x00, 2, 709, NACL_OPCODE_NULL_OFFSET },
- /* 1275 */
+ /* 1276 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFstp, 0x00, 2, 711, NACL_OPCODE_NULL_OFFSET },
- /* 1276 */
+ /* 1277 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFstp, 0x00, 2, 713, NACL_OPCODE_NULL_OFFSET },
- /* 1277 */
+ /* 1278 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFstp, 0x00, 2, 715, NACL_OPCODE_NULL_OFFSET },
- /* 1278 */
+ /* 1279 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFstp, 0x00, 2, 717, NACL_OPCODE_NULL_OFFSET },
- /* 1279 */
+ /* 1280 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFstp, 0x00, 2, 719, NACL_OPCODE_NULL_OFFSET },
- /* 1280 */
+ /* 1281 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucom, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET },
- /* 1281 */
+ /* 1282 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucom, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1282 */
+ /* 1283 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucom, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET },
- /* 1283 */
+ /* 1284 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucom, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET },
- /* 1284 */
+ /* 1285 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucom, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET },
- /* 1285 */
+ /* 1286 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucom, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET },
- /* 1286 */
+ /* 1287 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucom, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET },
- /* 1287 */
+ /* 1288 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucom, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET },
- /* 1288 */
+ /* 1289 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomp, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET },
- /* 1289 */
+ /* 1290 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1290 */
+ /* 1291 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomp, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET },
- /* 1291 */
+ /* 1292 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomp, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET },
- /* 1292 */
+ /* 1293 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomp, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET },
- /* 1293 */
+ /* 1294 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomp, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET },
- /* 1294 */
+ /* 1295 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomp, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET },
- /* 1295 */
+ /* 1296 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomp, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET },
- /* 1296 */
+ /* 1297 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFaddp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1297 */
+ /* 1298 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFaddp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1298 */
+ /* 1299 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFaddp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1299 */
+ /* 1300 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFaddp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1300 */
+ /* 1301 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFaddp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1301 */
+ /* 1302 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFaddp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1302 */
+ /* 1303 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFaddp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1303 */
+ /* 1304 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFaddp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1304 */
+ /* 1305 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmulp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1305 */
+ /* 1306 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmulp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1306 */
+ /* 1307 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmulp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1307 */
+ /* 1308 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmulp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1308 */
+ /* 1309 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmulp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1309 */
+ /* 1310 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmulp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1310 */
+ /* 1311 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmulp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1311 */
+ /* 1312 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFmulp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1312 */
+ /* 1313 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcompp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1313 */
+ /* 1314 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubrp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1314 */
+ /* 1315 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubrp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1315 */
+ /* 1316 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubrp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1316 */
+ /* 1317 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubrp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1317 */
+ /* 1318 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubrp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1318 */
+ /* 1319 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubrp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1319 */
+ /* 1320 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubrp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1320 */
+ /* 1321 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubrp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1321 */
+ /* 1322 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1322 */
+ /* 1323 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1323 */
+ /* 1324 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1324 */
+ /* 1325 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1325 */
+ /* 1326 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1326 */
+ /* 1327 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1327 */
+ /* 1328 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1328 */
+ /* 1329 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFsubp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1329 */
+ /* 1330 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivrp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1330 */
+ /* 1331 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivrp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1331 */
+ /* 1332 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivrp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1332 */
+ /* 1333 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivrp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1333 */
+ /* 1334 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivrp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1334 */
+ /* 1335 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivrp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1335 */
+ /* 1336 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivrp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1336 */
+ /* 1337 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivrp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1337 */
+ /* 1338 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET },
- /* 1338 */
+ /* 1339 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET },
- /* 1339 */
+ /* 1340 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET },
- /* 1340 */
+ /* 1341 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET },
- /* 1341 */
+ /* 1342 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET },
- /* 1342 */
+ /* 1343 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET },
- /* 1343 */
+ /* 1344 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET },
- /* 1344 */
+ /* 1345 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFdivp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET },
- /* 1345 */
+ /* 1346 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 1346 */
+ /* 1347 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFnstsw, 0x00, 1, 721, NACL_OPCODE_NULL_OFFSET },
- /* 1347 */
+ /* 1348 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomip, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET },
- /* 1348 */
+ /* 1349 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomip, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1349 */
+ /* 1350 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomip, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET },
- /* 1350 */
+ /* 1351 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomip, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET },
- /* 1351 */
+ /* 1352 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomip, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET },
- /* 1352 */
+ /* 1353 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomip, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET },
- /* 1353 */
+ /* 1354 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomip, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET },
- /* 1354 */
+ /* 1355 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFucomip, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET },
- /* 1355 */
+ /* 1356 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomip, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET },
- /* 1356 */
+ /* 1357 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomip, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET },
- /* 1357 */
+ /* 1358 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomip, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET },
- /* 1358 */
+ /* 1359 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomip, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET },
- /* 1359 */
+ /* 1360 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomip, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET },
- /* 1360 */
+ /* 1361 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomip, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET },
- /* 1361 */
+ /* 1362 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomip, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET },
- /* 1362 */
+ /* 1363 */
{ NACLi_X87,
NACL_EMPTY_IFLAGS,
InstFcomip, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET },
- /* 1363 */
+ /* 1364 */
{ NACLi_386,
NACL_EMPTY_IFLAGS,
InstUd2, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 1364 */
+ /* 1365 */
{ NACLi_386,
NACL_EMPTY_IFLAGS,
InstNop, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
- /* 1365 */
+ /* 1366 */
{ NACLi_386,
NACL_EMPTY_IFLAGS,
InstPause, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },
@@ -6290,40 +6294,40 @@
/* 890 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 900 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 910 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 920 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 773, 752, 752, 752, 752, 774, 752, 752,
- /* 930 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 775, 752, 752, 752, 752, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 920 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 773, 752, 752, 752, 774, 775, 752, 752,
+ /* 930 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 776, 752, 752, 752, 752, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 940 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 752, 752, 752, 752,
- /* 950 */ 752, 752, 776, 752, 752, 752, 752, 752, 752, 752,
- /* 960 */ 752, 752, 752, 752, 752, 752, 752, 752, 777, 752,
+ /* 950 */ 752, 752, 777, 752, 752, 752, 752, 752, 752, 752,
+ /* 960 */ 752, 752, 752, 752, 752, 752, 752, 752, 778, 752,
/* 970 */ 752, 752, 752, 752, 752, 752, 752, 752, 752, 752,
/* 980 */ 752, 752, 752, 752, 752, 752, 752, 752, 752, 752,
- /* 990 */ 752, 752, 752, 752, NACL_OPCODE_NULL_OFFSET, 778, 779, 780, 781, 782,
- /* 1000 */ 783, 784, 785, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 786,
- /* 1020 */ 787, 788, 789, 790, 791, 792, 793, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 990 */ 752, 752, 752, 752, NACL_OPCODE_NULL_OFFSET, 779, 780, 781, 782, 783,
+ /* 1000 */ 784, 785, 786, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 787,
+ /* 1020 */ 788, 789, 790, 791, 792, 793, 794, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1030 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1040 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1050 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 794,
- /* 1060 */ 795, 796, 796, 797, 798, 799, 800, 801, 802, 803,
- /* 1070 */ 804, 805, 806, 807, 808, 809, 810, 811, 812, 813,
- /* 1080 */ 814, 815, 816, 817, 818, 819, 820, 821, 822, 823,
- /* 1090 */ 824, 825, 833, 840, 848, 849, 850, 851, 796, 853,
- /* 1100 */ 854, 796, 796, 855, 856, 857, 858, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1050 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 795,
+ /* 1060 */ 796, 797, 797, 798, 799, 800, 801, 802, 803, 804,
+ /* 1070 */ 805, 806, 807, 808, 809, 810, 811, 812, 813, 814,
+ /* 1080 */ 815, 816, 817, 818, 819, 820, 821, 822, 823, 824,
+ /* 1090 */ 825, 826, 834, 841, 849, 850, 851, 852, 797, 854,
+ /* 1100 */ 855, 797, 797, 856, 857, 858, 859, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1110 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1120 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1130 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1140 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1150 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 796, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1150 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 797, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1160 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1170 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 859, 796, 860, 861, 862, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1180 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 863, 864, 865,
- /* 1190 */ 866, 867, 868, 869, 870, 871, 872, 873, 874, 875,
- /* 1200 */ 876, 877, 878, 879, 880, 881, 882, 883, 884, 885,
- /* 1210 */ 886, 887, 888, 889, 890, 891, 892, 893, 894, 796,
- /* 1220 */ 895, 896, 897, 898, 899, 900, 901, 902, 903, 904,
- /* 1230 */ 905, 906, 907, 908, 796, NACL_OPCODE_NULL_OFFSET, 909, 910, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1170 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 860, 797, 861, 862, 863, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1180 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 864, 865, 866,
+ /* 1190 */ 867, 868, 869, 870, 871, 872, 873, 874, 875, 876,
+ /* 1200 */ 877, 878, 879, 880, 881, 882, 883, 884, 885, 886,
+ /* 1210 */ 887, 888, 889, 890, 891, 892, 893, 894, 895, 797,
+ /* 1220 */ 896, 897, 898, 899, 900, 901, 902, 903, 904, 905,
+ /* 1230 */ 906, 907, 908, 909, 797, NACL_OPCODE_NULL_OFFSET, 910, 911, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1240 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1250 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 911, 912, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1250 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 912, 913, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1260 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1270 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1280 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
@@ -6334,15 +6338,15 @@
/* 1330 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1340 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1350 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1360 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 913, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 914, NACL_OPCODE_NULL_OFFSET, 915, NACL_OPCODE_NULL_OFFSET,
- /* 1370 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 916, NACL_OPCODE_NULL_OFFSET, 917, 918, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 919, NACL_OPCODE_NULL_OFFSET,
- /* 1380 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 920, NACL_OPCODE_NULL_OFFSET, 921, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 922, NACL_OPCODE_NULL_OFFSET,
- /* 1390 */ 923, 924, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 925, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 926, NACL_OPCODE_NULL_OFFSET,
- /* 1400 */ 927, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 928, NACL_OPCODE_NULL_OFFSET, 929, 930, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1410 */ NACL_OPCODE_NULL_OFFSET, 931, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 932, NACL_OPCODE_NULL_OFFSET, 933, 934, 935,
- /* 1420 */ 936, 937, 938, 939, 940, 941, 942, 943, 944, 16,
+ /* 1360 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 914, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 915, NACL_OPCODE_NULL_OFFSET, 916, NACL_OPCODE_NULL_OFFSET,
+ /* 1370 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 917, NACL_OPCODE_NULL_OFFSET, 918, 919, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 920, NACL_OPCODE_NULL_OFFSET,
+ /* 1380 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 921, NACL_OPCODE_NULL_OFFSET, 922, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 923, NACL_OPCODE_NULL_OFFSET,
+ /* 1390 */ 924, 925, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 926, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 927, NACL_OPCODE_NULL_OFFSET,
+ /* 1400 */ 928, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 929, NACL_OPCODE_NULL_OFFSET, 930, 931, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1410 */ NACL_OPCODE_NULL_OFFSET, 932, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 933, NACL_OPCODE_NULL_OFFSET, 934, 935, 936,
+ /* 1420 */ 937, 938, 939, 940, 941, 942, 943, 944, 945, 16,
/* 1430 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
- /* 1440 */ 16, 16, 16, 16, 16, 945, 946, 947, 16, 16,
+ /* 1440 */ 16, 16, 16, 16, 16, 946, 947, 948, 16, 16,
/* 1450 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
/* 1460 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
/* 1470 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
@@ -6363,95 +6367,95 @@
/* 1620 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
/* 1630 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
/* 1640 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
- /* 1650 */ 16, 16, 16, 16, 16, 16, 16, 948, 949, 16,
+ /* 1650 */ 16, 16, 16, 16, 16, 16, 16, 949, 950, 16,
/* 1660 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
- /* 1670 */ 16, 16, 16, 950, 951, 952, 953, 954, 955, 956,
- /* 1680 */ 957, 958, 959, 960, 961, 796, 796, 796, 796, 962,
- /* 1690 */ 796, 796, 796, 963, 964, 796, 965, 796, 796, 796,
- /* 1700 */ 796, 966, 967, 968, 796, 969, 970, 971, 972, 973,
- /* 1710 */ 974, 796, 796, 975, 976, 977, 978, 796, 796, 796,
- /* 1720 */ 796, 979, 980, 981, 982, 983, 984, 796, 985, 986,
- /* 1730 */ 987, 988, 989, 990, 991, 992, 993, 994, 995, 796,
- /* 1740 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1750 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1760 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1770 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1780 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1790 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1800 */ 796, 996, 997, 796, 796, 796, 796, 796, 796, 796,
- /* 1810 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1820 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1830 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1840 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1850 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1860 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1870 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1880 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1890 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1900 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796,
- /* 1910 */ 796, 796, 796, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 796, 796, 796, 796, 796,
- /* 1920 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, NACL_OPCODE_NULL_OFFSET,
- /* 1930 */ 998, 999, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1000, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1001, 1002, 1003,
- /* 1940 */ 1004, 1005, 1006, 1007, 1008, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1009,
- /* 1950 */ 1010, 1011, 1012, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1960 */ NACL_OPCODE_NULL_OFFSET, 1013, 1014, 1015, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1670 */ 16, 16, 16, 951, 952, 953, 954, 955, 956, 957,
+ /* 1680 */ 958, 959, 960, 961, 962, 797, 797, 797, 797, 963,
+ /* 1690 */ 797, 797, 797, 964, 965, 797, 966, 797, 797, 797,
+ /* 1700 */ 797, 967, 968, 969, 797, 970, 971, 972, 973, 974,
+ /* 1710 */ 975, 797, 797, 976, 977, 978, 979, 797, 797, 797,
+ /* 1720 */ 797, 980, 981, 982, 983, 984, 985, 797, 986, 987,
+ /* 1730 */ 988, 989, 990, 991, 992, 993, 994, 995, 996, 797,
+ /* 1740 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1750 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1760 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1770 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1780 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1790 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1800 */ 797, 997, 998, 797, 797, 797, 797, 797, 797, 797,
+ /* 1810 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1820 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1830 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1840 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1850 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1860 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1870 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1880 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1890 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1900 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797,
+ /* 1910 */ 797, 797, 797, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 797, 797, 797, 797, 797,
+ /* 1920 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, NACL_OPCODE_NULL_OFFSET,
+ /* 1930 */ 999, 1000, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1001, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1002, 1003, 1004,
+ /* 1940 */ 1005, 1006, 1007, 1008, 1009, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1010,
+ /* 1950 */ 1011, 1012, 1013, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1960 */ NACL_OPCODE_NULL_OFFSET, 1014, 1015, 1016, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1970 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 1980 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 1990 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1016, 1017, 1018, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
+ /* 1990 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1017, 1018, 1019, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 2000 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
/* 2010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,
- /* 2020 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1019, 1020, 1021, 1022, NACL_OPCODE_NULL_OFFSET,
- /* 2030 */ NACL_OPCODE_NULL_OFFSET, 1023, 1024, 1025, 1026, 1027, 1028, 1029, 1030, 1031,
- /* 2040 */ 1032, 1033, 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041,
- /* 2050 */ 1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049, 1050, 1051,
- /* 2060 */ 1052, 1053, 1054, 1055, 1056, 1057, 1058, 1059, 1060, 1061,
- /* 2070 */ 1062, 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071,
- /* 2080 */ 1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081,
- /* 2090 */ 1082, 1083, 1084, 1085, 1086, NACL_OPCODE_NULL_OFFSET, 1087, 1088, 1089, 1090,
- /* 2100 */ 1091, 1092, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100,
- /* 2110 */ 1101, 1102, 1103, 16, 16, 16, 16, 16, 16, 16,
- /* 2120 */ 16, 16, 16, 16, 16, 16, 16, 16, 1104, 1105,
- /* 2130 */ 16, 16, 1106, 1107, 16, 16, 1108, 1109, 1110, 1111,
- /* 2140 */ 1112, 1113, 1114, 16, 1115, 1116, 1117, 1118, 1119, 1120,
- /* 2150 */ 1121, 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129, 1130,
- /* 2160 */ NACL_OPCODE_NULL_OFFSET, 1131, 1132, 1133, 1134, 1135, 1136, 1137, 1138, 1139,
- /* 2170 */ 1140, 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149,
- /* 2180 */ 1150, 1151, 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159,
- /* 2190 */ 1160, 1161, 1162, 16, 16, 16, 16, 16, 16, 16,
- /* 2200 */ 16, 16, 1163, 16, 16, 16, 16, 16, 16, 16,
+ /* 2020 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1020, 1021, 1022, 1023, NACL_OPCODE_NULL_OFFSET,
+ /* 2030 */ NACL_OPCODE_NULL_OFFSET, 1024, 1025, 1026, 1027, 1028, 1029, 1030, 1031, 1032,
+ /* 2040 */ 1033, 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041, 1042,
+ /* 2050 */ 1043, 1044, 1045, 1046, 1047, 1048, 1049, 1050, 1051, 1052,
+ /* 2060 */ 1053, 1054, 1055, 1056, 1057, 1058, 1059, 1060, 1061, 1062,
+ /* 2070 */ 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071, 1072,
+ /* 2080 */ 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081, 1082,
+ /* 2090 */ 1083, 1084, 1085, 1086, 1087, NACL_OPCODE_NULL_OFFSET, 1088, 1089, 1090, 1091,
+ /* 2100 */ 1092, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101,
+ /* 2110 */ 1102, 1103, 1104, 16, 16, 16, 16, 16, 16, 16,
+ /* 2120 */ 16, 16, 16, 16, 16, 16, 16, 16, 1105, 1106,
+ /* 2130 */ 16, 16, 1107, 1108, 16, 16, 1109, 1110, 1111, 1112,
+ /* 2140 */ 1113, 1114, 1115, 16, 1116, 1117, 1118, 1119, 1120, 1121,
+ /* 2150 */ 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129, 1130, 1131,
+ /* 2160 */ NACL_OPCODE_NULL_OFFSET, 1132, 1133, 1134, 1135, 1136, 1137, 1138, 1139, 1140,
+ /* 2170 */ 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149, 1150,
+ /* 2180 */ 1151, 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160,
+ /* 2190 */ 1161, 1162, 1163, 16, 16, 16, 16, 16, 16, 16,
+ /* 2200 */ 16, 16, 1164, 16, 16, 16, 16, 16, 16, 16,
/* 2210 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
- /* 2220 */ 16, 16, 16, 16, 16, NACL_OPCODE_NULL_OFFSET, 1164, 1165, 1166, 1167,
- /* 2230 */ 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177,
- /* 2240 */ 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187,
- /* 2250 */ 1188, 1189, 1190, 1191, 1192, 1193, 1194, 1195, 16, 16,
- /* 2260 */ 1196, 1197, 16, 16, 16, 16, 1198, 1199, 1200, 1201,
- /* 2270 */ 1202, 1203, 1204, 1205, 1206, 1207, 1208, 1209, 1210, 1211,
- /* 2280 */ 1212, 1213, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1023, 1214, 1215, 1216, 1217, 1218,
- /* 2290 */ 1219, 1220, 1031, 1221, 1222, 1223, 1224, 1225, 1226, 1227,
+ /* 2220 */ 16, 16, 16, 16, 16, NACL_OPCODE_NULL_OFFSET, 1165, 1166, 1167, 1168,
+ /* 2230 */ 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178,
+ /* 2240 */ 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187, 1188,
+ /* 2250 */ 1189, 1190, 1191, 1192, 1193, 1194, 1195, 1196, 16, 16,
+ /* 2260 */ 1197, 1198, 16, 16, 16, 16, 1199, 1200, 1201, 1202,
+ /* 2270 */ 1203, 1204, 1205, 1206, 1207, 1208, 1209, 1210, 1211, 1212,
+ /* 2280 */ 1213, 1214, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1024, 1215, 1216, 1217, 1218, 1219,
+ /* 2290 */ 1220, 1221, 1032, 1222, 1223, 1224, 1225, 1226, 1227, 1228,
/* 2300 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
- /* 2310 */ 16, 16, 16, 16, 16, 16, 1063, 1228, 1229, 1230,
- /* 2320 */ 1231, 1232, 1233, 1234, 1055, 1235, 1236, 1237, 1238, 1239,
- /* 2330 */ 1240, 1241, 1079, 1242, 1243, 1244, 1245, 1246, 1247, 1248,
- /* 2340 */ 1071, 1249, 1250, 1251, 1252, 1253, 1254, 1255, NACL_OPCODE_NULL_OFFSET, 1256,
- /* 2350 */ 1257, 1258, 1259, 1260, 1261, 1262, 1263, 16, 16, 16,
- /* 2360 */ 16, 16, 16, 16, 16, 1264, 1265, 1266, 1267, 1268,
- /* 2370 */ 1269, 1270, 1271, 1272, 1273, 1274, 1275, 1276, 1277, 1278,
- /* 2380 */ 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288,
- /* 2390 */ 1289, 1290, 1291, 1292, 1293, 1294, 1295, 16, 16, 16,
+ /* 2310 */ 16, 16, 16, 16, 16, 16, 1064, 1229, 1230, 1231,
+ /* 2320 */ 1232, 1233, 1234, 1235, 1056, 1236, 1237, 1238, 1239, 1240,
+ /* 2330 */ 1241, 1242, 1080, 1243, 1244, 1245, 1246, 1247, 1248, 1249,
+ /* 2340 */ 1072, 1250, 1251, 1252, 1253, 1254, 1255, 1256, NACL_OPCODE_NULL_OFFSET, 1257,
+ /* 2350 */ 1258, 1259, 1260, 1261, 1262, 1263, 1264, 16, 16, 16,
+ /* 2360 */ 16, 16, 16, 16, 16, 1265, 1266, 1267, 1268, 1269,
+ /* 2370 */ 1270, 1271, 1272, 1273, 1274, 1275, 1276, 1277, 1278, 1279,
+ /* 2380 */ 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289,
+ /* 2390 */ 1290, 1291, 1292, 1293, 1294, 1295, 1296, 16, 16, 16,
/* 2400 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
- /* 2410 */ 16, 16, 16, NACL_OPCODE_NULL_OFFSET, 1296, 1297, 1298, 1299, 1300, 1301,
- /* 2420 */ 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311,
- /* 2430 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 1312,
- /* 2440 */ 16, 16, 16, 16, 16, 16, 1313, 1314, 1315, 1316,
- /* 2450 */ 1317, 1318, 1319, 1320, 1321, 1322, 1323, 1324, 1325, 1326,
- /* 2460 */ 1327, 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336,
- /* 2470 */ 1337, 1338, 1339, 1340, 1341, 1342, 1343, 1344, NACL_OPCODE_NULL_OFFSET, 1345,
- /* 2480 */ 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345,
- /* 2490 */ 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345,
- /* 2500 */ 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345,
- /* 2510 */ 1345, 1346, 16, 16, 16, 16, 16, 16, 16, 1347,
- /* 2520 */ 1348, 1349, 1350, 1351, 1352, 1353, 1354, 1355, 1356, 1357,
- /* 2530 */ 1358, 1359, 1360, 1361, 1362, 16, 16, 16, 16, 16,
+ /* 2410 */ 16, 16, 16, NACL_OPCODE_NULL_OFFSET, 1297, 1298, 1299, 1300, 1301, 1302,
+ /* 2420 */ 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311, 1312,
+ /* 2430 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 1313,
+ /* 2440 */ 16, 16, 16, 16, 16, 16, 1314, 1315, 1316, 1317,
+ /* 2450 */ 1318, 1319, 1320, 1321, 1322, 1323, 1324, 1325, 1326, 1327,
+ /* 2460 */ 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337,
+ /* 2470 */ 1338, 1339, 1340, 1341, 1342, 1343, 1344, 1345, NACL_OPCODE_NULL_OFFSET, 1346,
+ /* 2480 */ 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346,
+ /* 2490 */ 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346,
+ /* 2500 */ 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346,
+ /* 2510 */ 1346, 1347, 16, 16, 16, 16, 16, 16, 16, 1348,
+ /* 2520 */ 1349, 1350, 1351, 1352, 1353, 1354, 1355, 1356, 1357, 1358,
+ /* 2530 */ 1359, 1360, 1361, 1362, 1363, 16, 16, 16, 16, 16,
/* 2540 */ 16, 16, 16, };
static const NaClPrefixOpcodeSelector g_PrefixOpcode[NaClInstPrefixEnumSize] = {
@@ -6520,7 +6524,7 @@
},
/* 1 */
{ 0x0b,
- 1363,
+ 1364,
NULL,
g_OpcodeSeq + 2,
},
@@ -6532,7 +6536,7 @@
},
/* 3 */
{ 0x00,
- 1364,
+ 1365,
NULL,
g_OpcodeSeq + 4,
},
@@ -6544,7 +6548,7 @@
},
/* 5 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6562,7 +6566,7 @@
},
/* 8 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6592,7 +6596,7 @@
},
/* 13 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6628,7 +6632,7 @@
},
/* 19 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6664,7 +6668,7 @@
},
/* 25 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6700,7 +6704,7 @@
},
/* 31 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6754,7 +6758,7 @@
},
/* 40 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6814,7 +6818,7 @@
},
/* 50 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6874,7 +6878,7 @@
},
/* 60 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6934,7 +6938,7 @@
},
/* 70 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -6994,7 +6998,7 @@
},
/* 80 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
@@ -7054,19 +7058,19 @@
},
/* 90 */
{ 0x00,
- 1364,
+ 1365,
NULL,
NULL,
},
/* 91 */
{ 0x90,
- 1364,
+ 1365,
NULL,
NULL,
},
/* 92 */
{ 0x90,
- 1364,
+ 1365,
NULL,
g_OpcodeSeq + 93,
},
@@ -7078,7 +7082,7 @@
},
/* 94 */
{ 0x90,
- 1365,
+ 1366,
NULL,
NULL,
},
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