src/trusted/validator/x86/decoder/gen/nc_opcode_table_64.h - Issue 10790077: Add tzcnt as an acceptable instruction to x86-64 validator (it already

Unified Diff: src/trusted/validator/x86/decoder/gen/nc_opcode_table_64.h

Issue 10790077: Add tzcnt as an acceptable instruction to x86-64 validator (it already (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/

Patch Set: Created 8 years, 5 months ago

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Index: src/trusted/validator/x86/decoder/gen/nc_opcode_table_64.h

===================================================================

--- src/trusted/validator/x86/decoder/gen/nc_opcode_table_64.h (revision 9237)

+++ src/trusted/validator/x86/decoder/gen/nc_opcode_table_64.h (working copy)

@@ -743,7 +743,7 @@

/* 734 */ { RegAX, NACL_OPFLAG(OpSet), "%ax" },

};

-static const NaClInst g_Opcodes[1340] = {

+static const NaClInst g_Opcodes[1341] = {

/* 0 */

{ NACLi_INVALID,

NACL_EMPTY_IFLAGS,

@@ -3721,2386 +3721,2390 @@

InstPopcnt, 0x00, 2, 340, NACL_OPCODE_NULL_OFFSET },

/* 744 */

- { NACLi_LZCNT,

+ { NACLi_386,

+ InstTzcnt, 0x00, 2, 340, NACL_OPCODE_NULL_OFFSET },

+ /* 745 */

+ { NACLi_386,

InstLzcnt, 0x00, 2, 340, NACL_OPCODE_NULL_OFFSET },

- /* 745 */

+ /* 746 */

{ NACLi_SSE,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsRep),

InstCmpss, 0x00, 3, 487, NACL_OPCODE_NULL_OFFSET },

- /* 746 */

+ /* 747 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep),

InstMovq2dq, 0x00, 2, 490, NACL_OPCODE_NULL_OFFSET },

- /* 747 */

+ /* 748 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep),

InstCvtdq2pd, 0x00, 2, 492, NACL_OPCODE_NULL_OFFSET },

- /* 748 */

+ /* 749 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovupd, 0x00, 2, 494, NACL_OPCODE_NULL_OFFSET },

- /* 749 */

+ /* 750 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovupd, 0x00, 2, 496, NACL_OPCODE_NULL_OFFSET },

- /* 750 */

+ /* 751 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovlpd, 0x00, 2, 498, NACL_OPCODE_NULL_OFFSET },

- /* 751 */

+ /* 752 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovlpd, 0x00, 2, 439, NACL_OPCODE_NULL_OFFSET },

- /* 752 */

+ /* 753 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstUnpcklpd, 0x00, 2, 500, NACL_OPCODE_NULL_OFFSET },

- /* 753 */

+ /* 754 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstUnpckhpd, 0x00, 2, 500, NACL_OPCODE_NULL_OFFSET },

- /* 754 */

+ /* 755 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovhpd, 0x00, 2, 498, NACL_OPCODE_NULL_OFFSET },

- /* 755 */

+ /* 756 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovhpd, 0x00, 2, 439, NACL_OPCODE_NULL_OFFSET },

- /* 756 */

+ /* 757 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovapd, 0x00, 2, 494, NACL_OPCODE_NULL_OFFSET },

- /* 757 */

+ /* 758 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovapd, 0x00, 2, 496, NACL_OPCODE_NULL_OFFSET },

- /* 758 */

+ /* 759 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstCvtpi2pd, 0x00, 2, 502, NACL_OPCODE_NULL_OFFSET },

- /* 759 */

+ /* 760 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovntpd, 0x00, 2, 504, NACL_OPCODE_NULL_OFFSET },

- /* 760 */

+ /* 761 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstCvttpd2pi, 0x00, 2, 506, NACL_OPCODE_NULL_OFFSET },

- /* 761 */

+ /* 762 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstCvtpd2pi, 0x00, 2, 506, NACL_OPCODE_NULL_OFFSET },

- /* 762 */

+ /* 763 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstUcomisd, 0x00, 2, 508, NACL_OPCODE_NULL_OFFSET },

- /* 763 */

+ /* 764 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstComisd, 0x00, 2, 510, NACL_OPCODE_NULL_OFFSET },

- /* 764 */

+ /* 765 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovmskpd, 0x00, 2, 512, NACL_OPCODE_NULL_OFFSET },

- /* 765 */

+ /* 766 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstSqrtpd, 0x00, 2, 514, NACL_OPCODE_NULL_OFFSET },

- /* 766 */

+ /* 767 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 767 */

+ /* 768 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstAndpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 768 */

+ /* 769 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstAndnpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 769 */

+ /* 770 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstOrpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 770 */

+ /* 771 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstXorpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 771 */

+ /* 772 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstAddpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 772 */

+ /* 773 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMulpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 773 */

+ /* 774 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstCvtpd2ps, 0x00, 2, 514, NACL_OPCODE_NULL_OFFSET },

- /* 774 */

+ /* 775 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstCvtps2dq, 0x00, 2, 481, NACL_OPCODE_NULL_OFFSET },

- /* 775 */

+ /* 776 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstSubpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 776 */

+ /* 777 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMinpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 777 */

+ /* 778 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstDivpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 778 */

+ /* 779 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMaxpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 779 */

+ /* 780 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPunpcklbw, 0x00, 2, 516, NACL_OPCODE_NULL_OFFSET },

- /* 780 */

+ /* 781 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPunpcklwd, 0x00, 2, 516, NACL_OPCODE_NULL_OFFSET },

- /* 781 */

+ /* 782 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPunpckldq, 0x00, 2, 516, NACL_OPCODE_NULL_OFFSET },

- /* 782 */

+ /* 783 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPacksswb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 783 */

+ /* 784 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPcmpgtb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 784 */

+ /* 785 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPcmpgtw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 785 */

+ /* 786 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPcmpgtd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 786 */

+ /* 787 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPackuswb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 787 */

+ /* 788 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPunpckhbw, 0x00, 2, 516, NACL_OPCODE_NULL_OFFSET },

- /* 788 */

+ /* 789 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPunpckhwd, 0x00, 2, 516, NACL_OPCODE_NULL_OFFSET },

- /* 789 */

+ /* 790 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPunpckhdq, 0x00, 2, 516, NACL_OPCODE_NULL_OFFSET },

- /* 790 */

+ /* 791 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPackssdw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 791 */

+ /* 792 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPunpcklqdq, 0x00, 2, 516, NACL_OPCODE_NULL_OFFSET },

- /* 792 */

+ /* 793 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPunpckhqdq, 0x00, 2, 516, NACL_OPCODE_NULL_OFFSET },

- /* 793 */

+ /* 794 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_o),

InstMovq, 0x00, 2, 520, NACL_OPCODE_NULL_OFFSET },

- /* 794 */

+ /* 795 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),

- InstMovd, 0x00, 2, 522, 793 },

- /* 795 */

+ InstMovd, 0x00, 2, 522, 794 },

+ /* 796 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovdqa, 0x00, 2, 483, NACL_OPCODE_NULL_OFFSET },

- /* 796 */

+ /* 797 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPshufd, 0x00, 3, 524, NACL_OPCODE_NULL_OFFSET },

- /* 797 */

+ /* 798 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

InstInvalid, 0x07, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 798 */

+ /* 799 */

{ NACLi_SSE2,

- InstPsllw, 0x06, 2, 527, 797 },

- /* 799 */

+ InstPsllw, 0x06, 2, 527, 798 },

+ /* 800 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x05, 0, 0, 798 },

- /* 800 */

+ InstInvalid, 0x05, 0, 0, 799 },

+ /* 801 */

{ NACLi_SSE2,

- InstPsraw, 0x04, 2, 527, 799 },

- /* 801 */

+ InstPsraw, 0x04, 2, 527, 800 },

+ /* 802 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x03, 0, 0, 800 },

- /* 802 */

+ InstInvalid, 0x03, 0, 0, 801 },

+ /* 803 */

{ NACLi_SSE2,

- InstPsrlw, 0x02, 2, 527, 801 },

- /* 803 */

+ InstPsrlw, 0x02, 2, 527, 802 },

+ /* 804 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x01, 0, 0, 802 },

- /* 804 */

+ InstInvalid, 0x01, 0, 0, 803 },

+ /* 805 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x00, 0, 0, 803 },

- /* 805 */

+ InstInvalid, 0x00, 0, 0, 804 },

+ /* 806 */

{ NACLi_SSE2,

- InstPslld, 0x06, 2, 527, 797 },

- /* 806 */

+ InstPslld, 0x06, 2, 527, 798 },

+ /* 807 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x05, 0, 0, 805 },

- /* 807 */

+ InstInvalid, 0x05, 0, 0, 806 },

+ /* 808 */

{ NACLi_SSE2,

- InstPsrad, 0x04, 2, 527, 806 },

- /* 808 */

+ InstPsrad, 0x04, 2, 527, 807 },

+ /* 809 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x03, 0, 0, 807 },

- /* 809 */

+ InstInvalid, 0x03, 0, 0, 808 },

+ /* 810 */

{ NACLi_SSE2,

- InstPsrld, 0x02, 2, 527, 808 },

- /* 810 */

+ InstPsrld, 0x02, 2, 527, 809 },

+ /* 811 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x01, 0, 0, 809 },

- /* 811 */

+ InstInvalid, 0x01, 0, 0, 810 },

+ /* 812 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x00, 0, 0, 810 },

- /* 812 */

+ InstInvalid, 0x00, 0, 0, 811 },

+ /* 813 */

{ NACLi_SSE2,

InstPslldq, 0x07, 2, 527, NACL_OPCODE_NULL_OFFSET },

- /* 813 */

+ /* 814 */

{ NACLi_SSE2,

- InstPsllq, 0x06, 2, 527, 812 },

- /* 814 */

+ InstPsllq, 0x06, 2, 527, 813 },

+ /* 815 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x05, 0, 0, 813 },

- /* 815 */

+ InstInvalid, 0x05, 0, 0, 814 },

+ /* 816 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x04, 0, 0, 814 },

- /* 816 */

+ InstInvalid, 0x04, 0, 0, 815 },

+ /* 817 */

{ NACLi_SSE2,

- InstPsrldq, 0x03, 2, 527, 815 },

- /* 817 */

+ InstPsrldq, 0x03, 2, 527, 816 },

+ /* 818 */

{ NACLi_SSE2,

- InstPsrlq, 0x02, 2, 527, 816 },

- /* 818 */

+ InstPsrlq, 0x02, 2, 527, 817 },

+ /* 819 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x01, 0, 0, 817 },

- /* 819 */

+ InstInvalid, 0x01, 0, 0, 818 },

+ /* 820 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

- InstInvalid, 0x00, 0, 0, 818 },

- /* 820 */

+ InstInvalid, 0x00, 0, 0, 819 },

+ /* 821 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPcmpeqb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 821 */

+ /* 822 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPcmpeqw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 822 */

+ /* 823 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPcmpeqd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 823 */

+ /* 824 */

{ NACLi_INVALID,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 824 */

+ /* 825 */

{ NACLi_SSE4A,

- InstExtrq, 0x00, 3, 529, 823 },

- /* 825 */

+ InstExtrq, 0x00, 3, 529, 824 },

+ /* 826 */

{ NACLi_SSE4A,

NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstExtrq, 0x00, 2, 454, NACL_OPCODE_NULL_OFFSET },

- /* 826 */

+ /* 827 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstHaddpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 827 */

+ /* 828 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstHsubpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 828 */

+ /* 829 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_o),

InstMovq, 0x00, 2, 532, NACL_OPCODE_NULL_OFFSET },

- /* 829 */

+ /* 830 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),

- InstMovd, 0x00, 2, 534, 828 },

- /* 830 */

+ InstMovd, 0x00, 2, 534, 829 },

+ /* 831 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovdqa, 0x00, 2, 485, NACL_OPCODE_NULL_OFFSET },

- /* 831 */

+ /* 832 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstCmppd, 0x00, 3, 536, NACL_OPCODE_NULL_OFFSET },

- /* 832 */

+ /* 833 */

{ NACLi_SSE,

InstPinsrw, 0x00, 3, 539, NACL_OPCODE_NULL_OFFSET },

- /* 833 */

+ /* 834 */

{ NACLi_SSE41,

NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPextrw, 0x00, 3, 542, NACL_OPCODE_NULL_OFFSET },

- /* 834 */

+ /* 835 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstShufpd, 0x00, 3, 536, NACL_OPCODE_NULL_OFFSET },

- /* 835 */

+ /* 836 */

{ NACLi_SSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstAddsubpd, 0x00, 2, 459, NACL_OPCODE_NULL_OFFSET },

- /* 836 */

+ /* 837 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsrlw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 837 */

+ /* 838 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsrld, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 838 */

+ /* 839 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsrlq, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 839 */

+ /* 840 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPaddq, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 840 */

+ /* 841 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmullw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 841 */

+ /* 842 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovq, 0x00, 2, 545, NACL_OPCODE_NULL_OFFSET },

- /* 842 */

+ /* 843 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovmskb, 0x00, 2, 542, NACL_OPCODE_NULL_OFFSET },

- /* 843 */

+ /* 844 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsubusb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 844 */

+ /* 845 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsubusw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 845 */

+ /* 846 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPminub, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 846 */

+ /* 847 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPand, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 847 */

+ /* 848 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPaddusb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 848 */

+ /* 849 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPaddusw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 849 */

+ /* 850 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmaxub, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 850 */

+ /* 851 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPandn, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 851 */

+ /* 852 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPavgb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 852 */

+ /* 853 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsraw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 853 */

+ /* 854 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsrad, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 854 */

+ /* 855 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPavgw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 855 */

+ /* 856 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmulhuw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 856 */

+ /* 857 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmulhw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 857 */

+ /* 858 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstCvttpd2dq, 0x00, 2, 547, NACL_OPCODE_NULL_OFFSET },

- /* 858 */

+ /* 859 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovntdq, 0x00, 2, 549, NACL_OPCODE_NULL_OFFSET },

- /* 859 */

+ /* 860 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsubsb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 860 */

+ /* 861 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsubsw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 861 */

+ /* 862 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPminsw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 862 */

+ /* 863 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPor, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 863 */

+ /* 864 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPaddsb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 864 */

+ /* 865 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPaddsw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 865 */

+ /* 866 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmaxsw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 866 */

+ /* 867 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPxor, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 867 */

+ /* 868 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsllw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 868 */

+ /* 869 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPslld, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 869 */

+ /* 870 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsllq, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 870 */

+ /* 871 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmuludq, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 871 */

+ /* 872 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmaddwd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 872 */

+ /* 873 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsadbw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 873 */

+ /* 874 */

{ NACLi_SSE2,

NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),

InstMaskmovdqu, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET },

- /* 874 */

+ /* 875 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsubb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 875 */

+ /* 876 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsubw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 876 */

+ /* 877 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsubd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 877 */

+ /* 878 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsubq, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 878 */

+ /* 879 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPaddb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 879 */

+ /* 880 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPaddw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 880 */

+ /* 881 */

{ NACLi_SSE2,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPaddd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 881 */

+ /* 882 */

{ NACLi_E3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPi2fw, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 882 */

+ /* 883 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPi2fd, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 883 */

+ /* 884 */

{ NACLi_E3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPf2iw, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 884 */

+ /* 885 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPf2id, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 885 */

+ /* 886 */

{ NACLi_E3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfnacc, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 886 */

+ /* 887 */

{ NACLi_E3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfpnacc, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 887 */

+ /* 888 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfcmpge, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 888 */

+ /* 889 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfmin, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 889 */

+ /* 890 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfrcp, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 890 */

+ /* 891 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfrsqrt, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 891 */

+ /* 892 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfsub, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 892 */

+ /* 893 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfadd, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 893 */

+ /* 894 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfcmpgt, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 894 */

+ /* 895 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfmax, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 895 */

+ /* 896 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfrcpit1, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 896 */

+ /* 897 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfrsqit1, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 897 */

+ /* 898 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfsubr, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 898 */

+ /* 899 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfacc, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 899 */

+ /* 900 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfcmpeq, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 900 */

+ /* 901 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfmul, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 901 */

+ /* 902 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPfrcpit2, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 902 */

+ /* 903 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPmulhrw, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 903 */

+ /* 904 */

{ NACLi_E3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPswapd, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 904 */

+ /* 905 */

{ NACLi_3DNOW,

NACL_IFLAG(OpcodeUsesModRm),

InstPavgusb, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 905 */

+ /* 906 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPshufb, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 906 */

+ /* 907 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPhaddw, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 907 */

+ /* 908 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPhaddd, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 908 */

+ /* 909 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPhaddsw, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 909 */

+ /* 910 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPmaddubsw, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 910 */

+ /* 911 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPhsubw, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 911 */

+ /* 912 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPhsubd, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 912 */

+ /* 913 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPhsubsw, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 913 */

+ /* 914 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPsignb, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 914 */

+ /* 915 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPsignw, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 915 */

+ /* 916 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPsignd, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 916 */

+ /* 917 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPmulhrsw, 0x00, 2, 350, NACL_OPCODE_NULL_OFFSET },

- /* 917 */

+ /* 918 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPabsb, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 918 */

+ /* 919 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPabsw, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 919 */

+ /* 920 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm),

InstPabsd, 0x00, 2, 358, NACL_OPCODE_NULL_OFFSET },

- /* 920 */

+ /* 921 */

{ NACLi_MOVBE,

InstMovbe, 0x00, 2, 554, NACL_OPCODE_NULL_OFFSET },

- /* 921 */

+ /* 922 */

{ NACLi_MOVBE,

InstMovbe, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET },

- /* 922 */

+ /* 923 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPshufb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 923 */

+ /* 924 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPhaddw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 924 */

+ /* 925 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPhaddd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 925 */

+ /* 926 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPhaddsw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 926 */

+ /* 927 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmaddubsw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 927 */

+ /* 928 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPhsubw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 928 */

+ /* 929 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPhsubd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 929 */

+ /* 930 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPhsubsw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 930 */

+ /* 931 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsignb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 931 */

+ /* 932 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsignw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 932 */

+ /* 933 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPsignd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 933 */

+ /* 934 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmulhrsw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 934 */

+ /* 935 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPblendvb, 0x00, 3, 558, NACL_OPCODE_NULL_OFFSET },

- /* 935 */

+ /* 936 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstBlendvps, 0x00, 3, 558, NACL_OPCODE_NULL_OFFSET },

- /* 936 */

+ /* 937 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstBlendvpd, 0x00, 3, 558, NACL_OPCODE_NULL_OFFSET },

- /* 937 */

+ /* 938 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPtest, 0x00, 2, 561, NACL_OPCODE_NULL_OFFSET },

- /* 938 */

+ /* 939 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPabsb, 0x00, 2, 483, NACL_OPCODE_NULL_OFFSET },

- /* 939 */

+ /* 940 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPabsw, 0x00, 2, 483, NACL_OPCODE_NULL_OFFSET },

- /* 940 */

+ /* 941 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPabsd, 0x00, 2, 483, NACL_OPCODE_NULL_OFFSET },

- /* 941 */

+ /* 942 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovsxbw, 0x00, 2, 563, NACL_OPCODE_NULL_OFFSET },

- /* 942 */

+ /* 943 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovsxbd, 0x00, 2, 565, NACL_OPCODE_NULL_OFFSET },

- /* 943 */

+ /* 944 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovsxbq, 0x00, 2, 567, NACL_OPCODE_NULL_OFFSET },

- /* 944 */

+ /* 945 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovsxwd, 0x00, 2, 563, NACL_OPCODE_NULL_OFFSET },

- /* 945 */

+ /* 946 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovsxwq, 0x00, 2, 565, NACL_OPCODE_NULL_OFFSET },

- /* 946 */

+ /* 947 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovsxdq, 0x00, 2, 563, NACL_OPCODE_NULL_OFFSET },

- /* 947 */

+ /* 948 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmuldq, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 948 */

+ /* 949 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPcmpeqq, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 949 */

+ /* 950 */

{ NACLi_SSE41,

NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMovntdqa, 0x00, 2, 465, NACL_OPCODE_NULL_OFFSET },

- /* 950 */

+ /* 951 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPackusdw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 951 */

+ /* 952 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovzxbw, 0x00, 2, 563, NACL_OPCODE_NULL_OFFSET },

- /* 952 */

+ /* 953 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovzxbd, 0x00, 2, 565, NACL_OPCODE_NULL_OFFSET },

- /* 953 */

+ /* 954 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovzxbq, 0x00, 2, 567, NACL_OPCODE_NULL_OFFSET },

- /* 954 */

+ /* 955 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovzxwd, 0x00, 2, 563, NACL_OPCODE_NULL_OFFSET },

- /* 955 */

+ /* 956 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovzxwq, 0x00, 2, 565, NACL_OPCODE_NULL_OFFSET },

- /* 956 */

+ /* 957 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmovzxdq, 0x00, 2, 563, NACL_OPCODE_NULL_OFFSET },

- /* 957 */

+ /* 958 */

{ NACLi_SSE42,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPcmpgtq, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 958 */

+ /* 959 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPminsb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 959 */

+ /* 960 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPminsd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 960 */

+ /* 961 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPminuw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 961 */

+ /* 962 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPminud, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 962 */

+ /* 963 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmaxsb, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 963 */

+ /* 964 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmaxsd, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 964 */

+ /* 965 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmaxuw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 965 */

+ /* 966 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmaxud, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 966 */

+ /* 967 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPmulld, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 967 */

+ /* 968 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPhminposuw, 0x00, 2, 518, NACL_OPCODE_NULL_OFFSET },

- /* 968 */

+ /* 969 */

{ NACLi_VMX,

NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

InstInvept, 0x00, 2, 569, NACL_OPCODE_NULL_OFFSET },

- /* 969 */

+ /* 970 */

{ NACLi_VMX,

NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal),

InstInvvpid, 0x00, 2, 569, NACL_OPCODE_NULL_OFFSET },

- /* 970 */

+ /* 971 */

{ NACLi_SSE42,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRepne) | NACL_IFLAG(OperandSize_b),

InstCrc32, 0x00, 2, 571, NACL_OPCODE_NULL_OFFSET },

- /* 971 */

+ /* 972 */

{ NACLi_SSE42,

InstCrc32, 0x00, 2, 573, NACL_OPCODE_NULL_OFFSET },

- /* 972 */

+ /* 973 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b),

InstPalignr, 0x00, 3, 575, NACL_OPCODE_NULL_OFFSET },

- /* 973 */

+ /* 974 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstRoundps, 0x00, 3, 524, NACL_OPCODE_NULL_OFFSET },

- /* 974 */

+ /* 975 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstRoundpd, 0x00, 3, 524, NACL_OPCODE_NULL_OFFSET },

- /* 975 */

+ /* 976 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstRoundss, 0x00, 3, 578, NACL_OPCODE_NULL_OFFSET },

- /* 976 */

+ /* 977 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstRoundsd, 0x00, 3, 581, NACL_OPCODE_NULL_OFFSET },

- /* 977 */

+ /* 978 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstBlendps, 0x00, 3, 584, NACL_OPCODE_NULL_OFFSET },

- /* 978 */

+ /* 979 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstBlendpd, 0x00, 3, 584, NACL_OPCODE_NULL_OFFSET },

- /* 979 */

+ /* 980 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPblendw, 0x00, 3, 584, NACL_OPCODE_NULL_OFFSET },

- /* 980 */

+ /* 981 */

{ NACLi_SSSE3,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPalignr, 0x00, 3, 584, NACL_OPCODE_NULL_OFFSET },

- /* 981 */

+ /* 982 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPextrb, 0x00, 3, 587, NACL_OPCODE_NULL_OFFSET },

- /* 982 */

+ /* 983 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPextrw, 0x00, 3, 590, NACL_OPCODE_NULL_OFFSET },

- /* 983 */

+ /* 984 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_o),

InstPextrq, 0x00, 3, 593, NACL_OPCODE_NULL_OFFSET },

- /* 984 */

+ /* 985 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),

- InstPextrd, 0x00, 3, 596, 983 },

- /* 985 */

+ InstPextrd, 0x00, 3, 596, 984 },

+ /* 986 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstExtractps, 0x00, 3, 599, NACL_OPCODE_NULL_OFFSET },

- /* 986 */

+ /* 987 */

{ NACLi_SSE41,

InstPinsrb, 0x00, 3, 602, NACL_OPCODE_NULL_OFFSET },

- /* 987 */

+ /* 988 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstInsertps, 0x00, 3, 605, NACL_OPCODE_NULL_OFFSET },

- /* 988 */

+ /* 989 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_o),

InstPinsrq, 0x00, 3, 608, NACL_OPCODE_NULL_OFFSET },

- /* 989 */

+ /* 990 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v),

- InstPinsrd, 0x00, 3, 611, 988 },

- /* 990 */

+ InstPinsrd, 0x00, 3, 611, 989 },

+ /* 991 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstDpps, 0x00, 3, 584, NACL_OPCODE_NULL_OFFSET },

- /* 991 */

+ /* 992 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstDppd, 0x00, 3, 584, NACL_OPCODE_NULL_OFFSET },

- /* 992 */

+ /* 993 */

{ NACLi_SSE41,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstMpsadbw, 0x00, 3, 584, NACL_OPCODE_NULL_OFFSET },

- /* 993 */

+ /* 994 */

{ NACLi_SSE42,

InstPcmpestrm, 0x00, 6, 614, NACL_OPCODE_NULL_OFFSET },

- /* 994 */

+ /* 995 */

{ NACLi_SSE42,

InstPcmpestri, 0x00, 6, 620, NACL_OPCODE_NULL_OFFSET },

- /* 995 */

+ /* 996 */

{ NACLi_SSE42,

NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16),

InstPcmpistrm, 0x00, 4, 626, NACL_OPCODE_NULL_OFFSET },

- /* 996 */

+ /* 997 */

{ NACLi_SSE42,

InstPcmpistri, 0x00, 4, 630, NACL_OPCODE_NULL_OFFSET },

- /* 997 */

+ /* 998 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 998 */

+ /* 999 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 999 */

+ /* 1000 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1000 */

+ /* 1001 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1001 */

+ /* 1002 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1002 */

+ /* 1003 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1003 */

+ /* 1004 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1004 */

+ /* 1005 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1005 */

+ /* 1006 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1006 */

+ /* 1007 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1007 */

+ /* 1008 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1008 */

+ /* 1009 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1009 */

+ /* 1010 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1010 */

+ /* 1011 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1011 */

+ /* 1012 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1012 */

+ /* 1013 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1013 */

+ /* 1014 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcom, 0x00, 2, 650, NACL_OPCODE_NULL_OFFSET },

- /* 1014 */

+ /* 1015 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcom, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1015 */

+ /* 1016 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcom, 0x00, 2, 654, NACL_OPCODE_NULL_OFFSET },

- /* 1016 */

+ /* 1017 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcom, 0x00, 2, 656, NACL_OPCODE_NULL_OFFSET },

- /* 1017 */

+ /* 1018 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcom, 0x00, 2, 658, NACL_OPCODE_NULL_OFFSET },

- /* 1018 */

+ /* 1019 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcom, 0x00, 2, 660, NACL_OPCODE_NULL_OFFSET },

- /* 1019 */

+ /* 1020 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcom, 0x00, 2, 662, NACL_OPCODE_NULL_OFFSET },

- /* 1020 */

+ /* 1021 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcom, 0x00, 2, 664, NACL_OPCODE_NULL_OFFSET },

- /* 1021 */

+ /* 1022 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomp, 0x00, 2, 650, NACL_OPCODE_NULL_OFFSET },

- /* 1022 */

+ /* 1023 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomp, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1023 */

+ /* 1024 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomp, 0x00, 2, 654, NACL_OPCODE_NULL_OFFSET },

- /* 1024 */

+ /* 1025 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomp, 0x00, 2, 656, NACL_OPCODE_NULL_OFFSET },

- /* 1025 */

+ /* 1026 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomp, 0x00, 2, 658, NACL_OPCODE_NULL_OFFSET },

- /* 1026 */

+ /* 1027 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomp, 0x00, 2, 660, NACL_OPCODE_NULL_OFFSET },

- /* 1027 */

+ /* 1028 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomp, 0x00, 2, 662, NACL_OPCODE_NULL_OFFSET },

- /* 1028 */

+ /* 1029 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomp, 0x00, 2, 664, NACL_OPCODE_NULL_OFFSET },

- /* 1029 */

+ /* 1030 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1030 */

+ /* 1031 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1031 */

+ /* 1032 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1032 */

+ /* 1033 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1033 */

+ /* 1034 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1034 */

+ /* 1035 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1035 */

+ /* 1036 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1036 */

+ /* 1037 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1037 */

+ /* 1038 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1038 */

+ /* 1039 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1039 */

+ /* 1040 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1040 */

+ /* 1041 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1041 */

+ /* 1042 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1042 */

+ /* 1043 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1043 */

+ /* 1044 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1044 */

+ /* 1045 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1045 */

+ /* 1046 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1046 */

+ /* 1047 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1047 */

+ /* 1048 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1048 */

+ /* 1049 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1049 */

+ /* 1050 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1050 */

+ /* 1051 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1051 */

+ /* 1052 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1052 */

+ /* 1053 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1053 */

+ /* 1054 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1054 */

+ /* 1055 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1055 */

+ /* 1056 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1056 */

+ /* 1057 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1057 */

+ /* 1058 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1058 */

+ /* 1059 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1059 */

+ /* 1060 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1060 */

+ /* 1061 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1061 */

+ /* 1062 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFld, 0x00, 2, 666, NACL_OPCODE_NULL_OFFSET },

- /* 1062 */

+ /* 1063 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFld, 0x00, 2, 668, NACL_OPCODE_NULL_OFFSET },

- /* 1063 */

+ /* 1064 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFld, 0x00, 2, 670, NACL_OPCODE_NULL_OFFSET },

- /* 1064 */

+ /* 1065 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFld, 0x00, 2, 672, NACL_OPCODE_NULL_OFFSET },

- /* 1065 */

+ /* 1066 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFld, 0x00, 2, 674, NACL_OPCODE_NULL_OFFSET },

- /* 1066 */

+ /* 1067 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFld, 0x00, 2, 676, NACL_OPCODE_NULL_OFFSET },

- /* 1067 */

+ /* 1068 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFld, 0x00, 2, 678, NACL_OPCODE_NULL_OFFSET },

- /* 1068 */

+ /* 1069 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFld, 0x00, 2, 680, NACL_OPCODE_NULL_OFFSET },

- /* 1069 */

+ /* 1070 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxch, 0x00, 2, 682, NACL_OPCODE_NULL_OFFSET },

- /* 1070 */

+ /* 1071 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxch, 0x00, 2, 684, NACL_OPCODE_NULL_OFFSET },

- /* 1071 */

+ /* 1072 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxch, 0x00, 2, 686, NACL_OPCODE_NULL_OFFSET },

- /* 1072 */

+ /* 1073 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxch, 0x00, 2, 688, NACL_OPCODE_NULL_OFFSET },

- /* 1073 */

+ /* 1074 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxch, 0x00, 2, 690, NACL_OPCODE_NULL_OFFSET },

- /* 1074 */

+ /* 1075 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxch, 0x00, 2, 692, NACL_OPCODE_NULL_OFFSET },

- /* 1075 */

+ /* 1076 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxch, 0x00, 2, 694, NACL_OPCODE_NULL_OFFSET },

- /* 1076 */

+ /* 1077 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxch, 0x00, 2, 696, NACL_OPCODE_NULL_OFFSET },

- /* 1077 */

+ /* 1078 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFnop, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 1078 */

+ /* 1079 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFchs, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1079 */

+ /* 1080 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFabs, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1080 */

+ /* 1081 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFtst, 0x00, 1, 191, NACL_OPCODE_NULL_OFFSET },

- /* 1081 */

+ /* 1082 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxam, 0x00, 1, 191, NACL_OPCODE_NULL_OFFSET },

- /* 1082 */

+ /* 1083 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFld1, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1083 */

+ /* 1084 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFldl2t, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1084 */

+ /* 1085 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFldl2e, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1085 */

+ /* 1086 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFldpi, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1086 */

+ /* 1087 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFldlg2, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1087 */

+ /* 1088 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFldln2, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1088 */

+ /* 1089 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFldz, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1089 */

+ /* 1090 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstF2xm1, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1090 */

+ /* 1091 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFyl2x, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1091 */

+ /* 1092 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFptan, 0x00, 2, 668, NACL_OPCODE_NULL_OFFSET },

- /* 1092 */

+ /* 1093 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFpatan, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1093 */

+ /* 1094 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFxtract, 0x00, 2, 668, NACL_OPCODE_NULL_OFFSET },

- /* 1094 */

+ /* 1095 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFprem1, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1095 */

+ /* 1096 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdecstp, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 1096 */

+ /* 1097 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFincstp, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 1097 */

+ /* 1098 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFprem, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1098 */

+ /* 1099 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFyl2xp1, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1099 */

+ /* 1100 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsqrt, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1100 */

+ /* 1101 */

{ NACLi_X87_FSINCOS,

NACL_EMPTY_IFLAGS,

InstFsincos, 0x00, 2, 668, NACL_OPCODE_NULL_OFFSET },

- /* 1101 */

+ /* 1102 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFrndint, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1102 */

+ /* 1103 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFscale, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1103 */

+ /* 1104 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsin, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1104 */

+ /* 1105 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcos, 0x00, 1, 189, NACL_OPCODE_NULL_OFFSET },

- /* 1105 */

+ /* 1106 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovb, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1106 */

+ /* 1107 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovb, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1107 */

+ /* 1108 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovb, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1108 */

+ /* 1109 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovb, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1109 */

+ /* 1110 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovb, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1110 */

+ /* 1111 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovb, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1111 */

+ /* 1112 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovb, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1112 */

+ /* 1113 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovb, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1113 */

+ /* 1114 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmove, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1114 */

+ /* 1115 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmove, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1115 */

+ /* 1116 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmove, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1116 */

+ /* 1117 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmove, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1117 */

+ /* 1118 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmove, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1118 */

+ /* 1119 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmove, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1119 */

+ /* 1120 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmove, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1120 */

+ /* 1121 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmove, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1121 */

+ /* 1122 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovbe, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1122 */

+ /* 1123 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovbe, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1123 */

+ /* 1124 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovbe, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1124 */

+ /* 1125 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovbe, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1125 */

+ /* 1126 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovbe, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1126 */

+ /* 1127 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovbe, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1127 */

+ /* 1128 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovbe, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1128 */

+ /* 1129 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovbe, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1129 */

+ /* 1130 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovu, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1130 */

+ /* 1131 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovu, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1131 */

+ /* 1132 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovu, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1132 */

+ /* 1133 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovu, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1133 */

+ /* 1134 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovu, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1134 */

+ /* 1135 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovu, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1135 */

+ /* 1136 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovu, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1136 */

+ /* 1137 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovu, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1137 */

+ /* 1138 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucompp, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1138 */

+ /* 1139 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnb, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1139 */

+ /* 1140 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnb, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1140 */

+ /* 1141 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnb, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1141 */

+ /* 1142 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnb, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1142 */

+ /* 1143 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnb, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1143 */

+ /* 1144 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnb, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1144 */

+ /* 1145 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnb, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1145 */

+ /* 1146 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnb, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1146 */

+ /* 1147 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovne, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1147 */

+ /* 1148 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovne, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1148 */

+ /* 1149 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovne, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1149 */

+ /* 1150 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovne, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1150 */

+ /* 1151 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovne, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1151 */

+ /* 1152 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovne, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1152 */

+ /* 1153 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovne, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1153 */

+ /* 1154 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovne, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1154 */

+ /* 1155 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnbe, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1155 */

+ /* 1156 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnbe, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1156 */

+ /* 1157 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnbe, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1157 */

+ /* 1158 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnbe, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1158 */

+ /* 1159 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnbe, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1159 */

+ /* 1160 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnbe, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1160 */

+ /* 1161 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnbe, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1161 */

+ /* 1162 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnbe, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1162 */

+ /* 1163 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnu, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1163 */

+ /* 1164 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnu, 0x00, 2, 636, NACL_OPCODE_NULL_OFFSET },

- /* 1164 */

+ /* 1165 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnu, 0x00, 2, 638, NACL_OPCODE_NULL_OFFSET },

- /* 1165 */

+ /* 1166 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnu, 0x00, 2, 640, NACL_OPCODE_NULL_OFFSET },

- /* 1166 */

+ /* 1167 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnu, 0x00, 2, 642, NACL_OPCODE_NULL_OFFSET },

- /* 1167 */

+ /* 1168 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnu, 0x00, 2, 644, NACL_OPCODE_NULL_OFFSET },

- /* 1168 */

+ /* 1169 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnu, 0x00, 2, 646, NACL_OPCODE_NULL_OFFSET },

- /* 1169 */

+ /* 1170 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcmovnu, 0x00, 2, 648, NACL_OPCODE_NULL_OFFSET },

- /* 1170 */

+ /* 1171 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFnclex, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 1171 */

+ /* 1172 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFninit, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 1172 */

+ /* 1173 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomi, 0x00, 2, 650, NACL_OPCODE_NULL_OFFSET },

- /* 1173 */

+ /* 1174 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomi, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1174 */

+ /* 1175 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomi, 0x00, 2, 654, NACL_OPCODE_NULL_OFFSET },

- /* 1175 */

+ /* 1176 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomi, 0x00, 2, 656, NACL_OPCODE_NULL_OFFSET },

- /* 1176 */

+ /* 1177 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomi, 0x00, 2, 658, NACL_OPCODE_NULL_OFFSET },

- /* 1177 */

+ /* 1178 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomi, 0x00, 2, 660, NACL_OPCODE_NULL_OFFSET },

- /* 1178 */

+ /* 1179 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomi, 0x00, 2, 662, NACL_OPCODE_NULL_OFFSET },

- /* 1179 */

+ /* 1180 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomi, 0x00, 2, 664, NACL_OPCODE_NULL_OFFSET },

- /* 1180 */

+ /* 1181 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomi, 0x00, 2, 650, NACL_OPCODE_NULL_OFFSET },

- /* 1181 */

+ /* 1182 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomi, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1182 */

+ /* 1183 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomi, 0x00, 2, 654, NACL_OPCODE_NULL_OFFSET },

- /* 1183 */

+ /* 1184 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomi, 0x00, 2, 656, NACL_OPCODE_NULL_OFFSET },

- /* 1184 */

+ /* 1185 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomi, 0x00, 2, 658, NACL_OPCODE_NULL_OFFSET },

- /* 1185 */

+ /* 1186 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomi, 0x00, 2, 660, NACL_OPCODE_NULL_OFFSET },

- /* 1186 */

+ /* 1187 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomi, 0x00, 2, 662, NACL_OPCODE_NULL_OFFSET },

- /* 1187 */

+ /* 1188 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomi, 0x00, 2, 664, NACL_OPCODE_NULL_OFFSET },

- /* 1188 */

+ /* 1189 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1189 */

+ /* 1190 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1190 */

+ /* 1191 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1191 */

+ /* 1192 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1192 */

+ /* 1193 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1193 */

+ /* 1194 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1194 */

+ /* 1195 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFadd, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1195 */

+ /* 1196 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1196 */

+ /* 1197 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1197 */

+ /* 1198 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1198 */

+ /* 1199 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1199 */

+ /* 1200 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1200 */

+ /* 1201 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1201 */

+ /* 1202 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmul, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1202 */

+ /* 1203 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1203 */

+ /* 1204 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1204 */

+ /* 1205 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1205 */

+ /* 1206 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1206 */

+ /* 1207 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1207 */

+ /* 1208 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1208 */

+ /* 1209 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubr, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1209 */

+ /* 1210 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1210 */

+ /* 1211 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1211 */

+ /* 1212 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1212 */

+ /* 1213 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1213 */

+ /* 1214 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1214 */

+ /* 1215 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1215 */

+ /* 1216 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsub, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1216 */

+ /* 1217 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1217 */

+ /* 1218 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1218 */

+ /* 1219 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1219 */

+ /* 1220 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1220 */

+ /* 1221 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1221 */

+ /* 1222 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1222 */

+ /* 1223 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivr, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1223 */

+ /* 1224 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1224 */

+ /* 1225 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1225 */

+ /* 1226 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1226 */

+ /* 1227 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1227 */

+ /* 1228 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1228 */

+ /* 1229 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1229 */

+ /* 1230 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdiv, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1230 */

+ /* 1231 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFfree, 0x00, 1, 712, NACL_OPCODE_NULL_OFFSET },

- /* 1231 */

+ /* 1232 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFfree, 0x00, 1, 713, NACL_OPCODE_NULL_OFFSET },

- /* 1232 */

+ /* 1233 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFfree, 0x00, 1, 714, NACL_OPCODE_NULL_OFFSET },

- /* 1233 */

+ /* 1234 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFfree, 0x00, 1, 715, NACL_OPCODE_NULL_OFFSET },

- /* 1234 */

+ /* 1235 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFfree, 0x00, 1, 716, NACL_OPCODE_NULL_OFFSET },

- /* 1235 */

+ /* 1236 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFfree, 0x00, 1, 717, NACL_OPCODE_NULL_OFFSET },

- /* 1236 */

+ /* 1237 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFfree, 0x00, 1, 718, NACL_OPCODE_NULL_OFFSET },

- /* 1237 */

+ /* 1238 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFfree, 0x00, 1, 719, NACL_OPCODE_NULL_OFFSET },

- /* 1238 */

+ /* 1239 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFst, 0x00, 2, 666, NACL_OPCODE_NULL_OFFSET },

- /* 1239 */

+ /* 1240 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFst, 0x00, 2, 720, NACL_OPCODE_NULL_OFFSET },

- /* 1240 */

+ /* 1241 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFst, 0x00, 2, 722, NACL_OPCODE_NULL_OFFSET },

- /* 1241 */

+ /* 1242 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFst, 0x00, 2, 724, NACL_OPCODE_NULL_OFFSET },

- /* 1242 */

+ /* 1243 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFst, 0x00, 2, 726, NACL_OPCODE_NULL_OFFSET },

- /* 1243 */

+ /* 1244 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFst, 0x00, 2, 728, NACL_OPCODE_NULL_OFFSET },

- /* 1244 */

+ /* 1245 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFst, 0x00, 2, 730, NACL_OPCODE_NULL_OFFSET },

- /* 1245 */

+ /* 1246 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFst, 0x00, 2, 732, NACL_OPCODE_NULL_OFFSET },

- /* 1246 */

+ /* 1247 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFstp, 0x00, 2, 666, NACL_OPCODE_NULL_OFFSET },

- /* 1247 */

+ /* 1248 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFstp, 0x00, 2, 720, NACL_OPCODE_NULL_OFFSET },

- /* 1248 */

+ /* 1249 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFstp, 0x00, 2, 722, NACL_OPCODE_NULL_OFFSET },

- /* 1249 */

+ /* 1250 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFstp, 0x00, 2, 724, NACL_OPCODE_NULL_OFFSET },

- /* 1250 */

+ /* 1251 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFstp, 0x00, 2, 726, NACL_OPCODE_NULL_OFFSET },

- /* 1251 */

+ /* 1252 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFstp, 0x00, 2, 728, NACL_OPCODE_NULL_OFFSET },

- /* 1252 */

+ /* 1253 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFstp, 0x00, 2, 730, NACL_OPCODE_NULL_OFFSET },

- /* 1253 */

+ /* 1254 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFstp, 0x00, 2, 732, NACL_OPCODE_NULL_OFFSET },

- /* 1254 */

+ /* 1255 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucom, 0x00, 2, 650, NACL_OPCODE_NULL_OFFSET },

- /* 1255 */

+ /* 1256 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucom, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1256 */

+ /* 1257 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucom, 0x00, 2, 654, NACL_OPCODE_NULL_OFFSET },

- /* 1257 */

+ /* 1258 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucom, 0x00, 2, 656, NACL_OPCODE_NULL_OFFSET },

- /* 1258 */

+ /* 1259 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucom, 0x00, 2, 658, NACL_OPCODE_NULL_OFFSET },

- /* 1259 */

+ /* 1260 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucom, 0x00, 2, 660, NACL_OPCODE_NULL_OFFSET },

- /* 1260 */

+ /* 1261 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucom, 0x00, 2, 662, NACL_OPCODE_NULL_OFFSET },

- /* 1261 */

+ /* 1262 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucom, 0x00, 2, 664, NACL_OPCODE_NULL_OFFSET },

- /* 1262 */

+ /* 1263 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomp, 0x00, 2, 650, NACL_OPCODE_NULL_OFFSET },

- /* 1263 */

+ /* 1264 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomp, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1264 */

+ /* 1265 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomp, 0x00, 2, 654, NACL_OPCODE_NULL_OFFSET },

- /* 1265 */

+ /* 1266 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomp, 0x00, 2, 656, NACL_OPCODE_NULL_OFFSET },

- /* 1266 */

+ /* 1267 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomp, 0x00, 2, 658, NACL_OPCODE_NULL_OFFSET },

- /* 1267 */

+ /* 1268 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomp, 0x00, 2, 660, NACL_OPCODE_NULL_OFFSET },

- /* 1268 */

+ /* 1269 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomp, 0x00, 2, 662, NACL_OPCODE_NULL_OFFSET },

- /* 1269 */

+ /* 1270 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomp, 0x00, 2, 664, NACL_OPCODE_NULL_OFFSET },

- /* 1270 */

+ /* 1271 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFaddp, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1271 */

+ /* 1272 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFaddp, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1272 */

+ /* 1273 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFaddp, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1273 */

+ /* 1274 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFaddp, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1274 */

+ /* 1275 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFaddp, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1275 */

+ /* 1276 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFaddp, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1276 */

+ /* 1277 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFaddp, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1277 */

+ /* 1278 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFaddp, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1278 */

+ /* 1279 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmulp, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1279 */

+ /* 1280 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmulp, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1280 */

+ /* 1281 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmulp, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1281 */

+ /* 1282 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmulp, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1282 */

+ /* 1283 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmulp, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1283 */

+ /* 1284 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmulp, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1284 */

+ /* 1285 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmulp, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1285 */

+ /* 1286 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFmulp, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1286 */

+ /* 1287 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcompp, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1287 */

+ /* 1288 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubrp, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1288 */

+ /* 1289 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubrp, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1289 */

+ /* 1290 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubrp, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1290 */

+ /* 1291 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubrp, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1291 */

+ /* 1292 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubrp, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1292 */

+ /* 1293 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubrp, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1293 */

+ /* 1294 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubrp, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1294 */

+ /* 1295 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubrp, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1295 */

+ /* 1296 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubp, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1296 */

+ /* 1297 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubp, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1297 */

+ /* 1298 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubp, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1298 */

+ /* 1299 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubp, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1299 */

+ /* 1300 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubp, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1300 */

+ /* 1301 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubp, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1301 */

+ /* 1302 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubp, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1302 */

+ /* 1303 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFsubp, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1303 */

+ /* 1304 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivrp, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1304 */

+ /* 1305 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivrp, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1305 */

+ /* 1306 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivrp, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1306 */

+ /* 1307 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivrp, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1307 */

+ /* 1308 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivrp, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1308 */

+ /* 1309 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivrp, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1309 */

+ /* 1310 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivrp, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1310 */

+ /* 1311 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivrp, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1311 */

+ /* 1312 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivp, 0x00, 2, 634, NACL_OPCODE_NULL_OFFSET },

- /* 1312 */

+ /* 1313 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivp, 0x00, 2, 698, NACL_OPCODE_NULL_OFFSET },

- /* 1313 */

+ /* 1314 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivp, 0x00, 2, 700, NACL_OPCODE_NULL_OFFSET },

- /* 1314 */

+ /* 1315 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivp, 0x00, 2, 702, NACL_OPCODE_NULL_OFFSET },

- /* 1315 */

+ /* 1316 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivp, 0x00, 2, 704, NACL_OPCODE_NULL_OFFSET },

- /* 1316 */

+ /* 1317 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivp, 0x00, 2, 706, NACL_OPCODE_NULL_OFFSET },

- /* 1317 */

+ /* 1318 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivp, 0x00, 2, 708, NACL_OPCODE_NULL_OFFSET },

- /* 1318 */

+ /* 1319 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFdivp, 0x00, 2, 710, NACL_OPCODE_NULL_OFFSET },

- /* 1319 */

+ /* 1320 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 1320 */

+ /* 1321 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFnstsw, 0x00, 1, 734, NACL_OPCODE_NULL_OFFSET },

- /* 1321 */

+ /* 1322 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomip, 0x00, 2, 650, NACL_OPCODE_NULL_OFFSET },

- /* 1322 */

+ /* 1323 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomip, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1323 */

+ /* 1324 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomip, 0x00, 2, 654, NACL_OPCODE_NULL_OFFSET },

- /* 1324 */

+ /* 1325 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomip, 0x00, 2, 656, NACL_OPCODE_NULL_OFFSET },

- /* 1325 */

+ /* 1326 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomip, 0x00, 2, 658, NACL_OPCODE_NULL_OFFSET },

- /* 1326 */

+ /* 1327 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomip, 0x00, 2, 660, NACL_OPCODE_NULL_OFFSET },

- /* 1327 */

+ /* 1328 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomip, 0x00, 2, 662, NACL_OPCODE_NULL_OFFSET },

- /* 1328 */

+ /* 1329 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFucomip, 0x00, 2, 664, NACL_OPCODE_NULL_OFFSET },

- /* 1329 */

+ /* 1330 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomip, 0x00, 2, 650, NACL_OPCODE_NULL_OFFSET },

- /* 1330 */

+ /* 1331 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomip, 0x00, 2, 652, NACL_OPCODE_NULL_OFFSET },

- /* 1331 */

+ /* 1332 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomip, 0x00, 2, 654, NACL_OPCODE_NULL_OFFSET },

- /* 1332 */

+ /* 1333 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomip, 0x00, 2, 656, NACL_OPCODE_NULL_OFFSET },

- /* 1333 */

+ /* 1334 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomip, 0x00, 2, 658, NACL_OPCODE_NULL_OFFSET },

- /* 1334 */

+ /* 1335 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomip, 0x00, 2, 660, NACL_OPCODE_NULL_OFFSET },

- /* 1335 */

+ /* 1336 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomip, 0x00, 2, 662, NACL_OPCODE_NULL_OFFSET },

- /* 1336 */

+ /* 1337 */

{ NACLi_X87,

NACL_EMPTY_IFLAGS,

InstFcomip, 0x00, 2, 664, NACL_OPCODE_NULL_OFFSET },

- /* 1337 */

+ /* 1338 */

{ NACLi_386,

NACL_EMPTY_IFLAGS,

InstUd2, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 1338 */

+ /* 1339 */

{ NACLi_386,

NACL_EMPTY_IFLAGS,

InstNop, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

- /* 1339 */

+ /* 1340 */

{ NACLi_386,

NACL_EMPTY_IFLAGS,

InstPause, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET },

@@ -6199,40 +6203,40 @@

/* 890 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 900 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 910 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 920 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 743, 722, 722, 722, 722, 744, 722, 722,

- /* 930 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 745, 722, 722, 722, 722, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 920 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 743, 722, 722, 722, 744, 745, 722, 722,

+ /* 930 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 746, 722, 722, 722, 722, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 940 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 722, 722, 722, 722,

- /* 950 */ 722, 722, 746, 722, 722, 722, 722, 722, 722, 722,

- /* 960 */ 722, 722, 722, 722, 722, 722, 722, 722, 747, 722,

+ /* 950 */ 722, 722, 747, 722, 722, 722, 722, 722, 722, 722,

+ /* 960 */ 722, 722, 722, 722, 722, 722, 722, 722, 748, 722,

/* 970 */ 722, 722, 722, 722, 722, 722, 722, 722, 722, 722,

/* 980 */ 722, 722, 722, 722, 722, 722, 722, 722, 722, 722,

- /* 990 */ 722, 722, 722, 722, NACL_OPCODE_NULL_OFFSET, 748, 749, 750, 751, 752,

- /* 1000 */ 753, 754, 755, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 756,

- /* 1020 */ 757, 758, 759, 760, 761, 762, 763, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 990 */ 722, 722, 722, 722, NACL_OPCODE_NULL_OFFSET, 749, 750, 751, 752, 753,

+ /* 1000 */ 754, 755, 756, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 757,

+ /* 1020 */ 758, 759, 760, 761, 762, 763, 764, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1030 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1040 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1050 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 764,

- /* 1060 */ 765, 766, 766, 767, 768, 769, 770, 771, 772, 773,

- /* 1070 */ 774, 775, 776, 777, 778, 779, 780, 781, 782, 783,

- /* 1080 */ 784, 785, 786, 787, 788, 789, 790, 791, 792, 794,

- /* 1090 */ 795, 796, 804, 811, 819, 820, 821, 822, 766, 824,

- /* 1100 */ 825, 766, 766, 826, 827, 829, 830, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1050 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 765,

+ /* 1060 */ 766, 767, 767, 768, 769, 770, 771, 772, 773, 774,

+ /* 1070 */ 775, 776, 777, 778, 779, 780, 781, 782, 783, 784,

+ /* 1080 */ 785, 786, 787, 788, 789, 790, 791, 792, 793, 795,

+ /* 1090 */ 796, 797, 805, 812, 820, 821, 822, 823, 767, 825,

+ /* 1100 */ 826, 767, 767, 827, 828, 830, 831, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1110 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1120 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1130 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1140 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1150 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 766, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1150 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 767, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1160 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1170 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 831, 766, 832, 833, 834, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1180 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 835, 836, 837,

- /* 1190 */ 838, 839, 840, 841, 842, 843, 844, 845, 846, 847,

- /* 1200 */ 848, 849, 850, 851, 852, 853, 854, 855, 856, 857,

- /* 1210 */ 858, 859, 860, 861, 862, 863, 864, 865, 866, 766,

- /* 1220 */ 867, 868, 869, 870, 871, 872, 873, 874, 875, 876,

- /* 1230 */ 877, 878, 879, 880, 766, NACL_OPCODE_NULL_OFFSET, 881, 882, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1170 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 832, 767, 833, 834, 835, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1180 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 836, 837, 838,

+ /* 1190 */ 839, 840, 841, 842, 843, 844, 845, 846, 847, 848,

+ /* 1200 */ 849, 850, 851, 852, 853, 854, 855, 856, 857, 858,

+ /* 1210 */ 859, 860, 861, 862, 863, 864, 865, 866, 867, 767,

+ /* 1220 */ 868, 869, 870, 871, 872, 873, 874, 875, 876, 877,

+ /* 1230 */ 878, 879, 880, 881, 767, NACL_OPCODE_NULL_OFFSET, 882, 883, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1240 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1250 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 883, 884, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1250 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 884, 885, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1260 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1270 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1280 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

@@ -6243,15 +6247,15 @@

/* 1330 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1340 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1350 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1360 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 885, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 886, NACL_OPCODE_NULL_OFFSET, 887, NACL_OPCODE_NULL_OFFSET,

- /* 1370 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 888, NACL_OPCODE_NULL_OFFSET, 889, 890, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 891, NACL_OPCODE_NULL_OFFSET,

- /* 1380 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 892, NACL_OPCODE_NULL_OFFSET, 893, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 894, NACL_OPCODE_NULL_OFFSET,

- /* 1390 */ 895, 896, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 897, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 898, NACL_OPCODE_NULL_OFFSET,

- /* 1400 */ 899, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 900, NACL_OPCODE_NULL_OFFSET, 901, 902, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1410 */ NACL_OPCODE_NULL_OFFSET, 903, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 904, NACL_OPCODE_NULL_OFFSET, 905, 906, 907,

- /* 1420 */ 908, 909, 910, 911, 912, 913, 914, 915, 916, 7,

+ /* 1360 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 886, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 887, NACL_OPCODE_NULL_OFFSET, 888, NACL_OPCODE_NULL_OFFSET,

+ /* 1370 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 889, NACL_OPCODE_NULL_OFFSET, 890, 891, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 892, NACL_OPCODE_NULL_OFFSET,

+ /* 1380 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 893, NACL_OPCODE_NULL_OFFSET, 894, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 895, NACL_OPCODE_NULL_OFFSET,

+ /* 1390 */ 896, 897, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 898, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 899, NACL_OPCODE_NULL_OFFSET,

+ /* 1400 */ 900, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 901, NACL_OPCODE_NULL_OFFSET, 902, 903, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1410 */ NACL_OPCODE_NULL_OFFSET, 904, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 905, NACL_OPCODE_NULL_OFFSET, 906, 907, 908,

+ /* 1420 */ 909, 910, 911, 912, 913, 914, 915, 916, 917, 7,

/* 1430 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

- /* 1440 */ 7, 7, 7, 7, 7, 917, 918, 919, 7, 7,

+ /* 1440 */ 7, 7, 7, 7, 7, 918, 919, 920, 7, 7,

/* 1450 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

/* 1460 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

/* 1470 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

@@ -6272,95 +6276,95 @@

/* 1620 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

/* 1630 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

/* 1640 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

- /* 1650 */ 7, 7, 7, 7, 7, 7, 7, 920, 921, 7,

+ /* 1650 */ 7, 7, 7, 7, 7, 7, 7, 921, 922, 7,

/* 1660 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

- /* 1670 */ 7, 7, 7, 922, 923, 924, 925, 926, 927, 928,

- /* 1680 */ 929, 930, 931, 932, 933, 766, 766, 766, 766, 934,

- /* 1690 */ 766, 766, 766, 935, 936, 766, 937, 766, 766, 766,

- /* 1700 */ 766, 938, 939, 940, 766, 941, 942, 943, 944, 945,

- /* 1710 */ 946, 766, 766, 947, 948, 949, 950, 766, 766, 766,

- /* 1720 */ 766, 951, 952, 953, 954, 955, 956, 766, 957, 958,

- /* 1730 */ 959, 960, 961, 962, 963, 964, 965, 966, 967, 766,

- /* 1740 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1750 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1760 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1770 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1780 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1790 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1800 */ 766, 968, 969, 766, 766, 766, 766, 766, 766, 766,

- /* 1810 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1820 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1830 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1840 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1850 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1860 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1870 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1880 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1890 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1900 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, 766,

- /* 1910 */ 766, 766, 766, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 766, 766, 766, 766, 766,

- /* 1920 */ 766, 766, 766, 766, 766, 766, 766, 766, 766, NACL_OPCODE_NULL_OFFSET,

- /* 1930 */ 970, 971, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 972, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 973, 974, 975,

- /* 1940 */ 976, 977, 978, 979, 980, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 981,

- /* 1950 */ 982, 984, 985, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1960 */ NACL_OPCODE_NULL_OFFSET, 986, 987, 989, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1670 */ 7, 7, 7, 923, 924, 925, 926, 927, 928, 929,

+ /* 1680 */ 930, 931, 932, 933, 934, 767, 767, 767, 767, 935,

+ /* 1690 */ 767, 767, 767, 936, 937, 767, 938, 767, 767, 767,

+ /* 1700 */ 767, 939, 940, 941, 767, 942, 943, 944, 945, 946,

+ /* 1710 */ 947, 767, 767, 948, 949, 950, 951, 767, 767, 767,

+ /* 1720 */ 767, 952, 953, 954, 955, 956, 957, 767, 958, 959,

+ /* 1730 */ 960, 961, 962, 963, 964, 965, 966, 967, 968, 767,

+ /* 1740 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1750 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1760 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1770 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1780 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1790 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1800 */ 767, 969, 970, 767, 767, 767, 767, 767, 767, 767,

+ /* 1810 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1820 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1830 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1840 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1850 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1860 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1870 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1880 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1890 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1900 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, 767,

+ /* 1910 */ 767, 767, 767, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 767, 767, 767, 767, 767,

+ /* 1920 */ 767, 767, 767, 767, 767, 767, 767, 767, 767, NACL_OPCODE_NULL_OFFSET,

+ /* 1930 */ 971, 972, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 973, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 974, 975, 976,

+ /* 1940 */ 977, 978, 979, 980, 981, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 982,

+ /* 1950 */ 983, 985, 986, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1960 */ NACL_OPCODE_NULL_OFFSET, 987, 988, 990, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1970 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 1980 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 1990 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 990, 991, 992, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

+ /* 1990 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 991, 992, 993, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 2000 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

/* 2010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET,

- /* 2020 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 993, 994, 995, 996, NACL_OPCODE_NULL_OFFSET,

- /* 2030 */ NACL_OPCODE_NULL_OFFSET, 997, 998, 999, 1000, 1001, 1002, 1003, 1004, 1005,

- /* 2040 */ 1006, 1007, 1008, 1009, 1010, 1011, 1012, 1013, 1014, 1015,

- /* 2050 */ 1016, 1017, 1018, 1019, 1020, 1021, 1022, 1023, 1024, 1025,

- /* 2060 */ 1026, 1027, 1028, 1029, 1030, 1031, 1032, 1033, 1034, 1035,

- /* 2070 */ 1036, 1037, 1038, 1039, 1040, 1041, 1042, 1043, 1044, 1045,

- /* 2080 */ 1046, 1047, 1048, 1049, 1050, 1051, 1052, 1053, 1054, 1055,

- /* 2090 */ 1056, 1057, 1058, 1059, 1060, NACL_OPCODE_NULL_OFFSET, 1061, 1062, 1063, 1064,

- /* 2100 */ 1065, 1066, 1067, 1068, 1069, 1070, 1071, 1072, 1073, 1074,

- /* 2110 */ 1075, 1076, 1077, 7, 7, 7, 7, 7, 7, 7,

- /* 2120 */ 7, 7, 7, 7, 7, 7, 7, 7, 1078, 1079,

- /* 2130 */ 7, 7, 1080, 1081, 7, 7, 1082, 1083, 1084, 1085,

- /* 2140 */ 1086, 1087, 1088, 7, 1089, 1090, 1091, 1092, 1093, 1094,

- /* 2150 */ 1095, 1096, 1097, 1098, 1099, 1100, 1101, 1102, 1103, 1104,

- /* 2160 */ NACL_OPCODE_NULL_OFFSET, 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113,

- /* 2170 */ 1114, 1115, 1116, 1117, 1118, 1119, 1120, 1121, 1122, 1123,

- /* 2180 */ 1124, 1125, 1126, 1127, 1128, 1129, 1130, 1131, 1132, 1133,

- /* 2190 */ 1134, 1135, 1136, 7, 7, 7, 7, 7, 7, 7,

- /* 2200 */ 7, 7, 1137, 7, 7, 7, 7, 7, 7, 7,

+ /* 2020 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 994, 995, 996, 997, NACL_OPCODE_NULL_OFFSET,

+ /* 2030 */ NACL_OPCODE_NULL_OFFSET, 998, 999, 1000, 1001, 1002, 1003, 1004, 1005, 1006,

+ /* 2040 */ 1007, 1008, 1009, 1010, 1011, 1012, 1013, 1014, 1015, 1016,

+ /* 2050 */ 1017, 1018, 1019, 1020, 1021, 1022, 1023, 1024, 1025, 1026,

+ /* 2060 */ 1027, 1028, 1029, 1030, 1031, 1032, 1033, 1034, 1035, 1036,

+ /* 2070 */ 1037, 1038, 1039, 1040, 1041, 1042, 1043, 1044, 1045, 1046,

+ /* 2080 */ 1047, 1048, 1049, 1050, 1051, 1052, 1053, 1054, 1055, 1056,

+ /* 2090 */ 1057, 1058, 1059, 1060, 1061, NACL_OPCODE_NULL_OFFSET, 1062, 1063, 1064, 1065,

+ /* 2100 */ 1066, 1067, 1068, 1069, 1070, 1071, 1072, 1073, 1074, 1075,

+ /* 2110 */ 1076, 1077, 1078, 7, 7, 7, 7, 7, 7, 7,

+ /* 2120 */ 7, 7, 7, 7, 7, 7, 7, 7, 1079, 1080,

+ /* 2130 */ 7, 7, 1081, 1082, 7, 7, 1083, 1084, 1085, 1086,

+ /* 2140 */ 1087, 1088, 1089, 7, 1090, 1091, 1092, 1093, 1094, 1095,

+ /* 2150 */ 1096, 1097, 1098, 1099, 1100, 1101, 1102, 1103, 1104, 1105,

+ /* 2160 */ NACL_OPCODE_NULL_OFFSET, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113, 1114,

+ /* 2170 */ 1115, 1116, 1117, 1118, 1119, 1120, 1121, 1122, 1123, 1124,

+ /* 2180 */ 1125, 1126, 1127, 1128, 1129, 1130, 1131, 1132, 1133, 1134,

+ /* 2190 */ 1135, 1136, 1137, 7, 7, 7, 7, 7, 7, 7,

+ /* 2200 */ 7, 7, 1138, 7, 7, 7, 7, 7, 7, 7,

/* 2210 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

- /* 2220 */ 7, 7, 7, 7, 7, NACL_OPCODE_NULL_OFFSET, 1138, 1139, 1140, 1141,

- /* 2230 */ 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149, 1150, 1151,

- /* 2240 */ 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1161,

- /* 2250 */ 1162, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 7, 7,

- /* 2260 */ 1170, 1171, 7, 7, 7, 7, 1172, 1173, 1174, 1175,

- /* 2270 */ 1176, 1177, 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185,

- /* 2280 */ 1186, 1187, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 997, 1188, 1189, 1190, 1191, 1192,

- /* 2290 */ 1193, 1194, 1005, 1195, 1196, 1197, 1198, 1199, 1200, 1201,

+ /* 2220 */ 7, 7, 7, 7, 7, NACL_OPCODE_NULL_OFFSET, 1139, 1140, 1141, 1142,

+ /* 2230 */ 1143, 1144, 1145, 1146, 1147, 1148, 1149, 1150, 1151, 1152,

+ /* 2240 */ 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1161, 1162,

+ /* 2250 */ 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 7, 7,

+ /* 2260 */ 1171, 1172, 7, 7, 7, 7, 1173, 1174, 1175, 1176,

+ /* 2270 */ 1177, 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186,

+ /* 2280 */ 1187, 1188, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 998, 1189, 1190, 1191, 1192, 1193,

+ /* 2290 */ 1194, 1195, 1006, 1196, 1197, 1198, 1199, 1200, 1201, 1202,

/* 2300 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

- /* 2310 */ 7, 7, 7, 7, 7, 7, 1037, 1202, 1203, 1204,

- /* 2320 */ 1205, 1206, 1207, 1208, 1029, 1209, 1210, 1211, 1212, 1213,

- /* 2330 */ 1214, 1215, 1053, 1216, 1217, 1218, 1219, 1220, 1221, 1222,

- /* 2340 */ 1045, 1223, 1224, 1225, 1226, 1227, 1228, 1229, NACL_OPCODE_NULL_OFFSET, 1230,

- /* 2350 */ 1231, 1232, 1233, 1234, 1235, 1236, 1237, 7, 7, 7,

- /* 2360 */ 7, 7, 7, 7, 7, 1238, 1239, 1240, 1241, 1242,

- /* 2370 */ 1243, 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251, 1252,

- /* 2380 */ 1253, 1254, 1255, 1256, 1257, 1258, 1259, 1260, 1261, 1262,

- /* 2390 */ 1263, 1264, 1265, 1266, 1267, 1268, 1269, 7, 7, 7,

+ /* 2310 */ 7, 7, 7, 7, 7, 7, 1038, 1203, 1204, 1205,

+ /* 2320 */ 1206, 1207, 1208, 1209, 1030, 1210, 1211, 1212, 1213, 1214,

+ /* 2330 */ 1215, 1216, 1054, 1217, 1218, 1219, 1220, 1221, 1222, 1223,

+ /* 2340 */ 1046, 1224, 1225, 1226, 1227, 1228, 1229, 1230, NACL_OPCODE_NULL_OFFSET, 1231,

+ /* 2350 */ 1232, 1233, 1234, 1235, 1236, 1237, 1238, 7, 7, 7,

+ /* 2360 */ 7, 7, 7, 7, 7, 1239, 1240, 1241, 1242, 1243,

+ /* 2370 */ 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251, 1252, 1253,

+ /* 2380 */ 1254, 1255, 1256, 1257, 1258, 1259, 1260, 1261, 1262, 1263,

+ /* 2390 */ 1264, 1265, 1266, 1267, 1268, 1269, 1270, 7, 7, 7,

/* 2400 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,

- /* 2410 */ 7, 7, 7, NACL_OPCODE_NULL_OFFSET, 1270, 1271, 1272, 1273, 1274, 1275,

- /* 2420 */ 1276, 1277, 1278, 1279, 1280, 1281, 1282, 1283, 1284, 1285,

- /* 2430 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 1286,

- /* 2440 */ 7, 7, 7, 7, 7, 7, 1287, 1288, 1289, 1290,

- /* 2450 */ 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300,

- /* 2460 */ 1301, 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310,

- /* 2470 */ 1311, 1312, 1313, 1314, 1315, 1316, 1317, 1318, NACL_OPCODE_NULL_OFFSET, 1319,

- /* 2480 */ 1319, 1319, 1319, 1319, 1319, 1319, 1319, 1319, 1319, 1319,

- /* 2490 */ 1319, 1319, 1319, 1319, 1319, 1319, 1319, 1319, 1319, 1319,

- /* 2500 */ 1319, 1319, 1319, 1319, 1319, 1319, 1319, 1319, 1319, 1319,

- /* 2510 */ 1319, 1320, 7, 7, 7, 7, 7, 7, 7, 1321,

- /* 2520 */ 1322, 1323, 1324, 1325, 1326, 1327, 1328, 1329, 1330, 1331,

- /* 2530 */ 1332, 1333, 1334, 1335, 1336, 7, 7, 7, 7, 7,

+ /* 2410 */ 7, 7, 7, NACL_OPCODE_NULL_OFFSET, 1271, 1272, 1273, 1274, 1275, 1276,

+ /* 2420 */ 1277, 1278, 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286,

+ /* 2430 */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 1287,

+ /* 2440 */ 7, 7, 7, 7, 7, 7, 1288, 1289, 1290, 1291,

+ /* 2450 */ 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301,

+ /* 2460 */ 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311,

+ /* 2470 */ 1312, 1313, 1314, 1315, 1316, 1317, 1318, 1319, NACL_OPCODE_NULL_OFFSET, 1320,

+ /* 2480 */ 1320, 1320, 1320, 1320, 1320, 1320, 1320, 1320, 1320, 1320,

+ /* 2490 */ 1320, 1320, 1320, 1320, 1320, 1320, 1320, 1320, 1320, 1320,

+ /* 2500 */ 1320, 1320, 1320, 1320, 1320, 1320, 1320, 1320, 1320, 1320,

+ /* 2510 */ 1320, 1321, 7, 7, 7, 7, 7, 7, 7, 1322,

+ /* 2520 */ 1323, 1324, 1325, 1326, 1327, 1328, 1329, 1330, 1331, 1332,

+ /* 2530 */ 1333, 1334, 1335, 1336, 1337, 7, 7, 7, 7, 7,

/* 2540 */ 7, 7, 7, };

static const NaClPrefixOpcodeSelector g_PrefixOpcode[NaClInstPrefixEnumSize] = {

@@ -6429,7 +6433,7 @@

/* 1 */

{ 0x0b,

- 1337,

+ 1338,

NULL,

g_OpcodeSeq + 2,

@@ -6441,7 +6445,7 @@

/* 3 */

{ 0x00,

- 1338,

+ 1339,

NULL,

g_OpcodeSeq + 4,

@@ -6453,7 +6457,7 @@

/* 5 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6471,7 +6475,7 @@

/* 8 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6501,7 +6505,7 @@

/* 13 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6537,7 +6541,7 @@

/* 19 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6573,7 +6577,7 @@

/* 25 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6609,7 +6613,7 @@

/* 31 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6663,7 +6667,7 @@

/* 40 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6723,7 +6727,7 @@

/* 50 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6783,7 +6787,7 @@

/* 60 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6843,7 +6847,7 @@

/* 70 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6903,7 +6907,7 @@

/* 80 */

{ 0x00,

- 1338,

+ 1339,

NULL,

@@ -6963,19 +6967,19 @@

/* 90 */

{ 0x00,

- 1338,

+ 1339,

NULL,

/* 91 */

{ 0x90,

- 1338,

+ 1339,

NULL,

/* 92 */

{ 0x90,

- 1338,

+ 1339,

NULL,

g_OpcodeSeq + 93,

@@ -6987,7 +6991,7 @@

/* 94 */

{ 0x90,

- 1339,

+ 1340,

NULL,