OLD | NEW |
1 /* | 1 /* |
2 * THIS FILE IS AUTO-GENERATED. DO NOT EDIT. | 2 * THIS FILE IS AUTO-GENERATED. DO NOT EDIT. |
3 * Compiled for x86-32 bit mode. | 3 * Compiled for x86-32 bit mode. |
4 * | 4 * |
5 * You must include ncopcode_desc.h before this file. | 5 * You must include ncopcode_desc.h before this file. |
6 */ | 6 */ |
7 | 7 |
8 static const NaClOp g_Operands[722] = { | 8 static const NaClOp g_Operands[722] = { |
9 /* 0 */ { E_Operand, NACL_OPFLAG(OpUse) | NACL_OPFLAG(OpSet), "$Eb" }, | 9 /* 0 */ { E_Operand, NACL_OPFLAG(OpUse) | NACL_OPFLAG(OpSet), "$Eb" }, |
10 /* 1 */ { G_Operand, NACL_OPFLAG(OpUse), "$Gb" }, | 10 /* 1 */ { G_Operand, NACL_OPFLAG(OpUse), "$Gb" }, |
(...skipping 712 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
723 /* 714 */ { RegST0, NACL_OPFLAG(OpUse), "%st0" }, | 723 /* 714 */ { RegST0, NACL_OPFLAG(OpUse), "%st0" }, |
724 /* 715 */ { RegST5, NACL_OPFLAG(OpSet), "%st5" }, | 724 /* 715 */ { RegST5, NACL_OPFLAG(OpSet), "%st5" }, |
725 /* 716 */ { RegST0, NACL_OPFLAG(OpUse), "%st0" }, | 725 /* 716 */ { RegST0, NACL_OPFLAG(OpUse), "%st0" }, |
726 /* 717 */ { RegST6, NACL_OPFLAG(OpSet), "%st6" }, | 726 /* 717 */ { RegST6, NACL_OPFLAG(OpSet), "%st6" }, |
727 /* 718 */ { RegST0, NACL_OPFLAG(OpUse), "%st0" }, | 727 /* 718 */ { RegST0, NACL_OPFLAG(OpUse), "%st0" }, |
728 /* 719 */ { RegST7, NACL_OPFLAG(OpSet), "%st7" }, | 728 /* 719 */ { RegST7, NACL_OPFLAG(OpSet), "%st7" }, |
729 /* 720 */ { RegST0, NACL_OPFLAG(OpUse), "%st0" }, | 729 /* 720 */ { RegST0, NACL_OPFLAG(OpUse), "%st0" }, |
730 /* 721 */ { RegAX, NACL_OPFLAG(OpSet), "%ax" }, | 730 /* 721 */ { RegAX, NACL_OPFLAG(OpSet), "%ax" }, |
731 }; | 731 }; |
732 | 732 |
733 static const NaClInst g_Opcodes[1366] = { | 733 static const NaClInst g_Opcodes[1367] = { |
734 /* 0 */ | 734 /* 0 */ |
735 { NACLi_INVALID, | 735 { NACLi_INVALID, |
736 NACL_EMPTY_IFLAGS, | 736 NACL_EMPTY_IFLAGS, |
737 InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 737 InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
738 /* 1 */ | 738 /* 1 */ |
739 { NACLi_386, | 739 { NACLi_386, |
740 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeLockable) | NACL_IFLAG(Operan
dSize_b), | 740 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeLockable) | NACL_IFLAG(Operan
dSize_b), |
741 InstAdd, 0x00, 2, 0, NACL_OPCODE_NULL_OFFSET }, | 741 InstAdd, 0x00, 2, 0, NACL_OPCODE_NULL_OFFSET }, |
742 /* 2 */ | 742 /* 2 */ |
743 { NACLi_386, | 743 { NACLi_386, |
(...skipping 3077 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
3821 InstMovq, 0x00, 2, 444, NACL_OPCODE_NULL_OFFSET }, | 3821 InstMovq, 0x00, 2, 444, NACL_OPCODE_NULL_OFFSET }, |
3822 /* 772 */ | 3822 /* 772 */ |
3823 { NACLi_SSE2, | 3823 { NACLi_SSE2, |
3824 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep), | 3824 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep), |
3825 InstMovdqu, 0x00, 2, 482, NACL_OPCODE_NULL_OFFSET }, | 3825 InstMovdqu, 0x00, 2, 482, NACL_OPCODE_NULL_OFFSET }, |
3826 /* 773 */ | 3826 /* 773 */ |
3827 { NACLi_POPCNT, | 3827 { NACLi_POPCNT, |
3828 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), | 3828 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), |
3829 InstPopcnt, 0x00, 2, 61, NACL_OPCODE_NULL_OFFSET }, | 3829 InstPopcnt, 0x00, 2, 61, NACL_OPCODE_NULL_OFFSET }, |
3830 /* 774 */ | 3830 /* 774 */ |
3831 { NACLi_LZCNT, | 3831 { NACLi_386, |
| 3832 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), |
| 3833 InstTzcnt, 0x00, 2, 61, NACL_OPCODE_NULL_OFFSET }, |
| 3834 /* 775 */ |
| 3835 { NACLi_386, |
3832 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), | 3836 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), |
3833 InstLzcnt, 0x00, 2, 61, NACL_OPCODE_NULL_OFFSET }, | 3837 InstLzcnt, 0x00, 2, 61, NACL_OPCODE_NULL_OFFSET }, |
3834 /* 775 */ | 3838 /* 776 */ |
3835 { NACLi_SSE, | 3839 { NACLi_SSE, |
3836 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsRep), | 3840 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsRep), |
3837 InstCmpss, 0x00, 3, 484, NACL_OPCODE_NULL_OFFSET }, | 3841 InstCmpss, 0x00, 3, 484, NACL_OPCODE_NULL_OFFSET }, |
3838 /* 776 */ | 3842 /* 777 */ |
3839 { NACLi_SSE2, | 3843 { NACLi_SSE2, |
3840 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsRep), | 3844 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsRep), |
3841 InstMovq2dq, 0x00, 2, 487, NACL_OPCODE_NULL_OFFSET }, | 3845 InstMovq2dq, 0x00, 2, 487, NACL_OPCODE_NULL_OFFSET }, |
3842 /* 777 */ | 3846 /* 778 */ |
3843 { NACLi_SSE2, | 3847 { NACLi_SSE2, |
3844 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep), | 3848 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRep), |
3845 InstCvtdq2pd, 0x00, 2, 489, NACL_OPCODE_NULL_OFFSET }, | 3849 InstCvtdq2pd, 0x00, 2, 489, NACL_OPCODE_NULL_OFFSET }, |
3846 /* 778 */ | 3850 /* 779 */ |
3847 { NACLi_SSE2, | 3851 { NACLi_SSE2, |
3848 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3852 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3849 InstMovupd, 0x00, 2, 491, NACL_OPCODE_NULL_OFFSET }, | 3853 InstMovupd, 0x00, 2, 491, NACL_OPCODE_NULL_OFFSET }, |
3850 /* 779 */ | 3854 /* 780 */ |
3851 { NACLi_SSE2, | 3855 { NACLi_SSE2, |
3852 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3856 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3853 InstMovupd, 0x00, 2, 493, NACL_OPCODE_NULL_OFFSET }, | 3857 InstMovupd, 0x00, 2, 493, NACL_OPCODE_NULL_OFFSET }, |
3854 /* 780 */ | 3858 /* 781 */ |
3855 { NACLi_SSE2, | 3859 { NACLi_SSE2, |
3856 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 3860 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
3857 InstMovlpd, 0x00, 2, 495, NACL_OPCODE_NULL_OFFSET }, | 3861 InstMovlpd, 0x00, 2, 495, NACL_OPCODE_NULL_OFFSET }, |
3858 /* 781 */ | 3862 /* 782 */ |
3859 { NACLi_SSE2, | 3863 { NACLi_SSE2, |
3860 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 3864 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
3861 InstMovlpd, 0x00, 2, 436, NACL_OPCODE_NULL_OFFSET }, | 3865 InstMovlpd, 0x00, 2, 436, NACL_OPCODE_NULL_OFFSET }, |
3862 /* 782 */ | 3866 /* 783 */ |
3863 { NACLi_SSE2, | 3867 { NACLi_SSE2, |
3864 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3868 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3865 InstUnpcklpd, 0x00, 2, 497, NACL_OPCODE_NULL_OFFSET }, | 3869 InstUnpcklpd, 0x00, 2, 497, NACL_OPCODE_NULL_OFFSET }, |
3866 /* 783 */ | 3870 /* 784 */ |
3867 { NACLi_SSE2, | 3871 { NACLi_SSE2, |
3868 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3872 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3869 InstUnpckhpd, 0x00, 2, 497, NACL_OPCODE_NULL_OFFSET }, | 3873 InstUnpckhpd, 0x00, 2, 497, NACL_OPCODE_NULL_OFFSET }, |
3870 /* 784 */ | 3874 /* 785 */ |
3871 { NACLi_SSE2, | 3875 { NACLi_SSE2, |
3872 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 3876 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
3873 InstMovhpd, 0x00, 2, 495, NACL_OPCODE_NULL_OFFSET }, | 3877 InstMovhpd, 0x00, 2, 495, NACL_OPCODE_NULL_OFFSET }, |
3874 /* 785 */ | 3878 /* 786 */ |
3875 { NACLi_SSE2, | 3879 { NACLi_SSE2, |
3876 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 3880 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
3877 InstMovhpd, 0x00, 2, 436, NACL_OPCODE_NULL_OFFSET }, | 3881 InstMovhpd, 0x00, 2, 436, NACL_OPCODE_NULL_OFFSET }, |
3878 /* 786 */ | 3882 /* 787 */ |
3879 { NACLi_SSE2, | 3883 { NACLi_SSE2, |
3880 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3884 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3881 InstMovapd, 0x00, 2, 491, NACL_OPCODE_NULL_OFFSET }, | 3885 InstMovapd, 0x00, 2, 491, NACL_OPCODE_NULL_OFFSET }, |
3882 /* 787 */ | 3886 /* 788 */ |
3883 { NACLi_SSE2, | 3887 { NACLi_SSE2, |
3884 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3888 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3885 InstMovapd, 0x00, 2, 493, NACL_OPCODE_NULL_OFFSET }, | 3889 InstMovapd, 0x00, 2, 493, NACL_OPCODE_NULL_OFFSET }, |
3886 /* 788 */ | 3890 /* 789 */ |
3887 { NACLi_SSE2, | 3891 { NACLi_SSE2, |
3888 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3892 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3889 InstCvtpi2pd, 0x00, 2, 499, NACL_OPCODE_NULL_OFFSET }, | 3893 InstCvtpi2pd, 0x00, 2, 499, NACL_OPCODE_NULL_OFFSET }, |
3890 /* 789 */ | 3894 /* 790 */ |
3891 { NACLi_SSE2, | 3895 { NACLi_SSE2, |
3892 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 3896 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
3893 InstMovntpd, 0x00, 2, 501, NACL_OPCODE_NULL_OFFSET }, | 3897 InstMovntpd, 0x00, 2, 501, NACL_OPCODE_NULL_OFFSET }, |
3894 /* 790 */ | 3898 /* 791 */ |
3895 { NACLi_SSE2, | 3899 { NACLi_SSE2, |
3896 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3900 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3897 InstCvttpd2pi, 0x00, 2, 503, NACL_OPCODE_NULL_OFFSET }, | 3901 InstCvttpd2pi, 0x00, 2, 503, NACL_OPCODE_NULL_OFFSET }, |
3898 /* 791 */ | 3902 /* 792 */ |
3899 { NACLi_SSE2, | 3903 { NACLi_SSE2, |
3900 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3904 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3901 InstCvtpd2pi, 0x00, 2, 503, NACL_OPCODE_NULL_OFFSET }, | 3905 InstCvtpd2pi, 0x00, 2, 503, NACL_OPCODE_NULL_OFFSET }, |
3902 /* 792 */ | 3906 /* 793 */ |
3903 { NACLi_SSE2, | 3907 { NACLi_SSE2, |
3904 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3908 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3905 InstUcomisd, 0x00, 2, 505, NACL_OPCODE_NULL_OFFSET }, | 3909 InstUcomisd, 0x00, 2, 505, NACL_OPCODE_NULL_OFFSET }, |
3906 /* 793 */ | 3910 /* 794 */ |
3907 { NACLi_SSE2, | 3911 { NACLi_SSE2, |
3908 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3912 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3909 InstComisd, 0x00, 2, 507, NACL_OPCODE_NULL_OFFSET }, | 3913 InstComisd, 0x00, 2, 507, NACL_OPCODE_NULL_OFFSET }, |
3910 /* 794 */ | 3914 /* 795 */ |
3911 { NACLi_SSE2, | 3915 { NACLi_SSE2, |
3912 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16), | 3916 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16), |
3913 InstMovmskpd, 0x00, 2, 509, NACL_OPCODE_NULL_OFFSET }, | 3917 InstMovmskpd, 0x00, 2, 509, NACL_OPCODE_NULL_OFFSET }, |
3914 /* 795 */ | 3918 /* 796 */ |
3915 { NACLi_SSE2, | 3919 { NACLi_SSE2, |
3916 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3920 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3917 InstSqrtpd, 0x00, 2, 511, NACL_OPCODE_NULL_OFFSET }, | 3921 InstSqrtpd, 0x00, 2, 511, NACL_OPCODE_NULL_OFFSET }, |
3918 /* 796 */ | 3922 /* 797 */ |
3919 { NACLi_INVALID, | 3923 { NACLi_INVALID, |
3920 NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(
NaClIllegal), | 3924 NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(
NaClIllegal), |
3921 InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 3925 InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
3922 /* 797 */ | 3926 /* 798 */ |
3923 { NACLi_SSE2, | 3927 { NACLi_SSE2, |
3924 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3928 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3925 InstAndpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3929 InstAndpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3926 /* 798 */ | 3930 /* 799 */ |
3927 { NACLi_SSE2, | 3931 { NACLi_SSE2, |
3928 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3932 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3929 InstAndnpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3933 InstAndnpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3930 /* 799 */ | 3934 /* 800 */ |
3931 { NACLi_SSE2, | 3935 { NACLi_SSE2, |
3932 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3936 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3933 InstOrpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3937 InstOrpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3934 /* 800 */ | 3938 /* 801 */ |
3935 { NACLi_SSE2, | 3939 { NACLi_SSE2, |
3936 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3940 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3937 InstXorpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3941 InstXorpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3938 /* 801 */ | 3942 /* 802 */ |
3939 { NACLi_SSE2, | 3943 { NACLi_SSE2, |
3940 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3944 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3941 InstAddpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3945 InstAddpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3942 /* 802 */ | 3946 /* 803 */ |
3943 { NACLi_SSE2, | 3947 { NACLi_SSE2, |
3944 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3948 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3945 InstMulpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3949 InstMulpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3946 /* 803 */ | 3950 /* 804 */ |
3947 { NACLi_SSE2, | 3951 { NACLi_SSE2, |
3948 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3952 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3949 InstCvtpd2ps, 0x00, 2, 511, NACL_OPCODE_NULL_OFFSET }, | 3953 InstCvtpd2ps, 0x00, 2, 511, NACL_OPCODE_NULL_OFFSET }, |
3950 /* 804 */ | 3954 /* 805 */ |
3951 { NACLi_SSE2, | 3955 { NACLi_SSE2, |
3952 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3956 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3953 InstCvtps2dq, 0x00, 2, 478, NACL_OPCODE_NULL_OFFSET }, | 3957 InstCvtps2dq, 0x00, 2, 478, NACL_OPCODE_NULL_OFFSET }, |
3954 /* 805 */ | 3958 /* 806 */ |
3955 { NACLi_SSE2, | 3959 { NACLi_SSE2, |
3956 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3960 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3957 InstSubpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3961 InstSubpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3958 /* 806 */ | 3962 /* 807 */ |
3959 { NACLi_SSE2, | 3963 { NACLi_SSE2, |
3960 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3964 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3961 InstMinpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3965 InstMinpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3962 /* 807 */ | 3966 /* 808 */ |
3963 { NACLi_SSE2, | 3967 { NACLi_SSE2, |
3964 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3968 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3965 InstDivpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3969 InstDivpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3966 /* 808 */ | 3970 /* 809 */ |
3967 { NACLi_SSE2, | 3971 { NACLi_SSE2, |
3968 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3972 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3969 InstMaxpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 3973 InstMaxpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
3970 /* 809 */ | 3974 /* 810 */ |
3971 { NACLi_SSE2, | 3975 { NACLi_SSE2, |
3972 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3976 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3973 InstPunpcklbw, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, | 3977 InstPunpcklbw, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, |
3974 /* 810 */ | 3978 /* 811 */ |
3975 { NACLi_SSE2, | 3979 { NACLi_SSE2, |
3976 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3980 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3977 InstPunpcklwd, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, | 3981 InstPunpcklwd, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, |
3978 /* 811 */ | 3982 /* 812 */ |
3979 { NACLi_SSE2, | 3983 { NACLi_SSE2, |
3980 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3984 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3981 InstPunpckldq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, | 3985 InstPunpckldq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, |
3982 /* 812 */ | 3986 /* 813 */ |
3983 { NACLi_SSE2, | 3987 { NACLi_SSE2, |
3984 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3988 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3985 InstPacksswb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 3989 InstPacksswb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
3986 /* 813 */ | 3990 /* 814 */ |
3987 { NACLi_SSE2, | 3991 { NACLi_SSE2, |
3988 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3992 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3989 InstPcmpgtb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 3993 InstPcmpgtb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
3990 /* 814 */ | 3994 /* 815 */ |
3991 { NACLi_SSE2, | 3995 { NACLi_SSE2, |
3992 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 3996 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3993 InstPcmpgtw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 3997 InstPcmpgtw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
3994 /* 815 */ | 3998 /* 816 */ |
3995 { NACLi_SSE2, | 3999 { NACLi_SSE2, |
3996 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4000 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
3997 InstPcmpgtd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4001 InstPcmpgtd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
3998 /* 816 */ | 4002 /* 817 */ |
3999 { NACLi_SSE2, | 4003 { NACLi_SSE2, |
4000 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4004 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4001 InstPackuswb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4005 InstPackuswb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4002 /* 817 */ | 4006 /* 818 */ |
4003 { NACLi_SSE2, | 4007 { NACLi_SSE2, |
4004 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4008 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4005 InstPunpckhbw, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, | 4009 InstPunpckhbw, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, |
4006 /* 818 */ | 4010 /* 819 */ |
4007 { NACLi_SSE2, | 4011 { NACLi_SSE2, |
4008 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4012 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4009 InstPunpckhwd, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, | 4013 InstPunpckhwd, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, |
4010 /* 819 */ | 4014 /* 820 */ |
4011 { NACLi_SSE2, | 4015 { NACLi_SSE2, |
4012 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4016 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4013 InstPunpckhdq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, | 4017 InstPunpckhdq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, |
4014 /* 820 */ | 4018 /* 821 */ |
4015 { NACLi_SSE2, | 4019 { NACLi_SSE2, |
4016 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4020 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4017 InstPackssdw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4021 InstPackssdw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4018 /* 821 */ | 4022 /* 822 */ |
4019 { NACLi_SSE2, | 4023 { NACLi_SSE2, |
4020 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4024 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4021 InstPunpcklqdq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, | 4025 InstPunpcklqdq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, |
4022 /* 822 */ | 4026 /* 823 */ |
4023 { NACLi_SSE2, | 4027 { NACLi_SSE2, |
4024 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4028 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4025 InstPunpckhqdq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, | 4029 InstPunpckhqdq, 0x00, 2, 513, NACL_OPCODE_NULL_OFFSET }, |
4026 /* 823 */ | 4030 /* 824 */ |
4027 { NACLi_SSE2, | 4031 { NACLi_SSE2, |
4028 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4032 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4029 InstMovd, 0x00, 2, 517, NACL_OPCODE_NULL_OFFSET }, | 4033 InstMovd, 0x00, 2, 517, NACL_OPCODE_NULL_OFFSET }, |
4030 /* 824 */ | 4034 /* 825 */ |
4031 { NACLi_SSE2, | 4035 { NACLi_SSE2, |
4032 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4036 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4033 InstMovdqa, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET }, | 4037 InstMovdqa, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET }, |
4034 /* 825 */ | 4038 /* 826 */ |
4035 { NACLi_SSE2, | 4039 { NACLi_SSE2, |
4036 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4040 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4037 InstPshufd, 0x00, 3, 519, NACL_OPCODE_NULL_OFFSET }, | 4041 InstPshufd, 0x00, 3, 519, NACL_OPCODE_NULL_OFFSET }, |
4038 /* 826 */ | 4042 /* 827 */ |
4039 { NACLi_INVALID, | 4043 { NACLi_INVALID, |
4040 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4044 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4041 InstInvalid, 0x07, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 4045 InstInvalid, 0x07, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
4042 /* 827 */ | 4046 /* 828 */ |
4043 { NACLi_SSE2, | 4047 { NACLi_SSE2, |
4044 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | 4048 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
4045 InstPsllw, 0x06, 2, 522, 826 }, | 4049 InstPsllw, 0x06, 2, 522, 827 }, |
4046 /* 828 */ | 4050 /* 829 */ |
4047 { NACLi_INVALID, | 4051 { NACLi_INVALID, |
4048 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4052 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4049 InstInvalid, 0x05, 0, 0, 827 }, | 4053 InstInvalid, 0x05, 0, 0, 828 }, |
4050 /* 829 */ | 4054 /* 830 */ |
4051 { NACLi_SSE2, | 4055 { NACLi_SSE2, |
4052 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | 4056 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
4053 InstPsraw, 0x04, 2, 522, 828 }, | 4057 InstPsraw, 0x04, 2, 522, 829 }, |
4054 /* 830 */ | 4058 /* 831 */ |
4055 { NACLi_INVALID, | 4059 { NACLi_INVALID, |
4056 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4060 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4057 InstInvalid, 0x03, 0, 0, 829 }, | 4061 InstInvalid, 0x03, 0, 0, 830 }, |
4058 /* 831 */ | 4062 /* 832 */ |
4059 { NACLi_SSE2, | 4063 { NACLi_SSE2, |
4060 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | 4064 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
4061 InstPsrlw, 0x02, 2, 522, 830 }, | 4065 InstPsrlw, 0x02, 2, 522, 831 }, |
4062 /* 832 */ | |
4063 { NACLi_INVALID, | |
4064 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | |
4065 InstInvalid, 0x01, 0, 0, 831 }, | |
4066 /* 833 */ | 4066 /* 833 */ |
4067 { NACLi_INVALID, | 4067 { NACLi_INVALID, |
4068 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4068 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4069 InstInvalid, 0x00, 0, 0, 832 }, | 4069 InstInvalid, 0x01, 0, 0, 832 }, |
4070 /* 834 */ | 4070 /* 834 */ |
4071 { NACLi_SSE2, | |
4072 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | |
4073 InstPslld, 0x06, 2, 522, 826 }, | |
4074 /* 835 */ | |
4075 { NACLi_INVALID, | 4071 { NACLi_INVALID, |
4076 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4072 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4077 InstInvalid, 0x05, 0, 0, 834 }, | 4073 InstInvalid, 0x00, 0, 0, 833 }, |
| 4074 /* 835 */ |
| 4075 { NACLi_SSE2, |
| 4076 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
| 4077 InstPslld, 0x06, 2, 522, 827 }, |
4078 /* 836 */ | 4078 /* 836 */ |
4079 { NACLi_SSE2, | |
4080 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | |
4081 InstPsrad, 0x04, 2, 522, 835 }, | |
4082 /* 837 */ | |
4083 { NACLi_INVALID, | 4079 { NACLi_INVALID, |
4084 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4080 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4085 InstInvalid, 0x03, 0, 0, 836 }, | 4081 InstInvalid, 0x05, 0, 0, 835 }, |
| 4082 /* 837 */ |
| 4083 { NACLi_SSE2, |
| 4084 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
| 4085 InstPsrad, 0x04, 2, 522, 836 }, |
4086 /* 838 */ | 4086 /* 838 */ |
4087 { NACLi_SSE2, | |
4088 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | |
4089 InstPsrld, 0x02, 2, 522, 837 }, | |
4090 /* 839 */ | |
4091 { NACLi_INVALID, | 4087 { NACLi_INVALID, |
4092 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4088 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4093 InstInvalid, 0x01, 0, 0, 838 }, | 4089 InstInvalid, 0x03, 0, 0, 837 }, |
| 4090 /* 839 */ |
| 4091 { NACLi_SSE2, |
| 4092 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
| 4093 InstPsrld, 0x02, 2, 522, 838 }, |
4094 /* 840 */ | 4094 /* 840 */ |
4095 { NACLi_INVALID, | 4095 { NACLi_INVALID, |
4096 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4096 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4097 InstInvalid, 0x00, 0, 0, 839 }, | 4097 InstInvalid, 0x01, 0, 0, 839 }, |
4098 /* 841 */ | 4098 /* 841 */ |
| 4099 { NACLi_INVALID, |
| 4100 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
| 4101 InstInvalid, 0x00, 0, 0, 840 }, |
| 4102 /* 842 */ |
4099 { NACLi_SSE2, | 4103 { NACLi_SSE2, |
4100 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | 4104 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
4101 InstPslldq, 0x07, 2, 522, NACL_OPCODE_NULL_OFFSET }, | 4105 InstPslldq, 0x07, 2, 522, NACL_OPCODE_NULL_OFFSET }, |
4102 /* 842 */ | 4106 /* 843 */ |
4103 { NACLi_SSE2, | 4107 { NACLi_SSE2, |
4104 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | 4108 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
4105 InstPsllq, 0x06, 2, 522, 841 }, | 4109 InstPsllq, 0x06, 2, 522, 842 }, |
4106 /* 843 */ | |
4107 { NACLi_INVALID, | |
4108 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | |
4109 InstInvalid, 0x05, 0, 0, 842 }, | |
4110 /* 844 */ | 4110 /* 844 */ |
4111 { NACLi_INVALID, | 4111 { NACLi_INVALID, |
4112 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4112 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4113 InstInvalid, 0x04, 0, 0, 843 }, | 4113 InstInvalid, 0x05, 0, 0, 843 }, |
4114 /* 845 */ | 4114 /* 845 */ |
4115 { NACLi_SSE2, | |
4116 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | |
4117 InstPsrldq, 0x03, 2, 522, 844 }, | |
4118 /* 846 */ | |
4119 { NACLi_SSE2, | |
4120 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), | |
4121 InstPsrlq, 0x02, 2, 522, 845 }, | |
4122 /* 847 */ | |
4123 { NACLi_INVALID, | 4115 { NACLi_INVALID, |
4124 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4116 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4125 InstInvalid, 0x01, 0, 0, 846 }, | 4117 InstInvalid, 0x04, 0, 0, 844 }, |
| 4118 /* 846 */ |
| 4119 { NACLi_SSE2, |
| 4120 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
| 4121 InstPsrldq, 0x03, 2, 522, 845 }, |
| 4122 /* 847 */ |
| 4123 { NACLi_SSE2, |
| 4124 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUse
sModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_I
FLAG(SizeIgnoresData16), |
| 4125 InstPsrlq, 0x02, 2, 522, 846 }, |
4126 /* 848 */ | 4126 /* 848 */ |
4127 { NACLi_INVALID, | 4127 { NACLi_INVALID, |
4128 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4128 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4129 InstInvalid, 0x00, 0, 0, 847 }, | 4129 InstInvalid, 0x01, 0, 0, 847 }, |
4130 /* 849 */ | 4130 /* 849 */ |
| 4131 { NACLi_INVALID, |
| 4132 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
| 4133 InstInvalid, 0x00, 0, 0, 848 }, |
| 4134 /* 850 */ |
4131 { NACLi_SSE2, | 4135 { NACLi_SSE2, |
4132 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4136 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4133 InstPcmpeqb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4137 InstPcmpeqb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4134 /* 850 */ | 4138 /* 851 */ |
4135 { NACLi_SSE2, | 4139 { NACLi_SSE2, |
4136 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4140 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4137 InstPcmpeqw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4141 InstPcmpeqw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4138 /* 851 */ | 4142 /* 852 */ |
4139 { NACLi_SSE2, | 4143 { NACLi_SSE2, |
4140 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4144 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4141 InstPcmpeqd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4145 InstPcmpeqd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4142 /* 852 */ | 4146 /* 853 */ |
4143 { NACLi_INVALID, | 4147 { NACLi_INVALID, |
4144 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4148 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4145 InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 4149 InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
4146 /* 853 */ | 4150 /* 854 */ |
4147 { NACLi_SSE4A, | 4151 { NACLi_SSE4A, |
4148 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeH
asImmed_b) | NACL_IFLAG(OpcodeHasImmed2_b) | NACL_IFLAG(OpcodeAllowsData16) | NA
CL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4152 NACL_IFLAG(OpcodeInModRm) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeH
asImmed_b) | NACL_IFLAG(OpcodeHasImmed2_b) | NACL_IFLAG(OpcodeAllowsData16) | NA
CL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4149 InstExtrq, 0x00, 3, 524, 852 }, | 4153 InstExtrq, 0x00, 3, 524, 853 }, |
4150 /* 854 */ | 4154 /* 855 */ |
4151 { NACLi_SSE4A, | 4155 { NACLi_SSE4A, |
4152 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4156 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4153 InstExtrq, 0x00, 2, 451, NACL_OPCODE_NULL_OFFSET }, | 4157 InstExtrq, 0x00, 2, 451, NACL_OPCODE_NULL_OFFSET }, |
4154 /* 855 */ | 4158 /* 856 */ |
4155 { NACLi_SSE2, | 4159 { NACLi_SSE2, |
4156 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4160 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4157 InstHaddpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 4161 InstHaddpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
4158 /* 856 */ | 4162 /* 857 */ |
4159 { NACLi_SSE2, | 4163 { NACLi_SSE2, |
4160 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4164 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4161 InstHsubpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 4165 InstHsubpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
4162 /* 857 */ | 4166 /* 858 */ |
4163 { NACLi_SSE2, | 4167 { NACLi_SSE2, |
4164 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4168 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4165 InstMovd, 0x00, 2, 527, NACL_OPCODE_NULL_OFFSET }, | 4169 InstMovd, 0x00, 2, 527, NACL_OPCODE_NULL_OFFSET }, |
4166 /* 858 */ | 4170 /* 859 */ |
4167 { NACLi_SSE2, | 4171 { NACLi_SSE2, |
4168 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4172 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4169 InstMovdqa, 0x00, 2, 482, NACL_OPCODE_NULL_OFFSET }, | 4173 InstMovdqa, 0x00, 2, 482, NACL_OPCODE_NULL_OFFSET }, |
4170 /* 859 */ | 4174 /* 860 */ |
4171 { NACLi_SSE2, | 4175 { NACLi_SSE2, |
4172 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4176 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4173 InstCmppd, 0x00, 3, 529, NACL_OPCODE_NULL_OFFSET }, | 4177 InstCmppd, 0x00, 3, 529, NACL_OPCODE_NULL_OFFSET }, |
4174 /* 860 */ | 4178 /* 861 */ |
4175 { NACLi_SSE, | 4179 { NACLi_SSE, |
4176 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4180 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4177 InstPinsrw, 0x00, 3, 532, NACL_OPCODE_NULL_OFFSET }, | 4181 InstPinsrw, 0x00, 3, 532, NACL_OPCODE_NULL_OFFSET }, |
4178 /* 861 */ | 4182 /* 862 */ |
4179 { NACLi_SSE41, | 4183 { NACLi_SSE41, |
4180 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeH
asImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4184 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeH
asImmed_b) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4181 InstPextrw, 0x00, 3, 535, NACL_OPCODE_NULL_OFFSET }, | 4185 InstPextrw, 0x00, 3, 535, NACL_OPCODE_NULL_OFFSET }, |
4182 /* 862 */ | 4186 /* 863 */ |
4183 { NACLi_SSE2, | 4187 { NACLi_SSE2, |
4184 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4188 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4185 InstShufpd, 0x00, 3, 529, NACL_OPCODE_NULL_OFFSET }, | 4189 InstShufpd, 0x00, 3, 529, NACL_OPCODE_NULL_OFFSET }, |
4186 /* 863 */ | 4190 /* 864 */ |
4187 { NACLi_SSE3, | 4191 { NACLi_SSE3, |
4188 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4192 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4189 InstAddsubpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, | 4193 InstAddsubpd, 0x00, 2, 456, NACL_OPCODE_NULL_OFFSET }, |
4190 /* 864 */ | 4194 /* 865 */ |
4191 { NACLi_SSE2, | 4195 { NACLi_SSE2, |
4192 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4196 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4193 InstPsrlw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4197 InstPsrlw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4194 /* 865 */ | 4198 /* 866 */ |
4195 { NACLi_SSE2, | 4199 { NACLi_SSE2, |
4196 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4200 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4197 InstPsrld, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4201 InstPsrld, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4198 /* 866 */ | 4202 /* 867 */ |
4199 { NACLi_SSE2, | 4203 { NACLi_SSE2, |
4200 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4204 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4201 InstPsrlq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4205 InstPsrlq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4202 /* 867 */ | 4206 /* 868 */ |
4203 { NACLi_SSE2, | 4207 { NACLi_SSE2, |
4204 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4208 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4205 InstPaddq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4209 InstPaddq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4206 /* 868 */ | 4210 /* 869 */ |
4207 { NACLi_SSE2, | 4211 { NACLi_SSE2, |
4208 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4212 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4209 InstPmullw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4213 InstPmullw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4210 /* 869 */ | 4214 /* 870 */ |
4211 { NACLi_SSE2, | 4215 { NACLi_SSE2, |
4212 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4216 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4213 InstMovq, 0x00, 2, 538, NACL_OPCODE_NULL_OFFSET }, | 4217 InstMovq, 0x00, 2, 538, NACL_OPCODE_NULL_OFFSET }, |
4214 /* 870 */ | 4218 /* 871 */ |
4215 { NACLi_SSE2, | 4219 { NACLi_SSE2, |
4216 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4220 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4217 InstPmovmskb, 0x00, 2, 535, NACL_OPCODE_NULL_OFFSET }, | 4221 InstPmovmskb, 0x00, 2, 535, NACL_OPCODE_NULL_OFFSET }, |
4218 /* 871 */ | 4222 /* 872 */ |
4219 { NACLi_SSE2, | 4223 { NACLi_SSE2, |
4220 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4224 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4221 InstPsubusb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4225 InstPsubusb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4222 /* 872 */ | 4226 /* 873 */ |
4223 { NACLi_SSE2, | 4227 { NACLi_SSE2, |
4224 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4228 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4225 InstPsubusw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4229 InstPsubusw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4226 /* 873 */ | 4230 /* 874 */ |
4227 { NACLi_SSE2, | 4231 { NACLi_SSE2, |
4228 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4232 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4229 InstPminub, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4233 InstPminub, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4230 /* 874 */ | 4234 /* 875 */ |
4231 { NACLi_SSE2, | 4235 { NACLi_SSE2, |
4232 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4236 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4233 InstPand, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4237 InstPand, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4234 /* 875 */ | 4238 /* 876 */ |
4235 { NACLi_SSE2, | 4239 { NACLi_SSE2, |
4236 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4240 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4237 InstPaddusb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4241 InstPaddusb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4238 /* 876 */ | 4242 /* 877 */ |
4239 { NACLi_SSE2, | 4243 { NACLi_SSE2, |
4240 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4244 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4241 InstPaddusw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4245 InstPaddusw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4242 /* 877 */ | 4246 /* 878 */ |
4243 { NACLi_SSE2, | 4247 { NACLi_SSE2, |
4244 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4248 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4245 InstPmaxub, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4249 InstPmaxub, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4246 /* 878 */ | 4250 /* 879 */ |
4247 { NACLi_SSE2, | 4251 { NACLi_SSE2, |
4248 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4252 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4249 InstPandn, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4253 InstPandn, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4250 /* 879 */ | 4254 /* 880 */ |
4251 { NACLi_SSE2, | 4255 { NACLi_SSE2, |
4252 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4256 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4253 InstPavgb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4257 InstPavgb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4254 /* 880 */ | 4258 /* 881 */ |
4255 { NACLi_SSE2, | 4259 { NACLi_SSE2, |
4256 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4260 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4257 InstPsraw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4261 InstPsraw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4258 /* 881 */ | 4262 /* 882 */ |
4259 { NACLi_SSE2, | 4263 { NACLi_SSE2, |
4260 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4264 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4261 InstPsrad, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4265 InstPsrad, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4262 /* 882 */ | 4266 /* 883 */ |
4263 { NACLi_SSE2, | 4267 { NACLi_SSE2, |
4264 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4268 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4265 InstPavgw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4269 InstPavgw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4266 /* 883 */ | 4270 /* 884 */ |
4267 { NACLi_SSE2, | 4271 { NACLi_SSE2, |
4268 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4272 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4269 InstPmulhuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4273 InstPmulhuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4270 /* 884 */ | 4274 /* 885 */ |
4271 { NACLi_SSE2, | 4275 { NACLi_SSE2, |
4272 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4276 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4273 InstPmulhw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4277 InstPmulhw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4274 /* 885 */ | 4278 /* 886 */ |
4275 { NACLi_SSE2, | 4279 { NACLi_SSE2, |
4276 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4280 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4277 InstCvttpd2dq, 0x00, 2, 540, NACL_OPCODE_NULL_OFFSET }, | 4281 InstCvttpd2dq, 0x00, 2, 540, NACL_OPCODE_NULL_OFFSET }, |
4278 /* 886 */ | 4282 /* 887 */ |
4279 { NACLi_SSE2, | 4283 { NACLi_SSE2, |
4280 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4284 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4281 InstMovntdq, 0x00, 2, 542, NACL_OPCODE_NULL_OFFSET }, | 4285 InstMovntdq, 0x00, 2, 542, NACL_OPCODE_NULL_OFFSET }, |
4282 /* 887 */ | 4286 /* 888 */ |
4283 { NACLi_SSE2, | 4287 { NACLi_SSE2, |
4284 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4288 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4285 InstPsubsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4289 InstPsubsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4286 /* 888 */ | 4290 /* 889 */ |
4287 { NACLi_SSE2, | 4291 { NACLi_SSE2, |
4288 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4292 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4289 InstPsubsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4293 InstPsubsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4290 /* 889 */ | 4294 /* 890 */ |
4291 { NACLi_SSE2, | 4295 { NACLi_SSE2, |
4292 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4296 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4293 InstPminsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4297 InstPminsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4294 /* 890 */ | 4298 /* 891 */ |
4295 { NACLi_SSE2, | 4299 { NACLi_SSE2, |
4296 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4300 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4297 InstPor, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4301 InstPor, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4298 /* 891 */ | 4302 /* 892 */ |
4299 { NACLi_SSE2, | 4303 { NACLi_SSE2, |
4300 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4304 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4301 InstPaddsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4305 InstPaddsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4302 /* 892 */ | 4306 /* 893 */ |
4303 { NACLi_SSE2, | 4307 { NACLi_SSE2, |
4304 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4308 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4305 InstPaddsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4309 InstPaddsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4306 /* 893 */ | 4310 /* 894 */ |
4307 { NACLi_SSE2, | 4311 { NACLi_SSE2, |
4308 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4312 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4309 InstPmaxsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4313 InstPmaxsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4310 /* 894 */ | 4314 /* 895 */ |
4311 { NACLi_SSE2, | 4315 { NACLi_SSE2, |
4312 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4316 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4313 InstPxor, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4317 InstPxor, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4314 /* 895 */ | 4318 /* 896 */ |
4315 { NACLi_SSE2, | 4319 { NACLi_SSE2, |
4316 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4320 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4317 InstPsllw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4321 InstPsllw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4318 /* 896 */ | 4322 /* 897 */ |
4319 { NACLi_SSE2, | 4323 { NACLi_SSE2, |
4320 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4324 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4321 InstPslld, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4325 InstPslld, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4322 /* 897 */ | 4326 /* 898 */ |
4323 { NACLi_SSE2, | 4327 { NACLi_SSE2, |
4324 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4328 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4325 InstPsllq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4329 InstPsllq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4326 /* 898 */ | 4330 /* 899 */ |
4327 { NACLi_SSE2, | 4331 { NACLi_SSE2, |
4328 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4332 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4329 InstPmuludq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4333 InstPmuludq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4330 /* 899 */ | 4334 /* 900 */ |
4331 { NACLi_SSE2, | 4335 { NACLi_SSE2, |
4332 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4336 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4333 InstPmaddwd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4337 InstPmaddwd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4334 /* 900 */ | 4338 /* 901 */ |
4335 { NACLi_SSE2, | 4339 { NACLi_SSE2, |
4336 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4340 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4337 InstPsadbw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4341 InstPsadbw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4338 /* 901 */ | 4342 /* 902 */ |
4339 { NACLi_SSE2, | 4343 { NACLi_SSE2, |
4340 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4344 NACL_IFLAG(ModRmModIs0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeA
llowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4341 InstMaskmovdqu, 0x00, 3, 544, NACL_OPCODE_NULL_OFFSET }, | 4345 InstMaskmovdqu, 0x00, 3, 544, NACL_OPCODE_NULL_OFFSET }, |
4342 /* 902 */ | 4346 /* 903 */ |
4343 { NACLi_SSE2, | 4347 { NACLi_SSE2, |
4344 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4348 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4345 InstPsubb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4349 InstPsubb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4346 /* 903 */ | 4350 /* 904 */ |
4347 { NACLi_SSE2, | 4351 { NACLi_SSE2, |
4348 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4352 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4349 InstPsubw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4353 InstPsubw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4350 /* 904 */ | 4354 /* 905 */ |
4351 { NACLi_SSE2, | 4355 { NACLi_SSE2, |
4352 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4356 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4353 InstPsubd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4357 InstPsubd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4354 /* 905 */ | 4358 /* 906 */ |
4355 { NACLi_SSE2, | 4359 { NACLi_SSE2, |
4356 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4360 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4357 InstPsubq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4361 InstPsubq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4358 /* 906 */ | 4362 /* 907 */ |
4359 { NACLi_SSE2, | 4363 { NACLi_SSE2, |
4360 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4364 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4361 InstPaddb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4365 InstPaddb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4362 /* 907 */ | 4366 /* 908 */ |
4363 { NACLi_SSE2, | 4367 { NACLi_SSE2, |
4364 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4368 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4365 InstPaddw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4369 InstPaddw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4366 /* 908 */ | 4370 /* 909 */ |
4367 { NACLi_SSE2, | 4371 { NACLi_SSE2, |
4368 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4372 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4369 InstPaddd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4373 InstPaddd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4370 /* 909 */ | 4374 /* 910 */ |
4371 { NACLi_E3DNOW, | 4375 { NACLi_E3DNOW, |
4372 NACL_IFLAG(OpcodeUsesModRm), | 4376 NACL_IFLAG(OpcodeUsesModRm), |
4373 InstPi2fw, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4377 InstPi2fw, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4374 /* 910 */ | 4378 /* 911 */ |
4375 { NACLi_3DNOW, | 4379 { NACLi_3DNOW, |
4376 NACL_IFLAG(OpcodeUsesModRm), | 4380 NACL_IFLAG(OpcodeUsesModRm), |
4377 InstPi2fd, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4381 InstPi2fd, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4378 /* 911 */ | 4382 /* 912 */ |
4379 { NACLi_E3DNOW, | 4383 { NACLi_E3DNOW, |
4380 NACL_IFLAG(OpcodeUsesModRm), | 4384 NACL_IFLAG(OpcodeUsesModRm), |
4381 InstPf2iw, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4385 InstPf2iw, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4382 /* 912 */ | 4386 /* 913 */ |
4383 { NACLi_3DNOW, | 4387 { NACLi_3DNOW, |
4384 NACL_IFLAG(OpcodeUsesModRm), | 4388 NACL_IFLAG(OpcodeUsesModRm), |
4385 InstPf2id, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4389 InstPf2id, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4386 /* 913 */ | |
4387 { NACLi_E3DNOW, | |
4388 NACL_IFLAG(OpcodeUsesModRm), | |
4389 InstPfnacc, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | |
4390 /* 914 */ | 4390 /* 914 */ |
4391 { NACLi_E3DNOW, | 4391 { NACLi_E3DNOW, |
4392 NACL_IFLAG(OpcodeUsesModRm), | 4392 NACL_IFLAG(OpcodeUsesModRm), |
| 4393 InstPfnacc, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
| 4394 /* 915 */ |
| 4395 { NACLi_E3DNOW, |
| 4396 NACL_IFLAG(OpcodeUsesModRm), |
4393 InstPfpnacc, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4397 InstPfpnacc, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4394 /* 915 */ | |
4395 { NACLi_3DNOW, | |
4396 NACL_IFLAG(OpcodeUsesModRm), | |
4397 InstPfcmpge, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | |
4398 /* 916 */ | 4398 /* 916 */ |
4399 { NACLi_3DNOW, | 4399 { NACLi_3DNOW, |
4400 NACL_IFLAG(OpcodeUsesModRm), | 4400 NACL_IFLAG(OpcodeUsesModRm), |
4401 InstPfmin, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4401 InstPfcmpge, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4402 /* 917 */ | 4402 /* 917 */ |
4403 { NACLi_3DNOW, | 4403 { NACLi_3DNOW, |
4404 NACL_IFLAG(OpcodeUsesModRm), | 4404 NACL_IFLAG(OpcodeUsesModRm), |
4405 InstPfrcp, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4405 InstPfmin, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4406 /* 918 */ | 4406 /* 918 */ |
4407 { NACLi_3DNOW, | 4407 { NACLi_3DNOW, |
4408 NACL_IFLAG(OpcodeUsesModRm), | 4408 NACL_IFLAG(OpcodeUsesModRm), |
4409 InstPfrsqrt, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4409 InstPfrcp, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4410 /* 919 */ | 4410 /* 919 */ |
4411 { NACLi_3DNOW, | 4411 { NACLi_3DNOW, |
4412 NACL_IFLAG(OpcodeUsesModRm), | 4412 NACL_IFLAG(OpcodeUsesModRm), |
4413 InstPfsub, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4413 InstPfrsqrt, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4414 /* 920 */ | 4414 /* 920 */ |
4415 { NACLi_3DNOW, | 4415 { NACLi_3DNOW, |
4416 NACL_IFLAG(OpcodeUsesModRm), | 4416 NACL_IFLAG(OpcodeUsesModRm), |
4417 InstPfadd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4417 InstPfsub, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4418 /* 921 */ | 4418 /* 921 */ |
4419 { NACLi_3DNOW, | 4419 { NACLi_3DNOW, |
4420 NACL_IFLAG(OpcodeUsesModRm), | 4420 NACL_IFLAG(OpcodeUsesModRm), |
4421 InstPfcmpgt, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4421 InstPfadd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4422 /* 922 */ | 4422 /* 922 */ |
4423 { NACLi_3DNOW, | 4423 { NACLi_3DNOW, |
4424 NACL_IFLAG(OpcodeUsesModRm), | 4424 NACL_IFLAG(OpcodeUsesModRm), |
4425 InstPfmax, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4425 InstPfcmpgt, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4426 /* 923 */ | 4426 /* 923 */ |
4427 { NACLi_3DNOW, | 4427 { NACLi_3DNOW, |
4428 NACL_IFLAG(OpcodeUsesModRm), | 4428 NACL_IFLAG(OpcodeUsesModRm), |
4429 InstPfrcpit1, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4429 InstPfmax, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4430 /* 924 */ | 4430 /* 924 */ |
4431 { NACLi_3DNOW, | 4431 { NACLi_3DNOW, |
4432 NACL_IFLAG(OpcodeUsesModRm), | 4432 NACL_IFLAG(OpcodeUsesModRm), |
4433 InstPfrsqit1, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4433 InstPfrcpit1, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4434 /* 925 */ | 4434 /* 925 */ |
4435 { NACLi_3DNOW, | 4435 { NACLi_3DNOW, |
4436 NACL_IFLAG(OpcodeUsesModRm), | 4436 NACL_IFLAG(OpcodeUsesModRm), |
4437 InstPfsubr, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4437 InstPfrsqit1, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4438 /* 926 */ | 4438 /* 926 */ |
4439 { NACLi_3DNOW, | 4439 { NACLi_3DNOW, |
4440 NACL_IFLAG(OpcodeUsesModRm), | 4440 NACL_IFLAG(OpcodeUsesModRm), |
4441 InstPfacc, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4441 InstPfsubr, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4442 /* 927 */ | 4442 /* 927 */ |
4443 { NACLi_3DNOW, | 4443 { NACLi_3DNOW, |
4444 NACL_IFLAG(OpcodeUsesModRm), | 4444 NACL_IFLAG(OpcodeUsesModRm), |
4445 InstPfcmpeq, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4445 InstPfacc, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4446 /* 928 */ | 4446 /* 928 */ |
4447 { NACLi_3DNOW, | 4447 { NACLi_3DNOW, |
4448 NACL_IFLAG(OpcodeUsesModRm), | 4448 NACL_IFLAG(OpcodeUsesModRm), |
4449 InstPfmul, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4449 InstPfcmpeq, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4450 /* 929 */ | 4450 /* 929 */ |
4451 { NACLi_3DNOW, | 4451 { NACLi_3DNOW, |
4452 NACL_IFLAG(OpcodeUsesModRm), | 4452 NACL_IFLAG(OpcodeUsesModRm), |
4453 InstPfrcpit2, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4453 InstPfmul, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4454 /* 930 */ | 4454 /* 930 */ |
4455 { NACLi_3DNOW, | 4455 { NACLi_3DNOW, |
4456 NACL_IFLAG(OpcodeUsesModRm), | 4456 NACL_IFLAG(OpcodeUsesModRm), |
| 4457 InstPfrcpit2, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
| 4458 /* 931 */ |
| 4459 { NACLi_3DNOW, |
| 4460 NACL_IFLAG(OpcodeUsesModRm), |
4457 InstPmulhrw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4461 InstPmulhrw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4458 /* 931 */ | 4462 /* 932 */ |
4459 { NACLi_E3DNOW, | 4463 { NACLi_E3DNOW, |
4460 NACL_IFLAG(OpcodeUsesModRm), | 4464 NACL_IFLAG(OpcodeUsesModRm), |
4461 InstPswapd, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4465 InstPswapd, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4462 /* 932 */ | 4466 /* 933 */ |
4463 { NACLi_3DNOW, | 4467 { NACLi_3DNOW, |
4464 NACL_IFLAG(OpcodeUsesModRm), | 4468 NACL_IFLAG(OpcodeUsesModRm), |
4465 InstPavgusb, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4469 InstPavgusb, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4466 /* 933 */ | 4470 /* 934 */ |
4467 { NACLi_SSSE3, | 4471 { NACLi_SSSE3, |
4468 NACL_IFLAG(OpcodeUsesModRm), | 4472 NACL_IFLAG(OpcodeUsesModRm), |
4469 InstPshufb, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4473 InstPshufb, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4470 /* 934 */ | 4474 /* 935 */ |
4471 { NACLi_SSSE3, | 4475 { NACLi_SSSE3, |
4472 NACL_IFLAG(OpcodeUsesModRm), | 4476 NACL_IFLAG(OpcodeUsesModRm), |
4473 InstPhaddw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4477 InstPhaddw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4474 /* 935 */ | 4478 /* 936 */ |
4475 { NACLi_SSSE3, | 4479 { NACLi_SSSE3, |
4476 NACL_IFLAG(OpcodeUsesModRm), | 4480 NACL_IFLAG(OpcodeUsesModRm), |
4477 InstPhaddd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4481 InstPhaddd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4478 /* 936 */ | 4482 /* 937 */ |
4479 { NACLi_SSSE3, | 4483 { NACLi_SSSE3, |
4480 NACL_IFLAG(OpcodeUsesModRm), | 4484 NACL_IFLAG(OpcodeUsesModRm), |
4481 InstPhaddsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4485 InstPhaddsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4482 /* 937 */ | 4486 /* 938 */ |
4483 { NACLi_SSSE3, | 4487 { NACLi_SSSE3, |
4484 NACL_IFLAG(OpcodeUsesModRm), | 4488 NACL_IFLAG(OpcodeUsesModRm), |
4485 InstPmaddubsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4489 InstPmaddubsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4486 /* 938 */ | 4490 /* 939 */ |
4487 { NACLi_SSSE3, | 4491 { NACLi_SSSE3, |
4488 NACL_IFLAG(OpcodeUsesModRm), | 4492 NACL_IFLAG(OpcodeUsesModRm), |
4489 InstPhsubw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4493 InstPhsubw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4490 /* 939 */ | 4494 /* 940 */ |
4491 { NACLi_SSSE3, | 4495 { NACLi_SSSE3, |
4492 NACL_IFLAG(OpcodeUsesModRm), | 4496 NACL_IFLAG(OpcodeUsesModRm), |
4493 InstPhsubd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4497 InstPhsubd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4494 /* 940 */ | 4498 /* 941 */ |
4495 { NACLi_SSSE3, | 4499 { NACLi_SSSE3, |
4496 NACL_IFLAG(OpcodeUsesModRm), | 4500 NACL_IFLAG(OpcodeUsesModRm), |
4497 InstPhsubsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4501 InstPhsubsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4498 /* 941 */ | 4502 /* 942 */ |
4499 { NACLi_SSSE3, | 4503 { NACLi_SSSE3, |
4500 NACL_IFLAG(OpcodeUsesModRm), | 4504 NACL_IFLAG(OpcodeUsesModRm), |
4501 InstPsignb, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4505 InstPsignb, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4502 /* 942 */ | 4506 /* 943 */ |
4503 { NACLi_SSSE3, | 4507 { NACLi_SSSE3, |
4504 NACL_IFLAG(OpcodeUsesModRm), | 4508 NACL_IFLAG(OpcodeUsesModRm), |
4505 InstPsignw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4509 InstPsignw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4506 /* 943 */ | 4510 /* 944 */ |
4507 { NACLi_SSSE3, | 4511 { NACLi_SSSE3, |
4508 NACL_IFLAG(OpcodeUsesModRm), | 4512 NACL_IFLAG(OpcodeUsesModRm), |
4509 InstPsignd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4513 InstPsignd, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4510 /* 944 */ | 4514 /* 945 */ |
4511 { NACLi_SSSE3, | 4515 { NACLi_SSSE3, |
4512 NACL_IFLAG(OpcodeUsesModRm), | 4516 NACL_IFLAG(OpcodeUsesModRm), |
4513 InstPmulhrsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, | 4517 InstPmulhrsw, 0x00, 2, 356, NACL_OPCODE_NULL_OFFSET }, |
4514 /* 945 */ | 4518 /* 946 */ |
4515 { NACLi_SSSE3, | 4519 { NACLi_SSSE3, |
4516 NACL_IFLAG(OpcodeUsesModRm), | 4520 NACL_IFLAG(OpcodeUsesModRm), |
4517 InstPabsb, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4521 InstPabsb, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4518 /* 946 */ | 4522 /* 947 */ |
4519 { NACLi_SSSE3, | 4523 { NACLi_SSSE3, |
4520 NACL_IFLAG(OpcodeUsesModRm), | 4524 NACL_IFLAG(OpcodeUsesModRm), |
4521 InstPabsw, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4525 InstPabsw, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4522 /* 947 */ | 4526 /* 948 */ |
4523 { NACLi_SSSE3, | 4527 { NACLi_SSSE3, |
4524 NACL_IFLAG(OpcodeUsesModRm), | 4528 NACL_IFLAG(OpcodeUsesModRm), |
4525 InstPabsd, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, | 4529 InstPabsd, 0x00, 2, 362, NACL_OPCODE_NULL_OFFSET }, |
4526 /* 948 */ | 4530 /* 949 */ |
4527 { NACLi_MOVBE, | 4531 { NACLi_MOVBE, |
4528 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), | 4532 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), |
4529 InstMovbe, 0x00, 2, 547, NACL_OPCODE_NULL_OFFSET }, | 4533 InstMovbe, 0x00, 2, 547, NACL_OPCODE_NULL_OFFSET }, |
4530 /* 949 */ | 4534 /* 950 */ |
4531 { NACLi_MOVBE, | 4535 { NACLi_MOVBE, |
4532 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), | 4536 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), |
4533 InstMovbe, 0x00, 2, 549, NACL_OPCODE_NULL_OFFSET }, | 4537 InstMovbe, 0x00, 2, 549, NACL_OPCODE_NULL_OFFSET }, |
4534 /* 950 */ | 4538 /* 951 */ |
4535 { NACLi_SSSE3, | 4539 { NACLi_SSSE3, |
4536 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4540 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4537 InstPshufb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4541 InstPshufb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4538 /* 951 */ | 4542 /* 952 */ |
4539 { NACLi_SSSE3, | 4543 { NACLi_SSSE3, |
4540 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4544 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4541 InstPhaddw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4545 InstPhaddw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4542 /* 952 */ | 4546 /* 953 */ |
4543 { NACLi_SSSE3, | 4547 { NACLi_SSSE3, |
4544 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4548 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4545 InstPhaddd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4549 InstPhaddd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4546 /* 953 */ | 4550 /* 954 */ |
4547 { NACLi_SSSE3, | 4551 { NACLi_SSSE3, |
4548 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4552 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4549 InstPhaddsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4553 InstPhaddsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4550 /* 954 */ | 4554 /* 955 */ |
4551 { NACLi_SSSE3, | 4555 { NACLi_SSSE3, |
4552 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4556 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4553 InstPmaddubsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4557 InstPmaddubsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4554 /* 955 */ | 4558 /* 956 */ |
4555 { NACLi_SSSE3, | 4559 { NACLi_SSSE3, |
4556 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4560 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4557 InstPhsubw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4561 InstPhsubw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4558 /* 956 */ | 4562 /* 957 */ |
4559 { NACLi_SSSE3, | 4563 { NACLi_SSSE3, |
4560 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4564 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4561 InstPhsubd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4565 InstPhsubd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4562 /* 957 */ | 4566 /* 958 */ |
4563 { NACLi_SSSE3, | 4567 { NACLi_SSSE3, |
4564 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4568 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4565 InstPhsubsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4569 InstPhsubsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4566 /* 958 */ | 4570 /* 959 */ |
4567 { NACLi_SSSE3, | 4571 { NACLi_SSSE3, |
4568 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4572 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4569 InstPsignb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4573 InstPsignb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4570 /* 959 */ | 4574 /* 960 */ |
4571 { NACLi_SSSE3, | 4575 { NACLi_SSSE3, |
4572 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4576 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4573 InstPsignw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4577 InstPsignw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4574 /* 960 */ | 4578 /* 961 */ |
4575 { NACLi_SSSE3, | 4579 { NACLi_SSSE3, |
4576 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4580 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4577 InstPsignd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4581 InstPsignd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4578 /* 961 */ | 4582 /* 962 */ |
4579 { NACLi_SSSE3, | 4583 { NACLi_SSSE3, |
4580 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4584 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4581 InstPmulhrsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4585 InstPmulhrsw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4582 /* 962 */ | 4586 /* 963 */ |
4583 { NACLi_SSE41, | 4587 { NACLi_SSE41, |
4584 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4588 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4585 InstPblendvb, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET }, | 4589 InstPblendvb, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET }, |
4586 /* 963 */ | 4590 /* 964 */ |
4587 { NACLi_SSE41, | 4591 { NACLi_SSE41, |
4588 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4592 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4589 InstBlendvps, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET }, | 4593 InstBlendvps, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET }, |
4590 /* 964 */ | 4594 /* 965 */ |
4591 { NACLi_SSE41, | 4595 { NACLi_SSE41, |
4592 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4596 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4593 InstBlendvpd, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET }, | 4597 InstBlendvpd, 0x00, 3, 551, NACL_OPCODE_NULL_OFFSET }, |
4594 /* 965 */ | 4598 /* 966 */ |
4595 { NACLi_SSE41, | 4599 { NACLi_SSE41, |
4596 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4600 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4597 InstPtest, 0x00, 2, 554, NACL_OPCODE_NULL_OFFSET }, | 4601 InstPtest, 0x00, 2, 554, NACL_OPCODE_NULL_OFFSET }, |
4598 /* 966 */ | 4602 /* 967 */ |
4599 { NACLi_SSSE3, | 4603 { NACLi_SSSE3, |
4600 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4604 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4601 InstPabsb, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET }, | 4605 InstPabsb, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET }, |
4602 /* 967 */ | 4606 /* 968 */ |
4603 { NACLi_SSSE3, | 4607 { NACLi_SSSE3, |
4604 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4608 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4605 InstPabsw, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET }, | 4609 InstPabsw, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET }, |
4606 /* 968 */ | 4610 /* 969 */ |
4607 { NACLi_SSSE3, | 4611 { NACLi_SSSE3, |
4608 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4612 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4609 InstPabsd, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET }, | 4613 InstPabsd, 0x00, 2, 480, NACL_OPCODE_NULL_OFFSET }, |
4610 /* 969 */ | 4614 /* 970 */ |
4611 { NACLi_SSE41, | 4615 { NACLi_SSE41, |
4612 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4616 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4613 InstPmovsxbw, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, | 4617 InstPmovsxbw, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, |
4614 /* 970 */ | 4618 /* 971 */ |
4615 { NACLi_SSE41, | 4619 { NACLi_SSE41, |
4616 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4620 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4617 InstPmovsxbd, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET }, | 4621 InstPmovsxbd, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET }, |
4618 /* 971 */ | 4622 /* 972 */ |
4619 { NACLi_SSE41, | 4623 { NACLi_SSE41, |
4620 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4624 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4621 InstPmovsxbq, 0x00, 2, 560, NACL_OPCODE_NULL_OFFSET }, | 4625 InstPmovsxbq, 0x00, 2, 560, NACL_OPCODE_NULL_OFFSET }, |
4622 /* 972 */ | 4626 /* 973 */ |
4623 { NACLi_SSE41, | 4627 { NACLi_SSE41, |
4624 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4628 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4625 InstPmovsxwd, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, | 4629 InstPmovsxwd, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, |
4626 /* 973 */ | 4630 /* 974 */ |
4627 { NACLi_SSE41, | 4631 { NACLi_SSE41, |
4628 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4632 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4629 InstPmovsxwq, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET }, | 4633 InstPmovsxwq, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET }, |
4630 /* 974 */ | 4634 /* 975 */ |
4631 { NACLi_SSE41, | 4635 { NACLi_SSE41, |
4632 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4636 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4633 InstPmovsxdq, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, | 4637 InstPmovsxdq, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, |
4634 /* 975 */ | 4638 /* 976 */ |
4635 { NACLi_SSE41, | 4639 { NACLi_SSE41, |
4636 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4640 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4637 InstPmuldq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4641 InstPmuldq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4638 /* 976 */ | 4642 /* 977 */ |
4639 { NACLi_SSE41, | 4643 { NACLi_SSE41, |
4640 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4644 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4641 InstPcmpeqq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4645 InstPcmpeqq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4642 /* 977 */ | 4646 /* 978 */ |
4643 { NACLi_SSE41, | 4647 { NACLi_SSE41, |
4644 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4648 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4645 InstMovntdqa, 0x00, 2, 462, NACL_OPCODE_NULL_OFFSET }, | 4649 InstMovntdqa, 0x00, 2, 462, NACL_OPCODE_NULL_OFFSET }, |
4646 /* 978 */ | 4650 /* 979 */ |
4647 { NACLi_SSE41, | 4651 { NACLi_SSE41, |
4648 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4652 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4649 InstPackusdw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4653 InstPackusdw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4650 /* 979 */ | 4654 /* 980 */ |
4651 { NACLi_SSE41, | 4655 { NACLi_SSE41, |
4652 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4656 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4653 InstPmovzxbw, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, | 4657 InstPmovzxbw, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, |
4654 /* 980 */ | 4658 /* 981 */ |
4655 { NACLi_SSE41, | 4659 { NACLi_SSE41, |
4656 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4660 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4657 InstPmovzxbd, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET }, | 4661 InstPmovzxbd, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET }, |
4658 /* 981 */ | 4662 /* 982 */ |
4659 { NACLi_SSE41, | 4663 { NACLi_SSE41, |
4660 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4664 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4661 InstPmovzxbq, 0x00, 2, 560, NACL_OPCODE_NULL_OFFSET }, | 4665 InstPmovzxbq, 0x00, 2, 560, NACL_OPCODE_NULL_OFFSET }, |
4662 /* 982 */ | 4666 /* 983 */ |
4663 { NACLi_SSE41, | 4667 { NACLi_SSE41, |
4664 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4668 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4665 InstPmovzxwd, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, | 4669 InstPmovzxwd, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, |
4666 /* 983 */ | 4670 /* 984 */ |
4667 { NACLi_SSE41, | 4671 { NACLi_SSE41, |
4668 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4672 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4669 InstPmovzxwq, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET }, | 4673 InstPmovzxwq, 0x00, 2, 558, NACL_OPCODE_NULL_OFFSET }, |
4670 /* 984 */ | 4674 /* 985 */ |
4671 { NACLi_SSE41, | 4675 { NACLi_SSE41, |
4672 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4676 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4673 InstPmovzxdq, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, | 4677 InstPmovzxdq, 0x00, 2, 556, NACL_OPCODE_NULL_OFFSET }, |
4674 /* 985 */ | 4678 /* 986 */ |
4675 { NACLi_SSE42, | 4679 { NACLi_SSE42, |
4676 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4680 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4677 InstPcmpgtq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4681 InstPcmpgtq, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4678 /* 986 */ | 4682 /* 987 */ |
4679 { NACLi_SSE41, | 4683 { NACLi_SSE41, |
4680 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4684 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4681 InstPminsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4685 InstPminsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4682 /* 987 */ | 4686 /* 988 */ |
4683 { NACLi_SSE41, | 4687 { NACLi_SSE41, |
4684 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4688 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4685 InstPminsd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4689 InstPminsd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4686 /* 988 */ | 4690 /* 989 */ |
4687 { NACLi_SSE41, | 4691 { NACLi_SSE41, |
4688 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4692 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4689 InstPminuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4693 InstPminuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4690 /* 989 */ | 4694 /* 990 */ |
4691 { NACLi_SSE41, | 4695 { NACLi_SSE41, |
4692 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4696 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4693 InstPminud, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4697 InstPminud, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4694 /* 990 */ | 4698 /* 991 */ |
4695 { NACLi_SSE41, | 4699 { NACLi_SSE41, |
4696 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4700 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4697 InstPmaxsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4701 InstPmaxsb, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4698 /* 991 */ | 4702 /* 992 */ |
4699 { NACLi_SSE41, | 4703 { NACLi_SSE41, |
4700 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4704 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4701 InstPmaxsd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4705 InstPmaxsd, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4702 /* 992 */ | 4706 /* 993 */ |
4703 { NACLi_SSE41, | 4707 { NACLi_SSE41, |
4704 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4708 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4705 InstPmaxuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4709 InstPmaxuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4706 /* 993 */ | 4710 /* 994 */ |
4707 { NACLi_SSE41, | 4711 { NACLi_SSE41, |
4708 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4712 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4709 InstPmaxud, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4713 InstPmaxud, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4710 /* 994 */ | 4714 /* 995 */ |
4711 { NACLi_SSE41, | 4715 { NACLi_SSE41, |
4712 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4716 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4713 InstPmulld, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4717 InstPmulld, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4714 /* 995 */ | 4718 /* 996 */ |
4715 { NACLi_SSE41, | 4719 { NACLi_SSE41, |
4716 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), | 4720 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsData16) | NACL_IFLAG(Si
zeIgnoresData16), |
4717 InstPhminposuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, | 4721 InstPhminposuw, 0x00, 2, 515, NACL_OPCODE_NULL_OFFSET }, |
4718 /* 996 */ | 4722 /* 997 */ |
4719 { NACLi_VMX, | 4723 { NACLi_VMX, |
4720 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4724 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4721 InstInvept, 0x00, 2, 562, NACL_OPCODE_NULL_OFFSET }, | 4725 InstInvept, 0x00, 2, 562, NACL_OPCODE_NULL_OFFSET }, |
4722 /* 997 */ | 4726 /* 998 */ |
4723 { NACLi_VMX, | 4727 { NACLi_VMX, |
4724 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), | 4728 NACL_IFLAG(ModRmModIsnt0x3) | NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(Opcod
eAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(NaClIllegal), |
4725 InstInvvpid, 0x00, 2, 562, NACL_OPCODE_NULL_OFFSET }, | 4729 InstInvvpid, 0x00, 2, 562, NACL_OPCODE_NULL_OFFSET }, |
4726 /* 998 */ | 4730 /* 999 */ |
4727 { NACLi_SSE42, | 4731 { NACLi_SSE42, |
4728 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRepne) | NACL_IFLAG(Ope
randSize_b), | 4732 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRepne) | NACL_IFLAG(Ope
randSize_b), |
4729 InstCrc32, 0x00, 2, 564, NACL_OPCODE_NULL_OFFSET }, | 4733 InstCrc32, 0x00, 2, 564, NACL_OPCODE_NULL_OFFSET }, |
4730 /* 999 */ | 4734 /* 1000 */ |
4731 { NACLi_SSE42, | 4735 { NACLi_SSE42, |
4732 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRepne) | NACL_IFLAG(Opc
odeAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), | 4736 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeAllowsRepne) | NACL_IFLAG(Opc
odeAllowsData16) | NACL_IFLAG(OperandSize_w) | NACL_IFLAG(OperandSize_v), |
4733 InstCrc32, 0x00, 2, 566, NACL_OPCODE_NULL_OFFSET }, | 4737 InstCrc32, 0x00, 2, 566, NACL_OPCODE_NULL_OFFSET }, |
4734 /* 1000 */ | 4738 /* 1001 */ |
4735 { NACLi_SSSE3, | 4739 { NACLi_SSSE3, |
4736 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b), | 4740 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b), |
4737 InstPalignr, 0x00, 3, 568, NACL_OPCODE_NULL_OFFSET }, | 4741 InstPalignr, 0x00, 3, 568, NACL_OPCODE_NULL_OFFSET }, |
4738 /* 1001 */ | 4742 /* 1002 */ |
4739 { NACLi_SSE41, | 4743 { NACLi_SSE41, |
4740 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4744 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4741 InstRoundps, 0x00, 3, 519, NACL_OPCODE_NULL_OFFSET }, | 4745 InstRoundps, 0x00, 3, 519, NACL_OPCODE_NULL_OFFSET }, |
4742 /* 1002 */ | 4746 /* 1003 */ |
4743 { NACLi_SSE41, | 4747 { NACLi_SSE41, |
4744 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4748 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4745 InstRoundpd, 0x00, 3, 519, NACL_OPCODE_NULL_OFFSET }, | 4749 InstRoundpd, 0x00, 3, 519, NACL_OPCODE_NULL_OFFSET }, |
4746 /* 1003 */ | 4750 /* 1004 */ |
4747 { NACLi_SSE41, | 4751 { NACLi_SSE41, |
4748 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4752 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4749 InstRoundss, 0x00, 3, 571, NACL_OPCODE_NULL_OFFSET }, | 4753 InstRoundss, 0x00, 3, 571, NACL_OPCODE_NULL_OFFSET }, |
4750 /* 1004 */ | 4754 /* 1005 */ |
4751 { NACLi_SSE41, | 4755 { NACLi_SSE41, |
4752 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4756 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4753 InstRoundsd, 0x00, 3, 574, NACL_OPCODE_NULL_OFFSET }, | 4757 InstRoundsd, 0x00, 3, 574, NACL_OPCODE_NULL_OFFSET }, |
4754 /* 1005 */ | 4758 /* 1006 */ |
4755 { NACLi_SSE41, | 4759 { NACLi_SSE41, |
4756 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4760 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4757 InstBlendps, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, | 4761 InstBlendps, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, |
4758 /* 1006 */ | 4762 /* 1007 */ |
4759 { NACLi_SSE41, | 4763 { NACLi_SSE41, |
4760 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4764 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4761 InstBlendpd, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, | 4765 InstBlendpd, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, |
4762 /* 1007 */ | 4766 /* 1008 */ |
4763 { NACLi_SSE41, | 4767 { NACLi_SSE41, |
4764 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4768 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4765 InstPblendw, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, | 4769 InstPblendw, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, |
4766 /* 1008 */ | 4770 /* 1009 */ |
4767 { NACLi_SSSE3, | 4771 { NACLi_SSSE3, |
4768 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4772 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4769 InstPalignr, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, | 4773 InstPalignr, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, |
4770 /* 1009 */ | 4774 /* 1010 */ |
4771 { NACLi_SSE41, | 4775 { NACLi_SSE41, |
4772 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4776 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4773 InstPextrb, 0x00, 3, 580, NACL_OPCODE_NULL_OFFSET }, | 4777 InstPextrb, 0x00, 3, 580, NACL_OPCODE_NULL_OFFSET }, |
4774 /* 1010 */ | 4778 /* 1011 */ |
4775 { NACLi_SSE41, | 4779 { NACLi_SSE41, |
4776 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4780 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4777 InstPextrw, 0x00, 3, 583, NACL_OPCODE_NULL_OFFSET }, | 4781 InstPextrw, 0x00, 3, 583, NACL_OPCODE_NULL_OFFSET }, |
4778 /* 1011 */ | 4782 /* 1012 */ |
4779 { NACLi_SSE41, | 4783 { NACLi_SSE41, |
4780 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4784 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4781 InstPextrd, 0x00, 3, 586, NACL_OPCODE_NULL_OFFSET }, | 4785 InstPextrd, 0x00, 3, 586, NACL_OPCODE_NULL_OFFSET }, |
4782 /* 1012 */ | 4786 /* 1013 */ |
4783 { NACLi_SSE41, | 4787 { NACLi_SSE41, |
4784 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4788 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4785 InstExtractps, 0x00, 3, 589, NACL_OPCODE_NULL_OFFSET }, | 4789 InstExtractps, 0x00, 3, 589, NACL_OPCODE_NULL_OFFSET }, |
4786 /* 1013 */ | 4790 /* 1014 */ |
4787 { NACLi_SSE41, | 4791 { NACLi_SSE41, |
4788 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4792 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4789 InstPinsrb, 0x00, 3, 592, NACL_OPCODE_NULL_OFFSET }, | 4793 InstPinsrb, 0x00, 3, 592, NACL_OPCODE_NULL_OFFSET }, |
4790 /* 1014 */ | 4794 /* 1015 */ |
4791 { NACLi_SSE41, | 4795 { NACLi_SSE41, |
4792 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4796 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4793 InstInsertps, 0x00, 3, 595, NACL_OPCODE_NULL_OFFSET }, | 4797 InstInsertps, 0x00, 3, 595, NACL_OPCODE_NULL_OFFSET }, |
4794 /* 1015 */ | 4798 /* 1016 */ |
4795 { NACLi_SSE41, | 4799 { NACLi_SSE41, |
4796 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4800 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4797 InstPinsrd, 0x00, 3, 598, NACL_OPCODE_NULL_OFFSET }, | 4801 InstPinsrd, 0x00, 3, 598, NACL_OPCODE_NULL_OFFSET }, |
4798 /* 1016 */ | 4802 /* 1017 */ |
4799 { NACLi_SSE41, | 4803 { NACLi_SSE41, |
4800 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4804 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4801 InstDpps, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, | 4805 InstDpps, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, |
4802 /* 1017 */ | 4806 /* 1018 */ |
4803 { NACLi_SSE41, | 4807 { NACLi_SSE41, |
4804 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4808 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4805 InstDppd, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, | 4809 InstDppd, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, |
4806 /* 1018 */ | 4810 /* 1019 */ |
4807 { NACLi_SSE41, | 4811 { NACLi_SSE41, |
4808 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4812 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4809 InstMpsadbw, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, | 4813 InstMpsadbw, 0x00, 3, 577, NACL_OPCODE_NULL_OFFSET }, |
4810 /* 1019 */ | 4814 /* 1020 */ |
4811 { NACLi_SSE42, | 4815 { NACLi_SSE42, |
4812 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4816 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4813 InstPcmpestrm, 0x00, 6, 601, NACL_OPCODE_NULL_OFFSET }, | 4817 InstPcmpestrm, 0x00, 6, 601, NACL_OPCODE_NULL_OFFSET }, |
4814 /* 1020 */ | 4818 /* 1021 */ |
4815 { NACLi_SSE42, | 4819 { NACLi_SSE42, |
4816 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4820 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4817 InstPcmpestri, 0x00, 6, 607, NACL_OPCODE_NULL_OFFSET }, | 4821 InstPcmpestri, 0x00, 6, 607, NACL_OPCODE_NULL_OFFSET }, |
4818 /* 1021 */ | 4822 /* 1022 */ |
4819 { NACLi_SSE42, | 4823 { NACLi_SSE42, |
4820 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), | 4824 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16), |
4821 InstPcmpistrm, 0x00, 4, 613, NACL_OPCODE_NULL_OFFSET }, | 4825 InstPcmpistrm, 0x00, 4, 613, NACL_OPCODE_NULL_OFFSET }, |
4822 /* 1022 */ | 4826 /* 1023 */ |
4823 { NACLi_SSE42, | 4827 { NACLi_SSE42, |
4824 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), | 4828 NACL_IFLAG(OpcodeUsesModRm) | NACL_IFLAG(OpcodeHasImmed_b) | NACL_IFLAG(Opco
deAllowsData16) | NACL_IFLAG(SizeIgnoresData16) | NACL_IFLAG(OperandSize_v), |
4825 InstPcmpistri, 0x00, 4, 617, NACL_OPCODE_NULL_OFFSET }, | 4829 InstPcmpistri, 0x00, 4, 617, NACL_OPCODE_NULL_OFFSET }, |
4826 /* 1023 */ | 4830 /* 1024 */ |
4827 { NACLi_X87, | 4831 { NACLi_X87, |
4828 NACL_EMPTY_IFLAGS, | 4832 NACL_EMPTY_IFLAGS, |
4829 InstFadd, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 4833 InstFadd, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
4830 /* 1024 */ | 4834 /* 1025 */ |
4831 { NACLi_X87, | 4835 { NACLi_X87, |
4832 NACL_EMPTY_IFLAGS, | 4836 NACL_EMPTY_IFLAGS, |
4833 InstFadd, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 4837 InstFadd, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
4834 /* 1025 */ | 4838 /* 1026 */ |
4835 { NACLi_X87, | 4839 { NACLi_X87, |
4836 NACL_EMPTY_IFLAGS, | 4840 NACL_EMPTY_IFLAGS, |
4837 InstFadd, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 4841 InstFadd, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
4838 /* 1026 */ | 4842 /* 1027 */ |
4839 { NACLi_X87, | 4843 { NACLi_X87, |
4840 NACL_EMPTY_IFLAGS, | 4844 NACL_EMPTY_IFLAGS, |
4841 InstFadd, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 4845 InstFadd, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
4842 /* 1027 */ | 4846 /* 1028 */ |
4843 { NACLi_X87, | 4847 { NACLi_X87, |
4844 NACL_EMPTY_IFLAGS, | 4848 NACL_EMPTY_IFLAGS, |
4845 InstFadd, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 4849 InstFadd, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
4846 /* 1028 */ | 4850 /* 1029 */ |
4847 { NACLi_X87, | 4851 { NACLi_X87, |
4848 NACL_EMPTY_IFLAGS, | 4852 NACL_EMPTY_IFLAGS, |
4849 InstFadd, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 4853 InstFadd, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
4850 /* 1029 */ | 4854 /* 1030 */ |
4851 { NACLi_X87, | 4855 { NACLi_X87, |
4852 NACL_EMPTY_IFLAGS, | 4856 NACL_EMPTY_IFLAGS, |
4853 InstFadd, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 4857 InstFadd, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
4854 /* 1030 */ | 4858 /* 1031 */ |
4855 { NACLi_X87, | 4859 { NACLi_X87, |
4856 NACL_EMPTY_IFLAGS, | 4860 NACL_EMPTY_IFLAGS, |
4857 InstFadd, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 4861 InstFadd, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
4858 /* 1031 */ | 4862 /* 1032 */ |
4859 { NACLi_X87, | 4863 { NACLi_X87, |
4860 NACL_EMPTY_IFLAGS, | 4864 NACL_EMPTY_IFLAGS, |
4861 InstFmul, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 4865 InstFmul, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
4862 /* 1032 */ | 4866 /* 1033 */ |
4863 { NACLi_X87, | 4867 { NACLi_X87, |
4864 NACL_EMPTY_IFLAGS, | 4868 NACL_EMPTY_IFLAGS, |
4865 InstFmul, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 4869 InstFmul, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
4866 /* 1033 */ | 4870 /* 1034 */ |
4867 { NACLi_X87, | 4871 { NACLi_X87, |
4868 NACL_EMPTY_IFLAGS, | 4872 NACL_EMPTY_IFLAGS, |
4869 InstFmul, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 4873 InstFmul, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
4870 /* 1034 */ | 4874 /* 1035 */ |
4871 { NACLi_X87, | 4875 { NACLi_X87, |
4872 NACL_EMPTY_IFLAGS, | 4876 NACL_EMPTY_IFLAGS, |
4873 InstFmul, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 4877 InstFmul, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
4874 /* 1035 */ | 4878 /* 1036 */ |
4875 { NACLi_X87, | 4879 { NACLi_X87, |
4876 NACL_EMPTY_IFLAGS, | 4880 NACL_EMPTY_IFLAGS, |
4877 InstFmul, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 4881 InstFmul, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
4878 /* 1036 */ | 4882 /* 1037 */ |
4879 { NACLi_X87, | 4883 { NACLi_X87, |
4880 NACL_EMPTY_IFLAGS, | 4884 NACL_EMPTY_IFLAGS, |
4881 InstFmul, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 4885 InstFmul, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
4882 /* 1037 */ | 4886 /* 1038 */ |
4883 { NACLi_X87, | 4887 { NACLi_X87, |
4884 NACL_EMPTY_IFLAGS, | 4888 NACL_EMPTY_IFLAGS, |
4885 InstFmul, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 4889 InstFmul, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
4886 /* 1038 */ | 4890 /* 1039 */ |
4887 { NACLi_X87, | 4891 { NACLi_X87, |
4888 NACL_EMPTY_IFLAGS, | 4892 NACL_EMPTY_IFLAGS, |
4889 InstFmul, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 4893 InstFmul, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
4890 /* 1039 */ | 4894 /* 1040 */ |
4891 { NACLi_X87, | 4895 { NACLi_X87, |
4892 NACL_EMPTY_IFLAGS, | 4896 NACL_EMPTY_IFLAGS, |
4893 InstFcom, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, | 4897 InstFcom, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, |
4894 /* 1040 */ | 4898 /* 1041 */ |
4895 { NACLi_X87, | 4899 { NACLi_X87, |
4896 NACL_EMPTY_IFLAGS, | 4900 NACL_EMPTY_IFLAGS, |
4897 InstFcom, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 4901 InstFcom, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
4898 /* 1041 */ | 4902 /* 1042 */ |
4899 { NACLi_X87, | 4903 { NACLi_X87, |
4900 NACL_EMPTY_IFLAGS, | 4904 NACL_EMPTY_IFLAGS, |
4901 InstFcom, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, | 4905 InstFcom, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, |
4902 /* 1042 */ | 4906 /* 1043 */ |
4903 { NACLi_X87, | 4907 { NACLi_X87, |
4904 NACL_EMPTY_IFLAGS, | 4908 NACL_EMPTY_IFLAGS, |
4905 InstFcom, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, | 4909 InstFcom, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, |
4906 /* 1043 */ | 4910 /* 1044 */ |
4907 { NACLi_X87, | 4911 { NACLi_X87, |
4908 NACL_EMPTY_IFLAGS, | 4912 NACL_EMPTY_IFLAGS, |
4909 InstFcom, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, | 4913 InstFcom, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, |
4910 /* 1044 */ | 4914 /* 1045 */ |
4911 { NACLi_X87, | 4915 { NACLi_X87, |
4912 NACL_EMPTY_IFLAGS, | 4916 NACL_EMPTY_IFLAGS, |
4913 InstFcom, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, | 4917 InstFcom, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, |
4914 /* 1045 */ | 4918 /* 1046 */ |
4915 { NACLi_X87, | 4919 { NACLi_X87, |
4916 NACL_EMPTY_IFLAGS, | 4920 NACL_EMPTY_IFLAGS, |
4917 InstFcom, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, | 4921 InstFcom, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, |
4918 /* 1046 */ | 4922 /* 1047 */ |
4919 { NACLi_X87, | 4923 { NACLi_X87, |
4920 NACL_EMPTY_IFLAGS, | 4924 NACL_EMPTY_IFLAGS, |
4921 InstFcom, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, | 4925 InstFcom, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, |
4922 /* 1047 */ | 4926 /* 1048 */ |
4923 { NACLi_X87, | 4927 { NACLi_X87, |
4924 NACL_EMPTY_IFLAGS, | 4928 NACL_EMPTY_IFLAGS, |
4925 InstFcomp, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, | 4929 InstFcomp, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, |
4926 /* 1048 */ | 4930 /* 1049 */ |
4927 { NACLi_X87, | 4931 { NACLi_X87, |
4928 NACL_EMPTY_IFLAGS, | 4932 NACL_EMPTY_IFLAGS, |
4929 InstFcomp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 4933 InstFcomp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
4930 /* 1049 */ | 4934 /* 1050 */ |
4931 { NACLi_X87, | 4935 { NACLi_X87, |
4932 NACL_EMPTY_IFLAGS, | 4936 NACL_EMPTY_IFLAGS, |
4933 InstFcomp, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, | 4937 InstFcomp, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, |
4934 /* 1050 */ | 4938 /* 1051 */ |
4935 { NACLi_X87, | 4939 { NACLi_X87, |
4936 NACL_EMPTY_IFLAGS, | 4940 NACL_EMPTY_IFLAGS, |
4937 InstFcomp, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, | 4941 InstFcomp, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, |
4938 /* 1051 */ | 4942 /* 1052 */ |
4939 { NACLi_X87, | 4943 { NACLi_X87, |
4940 NACL_EMPTY_IFLAGS, | 4944 NACL_EMPTY_IFLAGS, |
4941 InstFcomp, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, | 4945 InstFcomp, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, |
4942 /* 1052 */ | 4946 /* 1053 */ |
4943 { NACLi_X87, | 4947 { NACLi_X87, |
4944 NACL_EMPTY_IFLAGS, | 4948 NACL_EMPTY_IFLAGS, |
4945 InstFcomp, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, | 4949 InstFcomp, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, |
4946 /* 1053 */ | 4950 /* 1054 */ |
4947 { NACLi_X87, | 4951 { NACLi_X87, |
4948 NACL_EMPTY_IFLAGS, | 4952 NACL_EMPTY_IFLAGS, |
4949 InstFcomp, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, | 4953 InstFcomp, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, |
4950 /* 1054 */ | 4954 /* 1055 */ |
4951 { NACLi_X87, | 4955 { NACLi_X87, |
4952 NACL_EMPTY_IFLAGS, | 4956 NACL_EMPTY_IFLAGS, |
4953 InstFcomp, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, | 4957 InstFcomp, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, |
4954 /* 1055 */ | 4958 /* 1056 */ |
4955 { NACLi_X87, | 4959 { NACLi_X87, |
4956 NACL_EMPTY_IFLAGS, | 4960 NACL_EMPTY_IFLAGS, |
4957 InstFsub, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 4961 InstFsub, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
4958 /* 1056 */ | 4962 /* 1057 */ |
4959 { NACLi_X87, | 4963 { NACLi_X87, |
4960 NACL_EMPTY_IFLAGS, | 4964 NACL_EMPTY_IFLAGS, |
4961 InstFsub, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 4965 InstFsub, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
4962 /* 1057 */ | 4966 /* 1058 */ |
4963 { NACLi_X87, | 4967 { NACLi_X87, |
4964 NACL_EMPTY_IFLAGS, | 4968 NACL_EMPTY_IFLAGS, |
4965 InstFsub, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 4969 InstFsub, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
4966 /* 1058 */ | 4970 /* 1059 */ |
4967 { NACLi_X87, | 4971 { NACLi_X87, |
4968 NACL_EMPTY_IFLAGS, | 4972 NACL_EMPTY_IFLAGS, |
4969 InstFsub, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 4973 InstFsub, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
4970 /* 1059 */ | 4974 /* 1060 */ |
4971 { NACLi_X87, | 4975 { NACLi_X87, |
4972 NACL_EMPTY_IFLAGS, | 4976 NACL_EMPTY_IFLAGS, |
4973 InstFsub, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 4977 InstFsub, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
4974 /* 1060 */ | 4978 /* 1061 */ |
4975 { NACLi_X87, | 4979 { NACLi_X87, |
4976 NACL_EMPTY_IFLAGS, | 4980 NACL_EMPTY_IFLAGS, |
4977 InstFsub, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 4981 InstFsub, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
4978 /* 1061 */ | 4982 /* 1062 */ |
4979 { NACLi_X87, | 4983 { NACLi_X87, |
4980 NACL_EMPTY_IFLAGS, | 4984 NACL_EMPTY_IFLAGS, |
4981 InstFsub, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 4985 InstFsub, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
4982 /* 1062 */ | 4986 /* 1063 */ |
4983 { NACLi_X87, | 4987 { NACLi_X87, |
4984 NACL_EMPTY_IFLAGS, | 4988 NACL_EMPTY_IFLAGS, |
4985 InstFsub, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 4989 InstFsub, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
4986 /* 1063 */ | 4990 /* 1064 */ |
4987 { NACLi_X87, | 4991 { NACLi_X87, |
4988 NACL_EMPTY_IFLAGS, | 4992 NACL_EMPTY_IFLAGS, |
4989 InstFsubr, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 4993 InstFsubr, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
4990 /* 1064 */ | 4994 /* 1065 */ |
4991 { NACLi_X87, | 4995 { NACLi_X87, |
4992 NACL_EMPTY_IFLAGS, | 4996 NACL_EMPTY_IFLAGS, |
4993 InstFsubr, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 4997 InstFsubr, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
4994 /* 1065 */ | 4998 /* 1066 */ |
4995 { NACLi_X87, | 4999 { NACLi_X87, |
4996 NACL_EMPTY_IFLAGS, | 5000 NACL_EMPTY_IFLAGS, |
4997 InstFsubr, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5001 InstFsubr, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
4998 /* 1066 */ | 5002 /* 1067 */ |
4999 { NACLi_X87, | 5003 { NACLi_X87, |
5000 NACL_EMPTY_IFLAGS, | 5004 NACL_EMPTY_IFLAGS, |
5001 InstFsubr, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5005 InstFsubr, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5002 /* 1067 */ | 5006 /* 1068 */ |
5003 { NACLi_X87, | 5007 { NACLi_X87, |
5004 NACL_EMPTY_IFLAGS, | 5008 NACL_EMPTY_IFLAGS, |
5005 InstFsubr, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5009 InstFsubr, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5006 /* 1068 */ | 5010 /* 1069 */ |
5007 { NACLi_X87, | 5011 { NACLi_X87, |
5008 NACL_EMPTY_IFLAGS, | 5012 NACL_EMPTY_IFLAGS, |
5009 InstFsubr, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5013 InstFsubr, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5010 /* 1069 */ | 5014 /* 1070 */ |
5011 { NACLi_X87, | 5015 { NACLi_X87, |
5012 NACL_EMPTY_IFLAGS, | 5016 NACL_EMPTY_IFLAGS, |
5013 InstFsubr, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5017 InstFsubr, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5014 /* 1070 */ | 5018 /* 1071 */ |
5015 { NACLi_X87, | 5019 { NACLi_X87, |
5016 NACL_EMPTY_IFLAGS, | 5020 NACL_EMPTY_IFLAGS, |
5017 InstFsubr, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5021 InstFsubr, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5018 /* 1071 */ | 5022 /* 1072 */ |
5019 { NACLi_X87, | 5023 { NACLi_X87, |
5020 NACL_EMPTY_IFLAGS, | 5024 NACL_EMPTY_IFLAGS, |
5021 InstFdiv, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5025 InstFdiv, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5022 /* 1072 */ | 5026 /* 1073 */ |
5023 { NACLi_X87, | 5027 { NACLi_X87, |
5024 NACL_EMPTY_IFLAGS, | 5028 NACL_EMPTY_IFLAGS, |
5025 InstFdiv, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5029 InstFdiv, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5026 /* 1073 */ | 5030 /* 1074 */ |
5027 { NACLi_X87, | 5031 { NACLi_X87, |
5028 NACL_EMPTY_IFLAGS, | 5032 NACL_EMPTY_IFLAGS, |
5029 InstFdiv, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5033 InstFdiv, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5030 /* 1074 */ | 5034 /* 1075 */ |
5031 { NACLi_X87, | 5035 { NACLi_X87, |
5032 NACL_EMPTY_IFLAGS, | 5036 NACL_EMPTY_IFLAGS, |
5033 InstFdiv, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5037 InstFdiv, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5034 /* 1075 */ | 5038 /* 1076 */ |
5035 { NACLi_X87, | 5039 { NACLi_X87, |
5036 NACL_EMPTY_IFLAGS, | 5040 NACL_EMPTY_IFLAGS, |
5037 InstFdiv, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5041 InstFdiv, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5038 /* 1076 */ | 5042 /* 1077 */ |
5039 { NACLi_X87, | 5043 { NACLi_X87, |
5040 NACL_EMPTY_IFLAGS, | 5044 NACL_EMPTY_IFLAGS, |
5041 InstFdiv, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5045 InstFdiv, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5042 /* 1077 */ | 5046 /* 1078 */ |
5043 { NACLi_X87, | 5047 { NACLi_X87, |
5044 NACL_EMPTY_IFLAGS, | 5048 NACL_EMPTY_IFLAGS, |
5045 InstFdiv, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5049 InstFdiv, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5046 /* 1078 */ | 5050 /* 1079 */ |
5047 { NACLi_X87, | 5051 { NACLi_X87, |
5048 NACL_EMPTY_IFLAGS, | 5052 NACL_EMPTY_IFLAGS, |
5049 InstFdiv, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5053 InstFdiv, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5050 /* 1079 */ | 5054 /* 1080 */ |
5051 { NACLi_X87, | 5055 { NACLi_X87, |
5052 NACL_EMPTY_IFLAGS, | 5056 NACL_EMPTY_IFLAGS, |
5053 InstFdivr, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5057 InstFdivr, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5054 /* 1080 */ | 5058 /* 1081 */ |
5055 { NACLi_X87, | 5059 { NACLi_X87, |
5056 NACL_EMPTY_IFLAGS, | 5060 NACL_EMPTY_IFLAGS, |
5057 InstFdivr, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5061 InstFdivr, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5058 /* 1081 */ | 5062 /* 1082 */ |
5059 { NACLi_X87, | 5063 { NACLi_X87, |
5060 NACL_EMPTY_IFLAGS, | 5064 NACL_EMPTY_IFLAGS, |
5061 InstFdivr, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5065 InstFdivr, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5062 /* 1082 */ | 5066 /* 1083 */ |
5063 { NACLi_X87, | 5067 { NACLi_X87, |
5064 NACL_EMPTY_IFLAGS, | 5068 NACL_EMPTY_IFLAGS, |
5065 InstFdivr, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5069 InstFdivr, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5066 /* 1083 */ | 5070 /* 1084 */ |
5067 { NACLi_X87, | 5071 { NACLi_X87, |
5068 NACL_EMPTY_IFLAGS, | 5072 NACL_EMPTY_IFLAGS, |
5069 InstFdivr, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5073 InstFdivr, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5070 /* 1084 */ | 5074 /* 1085 */ |
5071 { NACLi_X87, | 5075 { NACLi_X87, |
5072 NACL_EMPTY_IFLAGS, | 5076 NACL_EMPTY_IFLAGS, |
5073 InstFdivr, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5077 InstFdivr, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5074 /* 1085 */ | 5078 /* 1086 */ |
5075 { NACLi_X87, | 5079 { NACLi_X87, |
5076 NACL_EMPTY_IFLAGS, | 5080 NACL_EMPTY_IFLAGS, |
5077 InstFdivr, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5081 InstFdivr, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5078 /* 1086 */ | 5082 /* 1087 */ |
5079 { NACLi_X87, | 5083 { NACLi_X87, |
5080 NACL_EMPTY_IFLAGS, | 5084 NACL_EMPTY_IFLAGS, |
5081 InstFdivr, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5085 InstFdivr, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5082 /* 1087 */ | 5086 /* 1088 */ |
5083 { NACLi_X87, | 5087 { NACLi_X87, |
5084 NACL_EMPTY_IFLAGS, | 5088 NACL_EMPTY_IFLAGS, |
5085 InstFld, 0x00, 2, 653, NACL_OPCODE_NULL_OFFSET }, | 5089 InstFld, 0x00, 2, 653, NACL_OPCODE_NULL_OFFSET }, |
5086 /* 1088 */ | 5090 /* 1089 */ |
5087 { NACLi_X87, | 5091 { NACLi_X87, |
5088 NACL_EMPTY_IFLAGS, | 5092 NACL_EMPTY_IFLAGS, |
5089 InstFld, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET }, | 5093 InstFld, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET }, |
5090 /* 1089 */ | 5094 /* 1090 */ |
5091 { NACLi_X87, | 5095 { NACLi_X87, |
5092 NACL_EMPTY_IFLAGS, | 5096 NACL_EMPTY_IFLAGS, |
5093 InstFld, 0x00, 2, 657, NACL_OPCODE_NULL_OFFSET }, | 5097 InstFld, 0x00, 2, 657, NACL_OPCODE_NULL_OFFSET }, |
5094 /* 1090 */ | 5098 /* 1091 */ |
5095 { NACLi_X87, | 5099 { NACLi_X87, |
5096 NACL_EMPTY_IFLAGS, | 5100 NACL_EMPTY_IFLAGS, |
5097 InstFld, 0x00, 2, 659, NACL_OPCODE_NULL_OFFSET }, | 5101 InstFld, 0x00, 2, 659, NACL_OPCODE_NULL_OFFSET }, |
5098 /* 1091 */ | 5102 /* 1092 */ |
5099 { NACLi_X87, | 5103 { NACLi_X87, |
5100 NACL_EMPTY_IFLAGS, | 5104 NACL_EMPTY_IFLAGS, |
5101 InstFld, 0x00, 2, 661, NACL_OPCODE_NULL_OFFSET }, | 5105 InstFld, 0x00, 2, 661, NACL_OPCODE_NULL_OFFSET }, |
5102 /* 1092 */ | 5106 /* 1093 */ |
5103 { NACLi_X87, | 5107 { NACLi_X87, |
5104 NACL_EMPTY_IFLAGS, | 5108 NACL_EMPTY_IFLAGS, |
5105 InstFld, 0x00, 2, 663, NACL_OPCODE_NULL_OFFSET }, | 5109 InstFld, 0x00, 2, 663, NACL_OPCODE_NULL_OFFSET }, |
5106 /* 1093 */ | 5110 /* 1094 */ |
5107 { NACLi_X87, | 5111 { NACLi_X87, |
5108 NACL_EMPTY_IFLAGS, | 5112 NACL_EMPTY_IFLAGS, |
5109 InstFld, 0x00, 2, 665, NACL_OPCODE_NULL_OFFSET }, | 5113 InstFld, 0x00, 2, 665, NACL_OPCODE_NULL_OFFSET }, |
5110 /* 1094 */ | 5114 /* 1095 */ |
5111 { NACLi_X87, | 5115 { NACLi_X87, |
5112 NACL_EMPTY_IFLAGS, | 5116 NACL_EMPTY_IFLAGS, |
5113 InstFld, 0x00, 2, 667, NACL_OPCODE_NULL_OFFSET }, | 5117 InstFld, 0x00, 2, 667, NACL_OPCODE_NULL_OFFSET }, |
5114 /* 1095 */ | 5118 /* 1096 */ |
5115 { NACLi_X87, | 5119 { NACLi_X87, |
5116 NACL_EMPTY_IFLAGS, | 5120 NACL_EMPTY_IFLAGS, |
5117 InstFxch, 0x00, 2, 669, NACL_OPCODE_NULL_OFFSET }, | 5121 InstFxch, 0x00, 2, 669, NACL_OPCODE_NULL_OFFSET }, |
5118 /* 1096 */ | 5122 /* 1097 */ |
5119 { NACLi_X87, | 5123 { NACLi_X87, |
5120 NACL_EMPTY_IFLAGS, | 5124 NACL_EMPTY_IFLAGS, |
5121 InstFxch, 0x00, 2, 671, NACL_OPCODE_NULL_OFFSET }, | 5125 InstFxch, 0x00, 2, 671, NACL_OPCODE_NULL_OFFSET }, |
5122 /* 1097 */ | 5126 /* 1098 */ |
5123 { NACLi_X87, | 5127 { NACLi_X87, |
5124 NACL_EMPTY_IFLAGS, | 5128 NACL_EMPTY_IFLAGS, |
5125 InstFxch, 0x00, 2, 673, NACL_OPCODE_NULL_OFFSET }, | 5129 InstFxch, 0x00, 2, 673, NACL_OPCODE_NULL_OFFSET }, |
5126 /* 1098 */ | 5130 /* 1099 */ |
5127 { NACLi_X87, | 5131 { NACLi_X87, |
5128 NACL_EMPTY_IFLAGS, | 5132 NACL_EMPTY_IFLAGS, |
5129 InstFxch, 0x00, 2, 675, NACL_OPCODE_NULL_OFFSET }, | 5133 InstFxch, 0x00, 2, 675, NACL_OPCODE_NULL_OFFSET }, |
5130 /* 1099 */ | 5134 /* 1100 */ |
5131 { NACLi_X87, | 5135 { NACLi_X87, |
5132 NACL_EMPTY_IFLAGS, | 5136 NACL_EMPTY_IFLAGS, |
5133 InstFxch, 0x00, 2, 677, NACL_OPCODE_NULL_OFFSET }, | 5137 InstFxch, 0x00, 2, 677, NACL_OPCODE_NULL_OFFSET }, |
5134 /* 1100 */ | 5138 /* 1101 */ |
5135 { NACLi_X87, | 5139 { NACLi_X87, |
5136 NACL_EMPTY_IFLAGS, | 5140 NACL_EMPTY_IFLAGS, |
5137 InstFxch, 0x00, 2, 679, NACL_OPCODE_NULL_OFFSET }, | 5141 InstFxch, 0x00, 2, 679, NACL_OPCODE_NULL_OFFSET }, |
5138 /* 1101 */ | 5142 /* 1102 */ |
5139 { NACLi_X87, | 5143 { NACLi_X87, |
5140 NACL_EMPTY_IFLAGS, | 5144 NACL_EMPTY_IFLAGS, |
5141 InstFxch, 0x00, 2, 681, NACL_OPCODE_NULL_OFFSET }, | 5145 InstFxch, 0x00, 2, 681, NACL_OPCODE_NULL_OFFSET }, |
5142 /* 1102 */ | 5146 /* 1103 */ |
5143 { NACLi_X87, | 5147 { NACLi_X87, |
5144 NACL_EMPTY_IFLAGS, | 5148 NACL_EMPTY_IFLAGS, |
5145 InstFxch, 0x00, 2, 683, NACL_OPCODE_NULL_OFFSET }, | 5149 InstFxch, 0x00, 2, 683, NACL_OPCODE_NULL_OFFSET }, |
5146 /* 1103 */ | 5150 /* 1104 */ |
5147 { NACLi_X87, | 5151 { NACLi_X87, |
5148 NACL_EMPTY_IFLAGS, | 5152 NACL_EMPTY_IFLAGS, |
5149 InstFnop, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 5153 InstFnop, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
5150 /* 1104 */ | 5154 /* 1105 */ |
5151 { NACLi_X87, | 5155 { NACLi_X87, |
5152 NACL_EMPTY_IFLAGS, | 5156 NACL_EMPTY_IFLAGS, |
5153 InstFchs, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5157 InstFchs, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5154 /* 1105 */ | 5158 /* 1106 */ |
5155 { NACLi_X87, | 5159 { NACLi_X87, |
5156 NACL_EMPTY_IFLAGS, | 5160 NACL_EMPTY_IFLAGS, |
5157 InstFabs, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5161 InstFabs, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5158 /* 1106 */ | 5162 /* 1107 */ |
5159 { NACLi_X87, | 5163 { NACLi_X87, |
5160 NACL_EMPTY_IFLAGS, | 5164 NACL_EMPTY_IFLAGS, |
5161 InstFtst, 0x00, 1, 204, NACL_OPCODE_NULL_OFFSET }, | 5165 InstFtst, 0x00, 1, 204, NACL_OPCODE_NULL_OFFSET }, |
5162 /* 1107 */ | 5166 /* 1108 */ |
5163 { NACLi_X87, | 5167 { NACLi_X87, |
5164 NACL_EMPTY_IFLAGS, | 5168 NACL_EMPTY_IFLAGS, |
5165 InstFxam, 0x00, 1, 204, NACL_OPCODE_NULL_OFFSET }, | 5169 InstFxam, 0x00, 1, 204, NACL_OPCODE_NULL_OFFSET }, |
5166 /* 1108 */ | 5170 /* 1109 */ |
5167 { NACLi_X87, | 5171 { NACLi_X87, |
5168 NACL_EMPTY_IFLAGS, | 5172 NACL_EMPTY_IFLAGS, |
5169 InstFld1, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5173 InstFld1, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5170 /* 1109 */ | 5174 /* 1110 */ |
5171 { NACLi_X87, | 5175 { NACLi_X87, |
5172 NACL_EMPTY_IFLAGS, | 5176 NACL_EMPTY_IFLAGS, |
5173 InstFldl2t, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5177 InstFldl2t, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5174 /* 1110 */ | 5178 /* 1111 */ |
5175 { NACLi_X87, | 5179 { NACLi_X87, |
5176 NACL_EMPTY_IFLAGS, | 5180 NACL_EMPTY_IFLAGS, |
5177 InstFldl2e, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5181 InstFldl2e, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5178 /* 1111 */ | 5182 /* 1112 */ |
5179 { NACLi_X87, | 5183 { NACLi_X87, |
5180 NACL_EMPTY_IFLAGS, | 5184 NACL_EMPTY_IFLAGS, |
5181 InstFldpi, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5185 InstFldpi, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5182 /* 1112 */ | 5186 /* 1113 */ |
5183 { NACLi_X87, | 5187 { NACLi_X87, |
5184 NACL_EMPTY_IFLAGS, | 5188 NACL_EMPTY_IFLAGS, |
5185 InstFldlg2, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5189 InstFldlg2, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5186 /* 1113 */ | 5190 /* 1114 */ |
5187 { NACLi_X87, | 5191 { NACLi_X87, |
5188 NACL_EMPTY_IFLAGS, | 5192 NACL_EMPTY_IFLAGS, |
5189 InstFldln2, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5193 InstFldln2, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5190 /* 1114 */ | 5194 /* 1115 */ |
5191 { NACLi_X87, | 5195 { NACLi_X87, |
5192 NACL_EMPTY_IFLAGS, | 5196 NACL_EMPTY_IFLAGS, |
5193 InstFldz, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5197 InstFldz, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5194 /* 1115 */ | 5198 /* 1116 */ |
5195 { NACLi_X87, | 5199 { NACLi_X87, |
5196 NACL_EMPTY_IFLAGS, | 5200 NACL_EMPTY_IFLAGS, |
5197 InstF2xm1, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5201 InstF2xm1, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5198 /* 1116 */ | 5202 /* 1117 */ |
5199 { NACLi_X87, | 5203 { NACLi_X87, |
5200 NACL_EMPTY_IFLAGS, | 5204 NACL_EMPTY_IFLAGS, |
5201 InstFyl2x, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5205 InstFyl2x, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5202 /* 1117 */ | 5206 /* 1118 */ |
5203 { NACLi_X87, | 5207 { NACLi_X87, |
5204 NACL_EMPTY_IFLAGS, | 5208 NACL_EMPTY_IFLAGS, |
5205 InstFptan, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET }, | 5209 InstFptan, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET }, |
5206 /* 1118 */ | 5210 /* 1119 */ |
5207 { NACLi_X87, | 5211 { NACLi_X87, |
5208 NACL_EMPTY_IFLAGS, | 5212 NACL_EMPTY_IFLAGS, |
5209 InstFpatan, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5213 InstFpatan, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5210 /* 1119 */ | 5214 /* 1120 */ |
5211 { NACLi_X87, | 5215 { NACLi_X87, |
5212 NACL_EMPTY_IFLAGS, | 5216 NACL_EMPTY_IFLAGS, |
5213 InstFxtract, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET }, | 5217 InstFxtract, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET }, |
5214 /* 1120 */ | 5218 /* 1121 */ |
5215 { NACLi_X87, | 5219 { NACLi_X87, |
5216 NACL_EMPTY_IFLAGS, | 5220 NACL_EMPTY_IFLAGS, |
5217 InstFprem1, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5221 InstFprem1, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5218 /* 1121 */ | 5222 /* 1122 */ |
5219 { NACLi_X87, | 5223 { NACLi_X87, |
5220 NACL_EMPTY_IFLAGS, | 5224 NACL_EMPTY_IFLAGS, |
5221 InstFdecstp, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 5225 InstFdecstp, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
5222 /* 1122 */ | 5226 /* 1123 */ |
5223 { NACLi_X87, | 5227 { NACLi_X87, |
5224 NACL_EMPTY_IFLAGS, | 5228 NACL_EMPTY_IFLAGS, |
5225 InstFincstp, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 5229 InstFincstp, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
5226 /* 1123 */ | 5230 /* 1124 */ |
5227 { NACLi_X87, | 5231 { NACLi_X87, |
5228 NACL_EMPTY_IFLAGS, | 5232 NACL_EMPTY_IFLAGS, |
5229 InstFprem, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5233 InstFprem, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5230 /* 1124 */ | 5234 /* 1125 */ |
5231 { NACLi_X87, | 5235 { NACLi_X87, |
5232 NACL_EMPTY_IFLAGS, | 5236 NACL_EMPTY_IFLAGS, |
5233 InstFyl2xp1, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5237 InstFyl2xp1, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5234 /* 1125 */ | 5238 /* 1126 */ |
5235 { NACLi_X87, | 5239 { NACLi_X87, |
5236 NACL_EMPTY_IFLAGS, | 5240 NACL_EMPTY_IFLAGS, |
5237 InstFsqrt, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5241 InstFsqrt, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5238 /* 1126 */ | 5242 /* 1127 */ |
5239 { NACLi_X87_FSINCOS, | 5243 { NACLi_X87_FSINCOS, |
5240 NACL_EMPTY_IFLAGS, | 5244 NACL_EMPTY_IFLAGS, |
5241 InstFsincos, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET }, | 5245 InstFsincos, 0x00, 2, 655, NACL_OPCODE_NULL_OFFSET }, |
5242 /* 1127 */ | 5246 /* 1128 */ |
5243 { NACLi_X87, | 5247 { NACLi_X87, |
5244 NACL_EMPTY_IFLAGS, | 5248 NACL_EMPTY_IFLAGS, |
5245 InstFrndint, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5249 InstFrndint, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5246 /* 1128 */ | 5250 /* 1129 */ |
5247 { NACLi_X87, | 5251 { NACLi_X87, |
5248 NACL_EMPTY_IFLAGS, | 5252 NACL_EMPTY_IFLAGS, |
5249 InstFscale, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5253 InstFscale, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5250 /* 1129 */ | 5254 /* 1130 */ |
5251 { NACLi_X87, | 5255 { NACLi_X87, |
5252 NACL_EMPTY_IFLAGS, | 5256 NACL_EMPTY_IFLAGS, |
5253 InstFsin, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5257 InstFsin, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5254 /* 1130 */ | 5258 /* 1131 */ |
5255 { NACLi_X87, | 5259 { NACLi_X87, |
5256 NACL_EMPTY_IFLAGS, | 5260 NACL_EMPTY_IFLAGS, |
5257 InstFcos, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, | 5261 InstFcos, 0x00, 1, 202, NACL_OPCODE_NULL_OFFSET }, |
5258 /* 1131 */ | 5262 /* 1132 */ |
5259 { NACLi_X87, | 5263 { NACLi_X87, |
5260 NACL_EMPTY_IFLAGS, | 5264 NACL_EMPTY_IFLAGS, |
5261 InstFcmovb, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5265 InstFcmovb, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5262 /* 1132 */ | 5266 /* 1133 */ |
5263 { NACLi_X87, | 5267 { NACLi_X87, |
5264 NACL_EMPTY_IFLAGS, | 5268 NACL_EMPTY_IFLAGS, |
5265 InstFcmovb, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5269 InstFcmovb, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5266 /* 1133 */ | 5270 /* 1134 */ |
5267 { NACLi_X87, | 5271 { NACLi_X87, |
5268 NACL_EMPTY_IFLAGS, | 5272 NACL_EMPTY_IFLAGS, |
5269 InstFcmovb, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5273 InstFcmovb, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5270 /* 1134 */ | 5274 /* 1135 */ |
5271 { NACLi_X87, | 5275 { NACLi_X87, |
5272 NACL_EMPTY_IFLAGS, | 5276 NACL_EMPTY_IFLAGS, |
5273 InstFcmovb, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5277 InstFcmovb, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5274 /* 1135 */ | 5278 /* 1136 */ |
5275 { NACLi_X87, | 5279 { NACLi_X87, |
5276 NACL_EMPTY_IFLAGS, | 5280 NACL_EMPTY_IFLAGS, |
5277 InstFcmovb, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5281 InstFcmovb, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5278 /* 1136 */ | 5282 /* 1137 */ |
5279 { NACLi_X87, | 5283 { NACLi_X87, |
5280 NACL_EMPTY_IFLAGS, | 5284 NACL_EMPTY_IFLAGS, |
5281 InstFcmovb, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5285 InstFcmovb, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5282 /* 1137 */ | 5286 /* 1138 */ |
5283 { NACLi_X87, | 5287 { NACLi_X87, |
5284 NACL_EMPTY_IFLAGS, | 5288 NACL_EMPTY_IFLAGS, |
5285 InstFcmovb, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5289 InstFcmovb, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5286 /* 1138 */ | 5290 /* 1139 */ |
5287 { NACLi_X87, | 5291 { NACLi_X87, |
5288 NACL_EMPTY_IFLAGS, | 5292 NACL_EMPTY_IFLAGS, |
5289 InstFcmovb, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5293 InstFcmovb, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5290 /* 1139 */ | 5294 /* 1140 */ |
5291 { NACLi_X87, | 5295 { NACLi_X87, |
5292 NACL_EMPTY_IFLAGS, | 5296 NACL_EMPTY_IFLAGS, |
5293 InstFcmove, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5297 InstFcmove, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5294 /* 1140 */ | 5298 /* 1141 */ |
5295 { NACLi_X87, | 5299 { NACLi_X87, |
5296 NACL_EMPTY_IFLAGS, | 5300 NACL_EMPTY_IFLAGS, |
5297 InstFcmove, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5301 InstFcmove, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5298 /* 1141 */ | 5302 /* 1142 */ |
5299 { NACLi_X87, | 5303 { NACLi_X87, |
5300 NACL_EMPTY_IFLAGS, | 5304 NACL_EMPTY_IFLAGS, |
5301 InstFcmove, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5305 InstFcmove, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5302 /* 1142 */ | 5306 /* 1143 */ |
5303 { NACLi_X87, | 5307 { NACLi_X87, |
5304 NACL_EMPTY_IFLAGS, | 5308 NACL_EMPTY_IFLAGS, |
5305 InstFcmove, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5309 InstFcmove, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5306 /* 1143 */ | 5310 /* 1144 */ |
5307 { NACLi_X87, | 5311 { NACLi_X87, |
5308 NACL_EMPTY_IFLAGS, | 5312 NACL_EMPTY_IFLAGS, |
5309 InstFcmove, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5313 InstFcmove, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5310 /* 1144 */ | 5314 /* 1145 */ |
5311 { NACLi_X87, | 5315 { NACLi_X87, |
5312 NACL_EMPTY_IFLAGS, | 5316 NACL_EMPTY_IFLAGS, |
5313 InstFcmove, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5317 InstFcmove, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5314 /* 1145 */ | 5318 /* 1146 */ |
5315 { NACLi_X87, | 5319 { NACLi_X87, |
5316 NACL_EMPTY_IFLAGS, | 5320 NACL_EMPTY_IFLAGS, |
5317 InstFcmove, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5321 InstFcmove, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5318 /* 1146 */ | 5322 /* 1147 */ |
5319 { NACLi_X87, | 5323 { NACLi_X87, |
5320 NACL_EMPTY_IFLAGS, | 5324 NACL_EMPTY_IFLAGS, |
5321 InstFcmove, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5325 InstFcmove, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5322 /* 1147 */ | 5326 /* 1148 */ |
5323 { NACLi_X87, | 5327 { NACLi_X87, |
5324 NACL_EMPTY_IFLAGS, | 5328 NACL_EMPTY_IFLAGS, |
5325 InstFcmovbe, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5329 InstFcmovbe, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5326 /* 1148 */ | 5330 /* 1149 */ |
5327 { NACLi_X87, | 5331 { NACLi_X87, |
5328 NACL_EMPTY_IFLAGS, | 5332 NACL_EMPTY_IFLAGS, |
5329 InstFcmovbe, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5333 InstFcmovbe, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5330 /* 1149 */ | 5334 /* 1150 */ |
5331 { NACLi_X87, | 5335 { NACLi_X87, |
5332 NACL_EMPTY_IFLAGS, | 5336 NACL_EMPTY_IFLAGS, |
5333 InstFcmovbe, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5337 InstFcmovbe, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5334 /* 1150 */ | 5338 /* 1151 */ |
5335 { NACLi_X87, | 5339 { NACLi_X87, |
5336 NACL_EMPTY_IFLAGS, | 5340 NACL_EMPTY_IFLAGS, |
5337 InstFcmovbe, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5341 InstFcmovbe, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5338 /* 1151 */ | 5342 /* 1152 */ |
5339 { NACLi_X87, | 5343 { NACLi_X87, |
5340 NACL_EMPTY_IFLAGS, | 5344 NACL_EMPTY_IFLAGS, |
5341 InstFcmovbe, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5345 InstFcmovbe, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5342 /* 1152 */ | 5346 /* 1153 */ |
5343 { NACLi_X87, | 5347 { NACLi_X87, |
5344 NACL_EMPTY_IFLAGS, | 5348 NACL_EMPTY_IFLAGS, |
5345 InstFcmovbe, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5349 InstFcmovbe, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5346 /* 1153 */ | 5350 /* 1154 */ |
5347 { NACLi_X87, | 5351 { NACLi_X87, |
5348 NACL_EMPTY_IFLAGS, | 5352 NACL_EMPTY_IFLAGS, |
5349 InstFcmovbe, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5353 InstFcmovbe, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5350 /* 1154 */ | 5354 /* 1155 */ |
5351 { NACLi_X87, | 5355 { NACLi_X87, |
5352 NACL_EMPTY_IFLAGS, | 5356 NACL_EMPTY_IFLAGS, |
5353 InstFcmovbe, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5357 InstFcmovbe, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5354 /* 1155 */ | 5358 /* 1156 */ |
5355 { NACLi_X87, | 5359 { NACLi_X87, |
5356 NACL_EMPTY_IFLAGS, | 5360 NACL_EMPTY_IFLAGS, |
5357 InstFcmovu, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5361 InstFcmovu, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5358 /* 1156 */ | 5362 /* 1157 */ |
5359 { NACLi_X87, | 5363 { NACLi_X87, |
5360 NACL_EMPTY_IFLAGS, | 5364 NACL_EMPTY_IFLAGS, |
5361 InstFcmovu, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5365 InstFcmovu, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5362 /* 1157 */ | 5366 /* 1158 */ |
5363 { NACLi_X87, | 5367 { NACLi_X87, |
5364 NACL_EMPTY_IFLAGS, | 5368 NACL_EMPTY_IFLAGS, |
5365 InstFcmovu, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5369 InstFcmovu, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5366 /* 1158 */ | 5370 /* 1159 */ |
5367 { NACLi_X87, | 5371 { NACLi_X87, |
5368 NACL_EMPTY_IFLAGS, | 5372 NACL_EMPTY_IFLAGS, |
5369 InstFcmovu, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5373 InstFcmovu, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5370 /* 1159 */ | 5374 /* 1160 */ |
5371 { NACLi_X87, | 5375 { NACLi_X87, |
5372 NACL_EMPTY_IFLAGS, | 5376 NACL_EMPTY_IFLAGS, |
5373 InstFcmovu, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5377 InstFcmovu, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5374 /* 1160 */ | 5378 /* 1161 */ |
5375 { NACLi_X87, | 5379 { NACLi_X87, |
5376 NACL_EMPTY_IFLAGS, | 5380 NACL_EMPTY_IFLAGS, |
5377 InstFcmovu, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5381 InstFcmovu, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5378 /* 1161 */ | 5382 /* 1162 */ |
5379 { NACLi_X87, | 5383 { NACLi_X87, |
5380 NACL_EMPTY_IFLAGS, | 5384 NACL_EMPTY_IFLAGS, |
5381 InstFcmovu, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5385 InstFcmovu, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5382 /* 1162 */ | 5386 /* 1163 */ |
5383 { NACLi_X87, | 5387 { NACLi_X87, |
5384 NACL_EMPTY_IFLAGS, | 5388 NACL_EMPTY_IFLAGS, |
5385 InstFcmovu, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5389 InstFcmovu, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5386 /* 1163 */ | 5390 /* 1164 */ |
5387 { NACLi_X87, | 5391 { NACLi_X87, |
5388 NACL_EMPTY_IFLAGS, | 5392 NACL_EMPTY_IFLAGS, |
5389 InstFucompp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 5393 InstFucompp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
5390 /* 1164 */ | 5394 /* 1165 */ |
5391 { NACLi_X87, | 5395 { NACLi_X87, |
5392 NACL_EMPTY_IFLAGS, | 5396 NACL_EMPTY_IFLAGS, |
5393 InstFcmovnb, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5397 InstFcmovnb, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5394 /* 1165 */ | 5398 /* 1166 */ |
5395 { NACLi_X87, | 5399 { NACLi_X87, |
5396 NACL_EMPTY_IFLAGS, | 5400 NACL_EMPTY_IFLAGS, |
5397 InstFcmovnb, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5401 InstFcmovnb, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5398 /* 1166 */ | 5402 /* 1167 */ |
5399 { NACLi_X87, | 5403 { NACLi_X87, |
5400 NACL_EMPTY_IFLAGS, | 5404 NACL_EMPTY_IFLAGS, |
5401 InstFcmovnb, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5405 InstFcmovnb, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5402 /* 1167 */ | 5406 /* 1168 */ |
5403 { NACLi_X87, | 5407 { NACLi_X87, |
5404 NACL_EMPTY_IFLAGS, | 5408 NACL_EMPTY_IFLAGS, |
5405 InstFcmovnb, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5409 InstFcmovnb, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5406 /* 1168 */ | 5410 /* 1169 */ |
5407 { NACLi_X87, | 5411 { NACLi_X87, |
5408 NACL_EMPTY_IFLAGS, | 5412 NACL_EMPTY_IFLAGS, |
5409 InstFcmovnb, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5413 InstFcmovnb, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5410 /* 1169 */ | 5414 /* 1170 */ |
5411 { NACLi_X87, | 5415 { NACLi_X87, |
5412 NACL_EMPTY_IFLAGS, | 5416 NACL_EMPTY_IFLAGS, |
5413 InstFcmovnb, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5417 InstFcmovnb, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5414 /* 1170 */ | 5418 /* 1171 */ |
5415 { NACLi_X87, | 5419 { NACLi_X87, |
5416 NACL_EMPTY_IFLAGS, | 5420 NACL_EMPTY_IFLAGS, |
5417 InstFcmovnb, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5421 InstFcmovnb, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5418 /* 1171 */ | 5422 /* 1172 */ |
5419 { NACLi_X87, | 5423 { NACLi_X87, |
5420 NACL_EMPTY_IFLAGS, | 5424 NACL_EMPTY_IFLAGS, |
5421 InstFcmovnb, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5425 InstFcmovnb, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5422 /* 1172 */ | 5426 /* 1173 */ |
5423 { NACLi_X87, | 5427 { NACLi_X87, |
5424 NACL_EMPTY_IFLAGS, | 5428 NACL_EMPTY_IFLAGS, |
5425 InstFcmovne, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5429 InstFcmovne, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5426 /* 1173 */ | 5430 /* 1174 */ |
5427 { NACLi_X87, | 5431 { NACLi_X87, |
5428 NACL_EMPTY_IFLAGS, | 5432 NACL_EMPTY_IFLAGS, |
5429 InstFcmovne, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5433 InstFcmovne, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5430 /* 1174 */ | 5434 /* 1175 */ |
5431 { NACLi_X87, | 5435 { NACLi_X87, |
5432 NACL_EMPTY_IFLAGS, | 5436 NACL_EMPTY_IFLAGS, |
5433 InstFcmovne, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5437 InstFcmovne, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5434 /* 1175 */ | 5438 /* 1176 */ |
5435 { NACLi_X87, | 5439 { NACLi_X87, |
5436 NACL_EMPTY_IFLAGS, | 5440 NACL_EMPTY_IFLAGS, |
5437 InstFcmovne, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5441 InstFcmovne, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5438 /* 1176 */ | 5442 /* 1177 */ |
5439 { NACLi_X87, | 5443 { NACLi_X87, |
5440 NACL_EMPTY_IFLAGS, | 5444 NACL_EMPTY_IFLAGS, |
5441 InstFcmovne, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5445 InstFcmovne, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5442 /* 1177 */ | 5446 /* 1178 */ |
5443 { NACLi_X87, | 5447 { NACLi_X87, |
5444 NACL_EMPTY_IFLAGS, | 5448 NACL_EMPTY_IFLAGS, |
5445 InstFcmovne, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5449 InstFcmovne, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5446 /* 1178 */ | 5450 /* 1179 */ |
5447 { NACLi_X87, | 5451 { NACLi_X87, |
5448 NACL_EMPTY_IFLAGS, | 5452 NACL_EMPTY_IFLAGS, |
5449 InstFcmovne, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5453 InstFcmovne, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5450 /* 1179 */ | 5454 /* 1180 */ |
5451 { NACLi_X87, | 5455 { NACLi_X87, |
5452 NACL_EMPTY_IFLAGS, | 5456 NACL_EMPTY_IFLAGS, |
5453 InstFcmovne, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5457 InstFcmovne, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5454 /* 1180 */ | 5458 /* 1181 */ |
5455 { NACLi_X87, | 5459 { NACLi_X87, |
5456 NACL_EMPTY_IFLAGS, | 5460 NACL_EMPTY_IFLAGS, |
5457 InstFcmovnbe, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5461 InstFcmovnbe, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5458 /* 1181 */ | 5462 /* 1182 */ |
5459 { NACLi_X87, | 5463 { NACLi_X87, |
5460 NACL_EMPTY_IFLAGS, | 5464 NACL_EMPTY_IFLAGS, |
5461 InstFcmovnbe, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5465 InstFcmovnbe, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5462 /* 1182 */ | 5466 /* 1183 */ |
5463 { NACLi_X87, | 5467 { NACLi_X87, |
5464 NACL_EMPTY_IFLAGS, | 5468 NACL_EMPTY_IFLAGS, |
5465 InstFcmovnbe, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5469 InstFcmovnbe, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5466 /* 1183 */ | 5470 /* 1184 */ |
5467 { NACLi_X87, | 5471 { NACLi_X87, |
5468 NACL_EMPTY_IFLAGS, | 5472 NACL_EMPTY_IFLAGS, |
5469 InstFcmovnbe, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5473 InstFcmovnbe, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5470 /* 1184 */ | 5474 /* 1185 */ |
5471 { NACLi_X87, | 5475 { NACLi_X87, |
5472 NACL_EMPTY_IFLAGS, | 5476 NACL_EMPTY_IFLAGS, |
5473 InstFcmovnbe, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5477 InstFcmovnbe, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5474 /* 1185 */ | 5478 /* 1186 */ |
5475 { NACLi_X87, | 5479 { NACLi_X87, |
5476 NACL_EMPTY_IFLAGS, | 5480 NACL_EMPTY_IFLAGS, |
5477 InstFcmovnbe, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5481 InstFcmovnbe, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5478 /* 1186 */ | 5482 /* 1187 */ |
5479 { NACLi_X87, | 5483 { NACLi_X87, |
5480 NACL_EMPTY_IFLAGS, | 5484 NACL_EMPTY_IFLAGS, |
5481 InstFcmovnbe, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5485 InstFcmovnbe, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5482 /* 1187 */ | 5486 /* 1188 */ |
5483 { NACLi_X87, | 5487 { NACLi_X87, |
5484 NACL_EMPTY_IFLAGS, | 5488 NACL_EMPTY_IFLAGS, |
5485 InstFcmovnbe, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5489 InstFcmovnbe, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5486 /* 1188 */ | 5490 /* 1189 */ |
5487 { NACLi_X87, | 5491 { NACLi_X87, |
5488 NACL_EMPTY_IFLAGS, | 5492 NACL_EMPTY_IFLAGS, |
5489 InstFcmovnu, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5493 InstFcmovnu, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5490 /* 1189 */ | 5494 /* 1190 */ |
5491 { NACLi_X87, | 5495 { NACLi_X87, |
5492 NACL_EMPTY_IFLAGS, | 5496 NACL_EMPTY_IFLAGS, |
5493 InstFcmovnu, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, | 5497 InstFcmovnu, 0x00, 2, 623, NACL_OPCODE_NULL_OFFSET }, |
5494 /* 1190 */ | 5498 /* 1191 */ |
5495 { NACLi_X87, | 5499 { NACLi_X87, |
5496 NACL_EMPTY_IFLAGS, | 5500 NACL_EMPTY_IFLAGS, |
5497 InstFcmovnu, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, | 5501 InstFcmovnu, 0x00, 2, 625, NACL_OPCODE_NULL_OFFSET }, |
5498 /* 1191 */ | 5502 /* 1192 */ |
5499 { NACLi_X87, | 5503 { NACLi_X87, |
5500 NACL_EMPTY_IFLAGS, | 5504 NACL_EMPTY_IFLAGS, |
5501 InstFcmovnu, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, | 5505 InstFcmovnu, 0x00, 2, 627, NACL_OPCODE_NULL_OFFSET }, |
5502 /* 1192 */ | 5506 /* 1193 */ |
5503 { NACLi_X87, | 5507 { NACLi_X87, |
5504 NACL_EMPTY_IFLAGS, | 5508 NACL_EMPTY_IFLAGS, |
5505 InstFcmovnu, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, | 5509 InstFcmovnu, 0x00, 2, 629, NACL_OPCODE_NULL_OFFSET }, |
5506 /* 1193 */ | 5510 /* 1194 */ |
5507 { NACLi_X87, | 5511 { NACLi_X87, |
5508 NACL_EMPTY_IFLAGS, | 5512 NACL_EMPTY_IFLAGS, |
5509 InstFcmovnu, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, | 5513 InstFcmovnu, 0x00, 2, 631, NACL_OPCODE_NULL_OFFSET }, |
5510 /* 1194 */ | 5514 /* 1195 */ |
5511 { NACLi_X87, | 5515 { NACLi_X87, |
5512 NACL_EMPTY_IFLAGS, | 5516 NACL_EMPTY_IFLAGS, |
5513 InstFcmovnu, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, | 5517 InstFcmovnu, 0x00, 2, 633, NACL_OPCODE_NULL_OFFSET }, |
5514 /* 1195 */ | 5518 /* 1196 */ |
5515 { NACLi_X87, | 5519 { NACLi_X87, |
5516 NACL_EMPTY_IFLAGS, | 5520 NACL_EMPTY_IFLAGS, |
5517 InstFcmovnu, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, | 5521 InstFcmovnu, 0x00, 2, 635, NACL_OPCODE_NULL_OFFSET }, |
5518 /* 1196 */ | 5522 /* 1197 */ |
5519 { NACLi_X87, | 5523 { NACLi_X87, |
5520 NACL_EMPTY_IFLAGS, | 5524 NACL_EMPTY_IFLAGS, |
5521 InstFnclex, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 5525 InstFnclex, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
5522 /* 1197 */ | 5526 /* 1198 */ |
5523 { NACLi_X87, | 5527 { NACLi_X87, |
5524 NACL_EMPTY_IFLAGS, | 5528 NACL_EMPTY_IFLAGS, |
5525 InstFninit, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 5529 InstFninit, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
5526 /* 1198 */ | 5530 /* 1199 */ |
5527 { NACLi_X87, | 5531 { NACLi_X87, |
5528 NACL_EMPTY_IFLAGS, | 5532 NACL_EMPTY_IFLAGS, |
5529 InstFucomi, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, | 5533 InstFucomi, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, |
5530 /* 1199 */ | 5534 /* 1200 */ |
5531 { NACLi_X87, | 5535 { NACLi_X87, |
5532 NACL_EMPTY_IFLAGS, | 5536 NACL_EMPTY_IFLAGS, |
5533 InstFucomi, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 5537 InstFucomi, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
5534 /* 1200 */ | 5538 /* 1201 */ |
5535 { NACLi_X87, | 5539 { NACLi_X87, |
5536 NACL_EMPTY_IFLAGS, | 5540 NACL_EMPTY_IFLAGS, |
5537 InstFucomi, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, | 5541 InstFucomi, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, |
5538 /* 1201 */ | 5542 /* 1202 */ |
5539 { NACLi_X87, | 5543 { NACLi_X87, |
5540 NACL_EMPTY_IFLAGS, | 5544 NACL_EMPTY_IFLAGS, |
5541 InstFucomi, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, | 5545 InstFucomi, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, |
5542 /* 1202 */ | 5546 /* 1203 */ |
5543 { NACLi_X87, | 5547 { NACLi_X87, |
5544 NACL_EMPTY_IFLAGS, | 5548 NACL_EMPTY_IFLAGS, |
5545 InstFucomi, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, | 5549 InstFucomi, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, |
5546 /* 1203 */ | 5550 /* 1204 */ |
5547 { NACLi_X87, | 5551 { NACLi_X87, |
5548 NACL_EMPTY_IFLAGS, | 5552 NACL_EMPTY_IFLAGS, |
5549 InstFucomi, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, | 5553 InstFucomi, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, |
5550 /* 1204 */ | 5554 /* 1205 */ |
5551 { NACLi_X87, | 5555 { NACLi_X87, |
5552 NACL_EMPTY_IFLAGS, | 5556 NACL_EMPTY_IFLAGS, |
5553 InstFucomi, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, | 5557 InstFucomi, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, |
5554 /* 1205 */ | 5558 /* 1206 */ |
5555 { NACLi_X87, | 5559 { NACLi_X87, |
5556 NACL_EMPTY_IFLAGS, | 5560 NACL_EMPTY_IFLAGS, |
5557 InstFucomi, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, | 5561 InstFucomi, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, |
5558 /* 1206 */ | 5562 /* 1207 */ |
5559 { NACLi_X87, | 5563 { NACLi_X87, |
5560 NACL_EMPTY_IFLAGS, | 5564 NACL_EMPTY_IFLAGS, |
5561 InstFcomi, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, | 5565 InstFcomi, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, |
5562 /* 1207 */ | 5566 /* 1208 */ |
5563 { NACLi_X87, | 5567 { NACLi_X87, |
5564 NACL_EMPTY_IFLAGS, | 5568 NACL_EMPTY_IFLAGS, |
5565 InstFcomi, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 5569 InstFcomi, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
5566 /* 1208 */ | 5570 /* 1209 */ |
5567 { NACLi_X87, | 5571 { NACLi_X87, |
5568 NACL_EMPTY_IFLAGS, | 5572 NACL_EMPTY_IFLAGS, |
5569 InstFcomi, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, | 5573 InstFcomi, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, |
5570 /* 1209 */ | 5574 /* 1210 */ |
5571 { NACLi_X87, | 5575 { NACLi_X87, |
5572 NACL_EMPTY_IFLAGS, | 5576 NACL_EMPTY_IFLAGS, |
5573 InstFcomi, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, | 5577 InstFcomi, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, |
5574 /* 1210 */ | 5578 /* 1211 */ |
5575 { NACLi_X87, | 5579 { NACLi_X87, |
5576 NACL_EMPTY_IFLAGS, | 5580 NACL_EMPTY_IFLAGS, |
5577 InstFcomi, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, | 5581 InstFcomi, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, |
5578 /* 1211 */ | 5582 /* 1212 */ |
5579 { NACLi_X87, | 5583 { NACLi_X87, |
5580 NACL_EMPTY_IFLAGS, | 5584 NACL_EMPTY_IFLAGS, |
5581 InstFcomi, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, | 5585 InstFcomi, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, |
5582 /* 1212 */ | 5586 /* 1213 */ |
5583 { NACLi_X87, | 5587 { NACLi_X87, |
5584 NACL_EMPTY_IFLAGS, | 5588 NACL_EMPTY_IFLAGS, |
5585 InstFcomi, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, | 5589 InstFcomi, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, |
5586 /* 1213 */ | 5590 /* 1214 */ |
5587 { NACLi_X87, | 5591 { NACLi_X87, |
5588 NACL_EMPTY_IFLAGS, | 5592 NACL_EMPTY_IFLAGS, |
5589 InstFcomi, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, | 5593 InstFcomi, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, |
5590 /* 1214 */ | 5594 /* 1215 */ |
5591 { NACLi_X87, | 5595 { NACLi_X87, |
5592 NACL_EMPTY_IFLAGS, | 5596 NACL_EMPTY_IFLAGS, |
5593 InstFadd, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 5597 InstFadd, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
5594 /* 1215 */ | 5598 /* 1216 */ |
5595 { NACLi_X87, | 5599 { NACLi_X87, |
5596 NACL_EMPTY_IFLAGS, | 5600 NACL_EMPTY_IFLAGS, |
5597 InstFadd, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 5601 InstFadd, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
5598 /* 1216 */ | 5602 /* 1217 */ |
5599 { NACLi_X87, | 5603 { NACLi_X87, |
5600 NACL_EMPTY_IFLAGS, | 5604 NACL_EMPTY_IFLAGS, |
5601 InstFadd, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 5605 InstFadd, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
5602 /* 1217 */ | 5606 /* 1218 */ |
5603 { NACLi_X87, | 5607 { NACLi_X87, |
5604 NACL_EMPTY_IFLAGS, | 5608 NACL_EMPTY_IFLAGS, |
5605 InstFadd, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 5609 InstFadd, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
5606 /* 1218 */ | 5610 /* 1219 */ |
5607 { NACLi_X87, | 5611 { NACLi_X87, |
5608 NACL_EMPTY_IFLAGS, | 5612 NACL_EMPTY_IFLAGS, |
5609 InstFadd, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 5613 InstFadd, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
5610 /* 1219 */ | 5614 /* 1220 */ |
5611 { NACLi_X87, | 5615 { NACLi_X87, |
5612 NACL_EMPTY_IFLAGS, | 5616 NACL_EMPTY_IFLAGS, |
5613 InstFadd, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 5617 InstFadd, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
5614 /* 1220 */ | 5618 /* 1221 */ |
5615 { NACLi_X87, | 5619 { NACLi_X87, |
5616 NACL_EMPTY_IFLAGS, | 5620 NACL_EMPTY_IFLAGS, |
5617 InstFadd, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 5621 InstFadd, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
5618 /* 1221 */ | 5622 /* 1222 */ |
5619 { NACLi_X87, | 5623 { NACLi_X87, |
5620 NACL_EMPTY_IFLAGS, | 5624 NACL_EMPTY_IFLAGS, |
5621 InstFmul, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 5625 InstFmul, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
5622 /* 1222 */ | 5626 /* 1223 */ |
5623 { NACLi_X87, | 5627 { NACLi_X87, |
5624 NACL_EMPTY_IFLAGS, | 5628 NACL_EMPTY_IFLAGS, |
5625 InstFmul, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 5629 InstFmul, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
5626 /* 1223 */ | 5630 /* 1224 */ |
5627 { NACLi_X87, | 5631 { NACLi_X87, |
5628 NACL_EMPTY_IFLAGS, | 5632 NACL_EMPTY_IFLAGS, |
5629 InstFmul, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 5633 InstFmul, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
5630 /* 1224 */ | 5634 /* 1225 */ |
5631 { NACLi_X87, | 5635 { NACLi_X87, |
5632 NACL_EMPTY_IFLAGS, | 5636 NACL_EMPTY_IFLAGS, |
5633 InstFmul, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 5637 InstFmul, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
5634 /* 1225 */ | 5638 /* 1226 */ |
5635 { NACLi_X87, | 5639 { NACLi_X87, |
5636 NACL_EMPTY_IFLAGS, | 5640 NACL_EMPTY_IFLAGS, |
5637 InstFmul, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 5641 InstFmul, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
5638 /* 1226 */ | 5642 /* 1227 */ |
5639 { NACLi_X87, | 5643 { NACLi_X87, |
5640 NACL_EMPTY_IFLAGS, | 5644 NACL_EMPTY_IFLAGS, |
5641 InstFmul, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 5645 InstFmul, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
5642 /* 1227 */ | 5646 /* 1228 */ |
5643 { NACLi_X87, | 5647 { NACLi_X87, |
5644 NACL_EMPTY_IFLAGS, | 5648 NACL_EMPTY_IFLAGS, |
5645 InstFmul, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 5649 InstFmul, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
5646 /* 1228 */ | 5650 /* 1229 */ |
5647 { NACLi_X87, | 5651 { NACLi_X87, |
5648 NACL_EMPTY_IFLAGS, | 5652 NACL_EMPTY_IFLAGS, |
5649 InstFsubr, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 5653 InstFsubr, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
5650 /* 1229 */ | 5654 /* 1230 */ |
5651 { NACLi_X87, | 5655 { NACLi_X87, |
5652 NACL_EMPTY_IFLAGS, | 5656 NACL_EMPTY_IFLAGS, |
5653 InstFsubr, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 5657 InstFsubr, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
5654 /* 1230 */ | 5658 /* 1231 */ |
5655 { NACLi_X87, | 5659 { NACLi_X87, |
5656 NACL_EMPTY_IFLAGS, | 5660 NACL_EMPTY_IFLAGS, |
5657 InstFsubr, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 5661 InstFsubr, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
5658 /* 1231 */ | 5662 /* 1232 */ |
5659 { NACLi_X87, | 5663 { NACLi_X87, |
5660 NACL_EMPTY_IFLAGS, | 5664 NACL_EMPTY_IFLAGS, |
5661 InstFsubr, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 5665 InstFsubr, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
5662 /* 1232 */ | 5666 /* 1233 */ |
5663 { NACLi_X87, | 5667 { NACLi_X87, |
5664 NACL_EMPTY_IFLAGS, | 5668 NACL_EMPTY_IFLAGS, |
5665 InstFsubr, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 5669 InstFsubr, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
5666 /* 1233 */ | 5670 /* 1234 */ |
5667 { NACLi_X87, | 5671 { NACLi_X87, |
5668 NACL_EMPTY_IFLAGS, | 5672 NACL_EMPTY_IFLAGS, |
5669 InstFsubr, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 5673 InstFsubr, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
5670 /* 1234 */ | 5674 /* 1235 */ |
5671 { NACLi_X87, | 5675 { NACLi_X87, |
5672 NACL_EMPTY_IFLAGS, | 5676 NACL_EMPTY_IFLAGS, |
5673 InstFsubr, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 5677 InstFsubr, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
5674 /* 1235 */ | 5678 /* 1236 */ |
5675 { NACLi_X87, | 5679 { NACLi_X87, |
5676 NACL_EMPTY_IFLAGS, | 5680 NACL_EMPTY_IFLAGS, |
5677 InstFsub, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 5681 InstFsub, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
5678 /* 1236 */ | 5682 /* 1237 */ |
5679 { NACLi_X87, | 5683 { NACLi_X87, |
5680 NACL_EMPTY_IFLAGS, | 5684 NACL_EMPTY_IFLAGS, |
5681 InstFsub, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 5685 InstFsub, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
5682 /* 1237 */ | 5686 /* 1238 */ |
5683 { NACLi_X87, | 5687 { NACLi_X87, |
5684 NACL_EMPTY_IFLAGS, | 5688 NACL_EMPTY_IFLAGS, |
5685 InstFsub, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 5689 InstFsub, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
5686 /* 1238 */ | 5690 /* 1239 */ |
5687 { NACLi_X87, | 5691 { NACLi_X87, |
5688 NACL_EMPTY_IFLAGS, | 5692 NACL_EMPTY_IFLAGS, |
5689 InstFsub, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 5693 InstFsub, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
5690 /* 1239 */ | 5694 /* 1240 */ |
5691 { NACLi_X87, | 5695 { NACLi_X87, |
5692 NACL_EMPTY_IFLAGS, | 5696 NACL_EMPTY_IFLAGS, |
5693 InstFsub, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 5697 InstFsub, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
5694 /* 1240 */ | 5698 /* 1241 */ |
5695 { NACLi_X87, | 5699 { NACLi_X87, |
5696 NACL_EMPTY_IFLAGS, | 5700 NACL_EMPTY_IFLAGS, |
5697 InstFsub, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 5701 InstFsub, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
5698 /* 1241 */ | 5702 /* 1242 */ |
5699 { NACLi_X87, | 5703 { NACLi_X87, |
5700 NACL_EMPTY_IFLAGS, | 5704 NACL_EMPTY_IFLAGS, |
5701 InstFsub, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 5705 InstFsub, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
5702 /* 1242 */ | 5706 /* 1243 */ |
5703 { NACLi_X87, | 5707 { NACLi_X87, |
5704 NACL_EMPTY_IFLAGS, | 5708 NACL_EMPTY_IFLAGS, |
5705 InstFdivr, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 5709 InstFdivr, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
5706 /* 1243 */ | 5710 /* 1244 */ |
5707 { NACLi_X87, | 5711 { NACLi_X87, |
5708 NACL_EMPTY_IFLAGS, | 5712 NACL_EMPTY_IFLAGS, |
5709 InstFdivr, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 5713 InstFdivr, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
5710 /* 1244 */ | 5714 /* 1245 */ |
5711 { NACLi_X87, | 5715 { NACLi_X87, |
5712 NACL_EMPTY_IFLAGS, | 5716 NACL_EMPTY_IFLAGS, |
5713 InstFdivr, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 5717 InstFdivr, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
5714 /* 1245 */ | 5718 /* 1246 */ |
5715 { NACLi_X87, | 5719 { NACLi_X87, |
5716 NACL_EMPTY_IFLAGS, | 5720 NACL_EMPTY_IFLAGS, |
5717 InstFdivr, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 5721 InstFdivr, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
5718 /* 1246 */ | 5722 /* 1247 */ |
5719 { NACLi_X87, | 5723 { NACLi_X87, |
5720 NACL_EMPTY_IFLAGS, | 5724 NACL_EMPTY_IFLAGS, |
5721 InstFdivr, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 5725 InstFdivr, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
5722 /* 1247 */ | 5726 /* 1248 */ |
5723 { NACLi_X87, | 5727 { NACLi_X87, |
5724 NACL_EMPTY_IFLAGS, | 5728 NACL_EMPTY_IFLAGS, |
5725 InstFdivr, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 5729 InstFdivr, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
5726 /* 1248 */ | 5730 /* 1249 */ |
5727 { NACLi_X87, | 5731 { NACLi_X87, |
5728 NACL_EMPTY_IFLAGS, | 5732 NACL_EMPTY_IFLAGS, |
5729 InstFdivr, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 5733 InstFdivr, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
5730 /* 1249 */ | 5734 /* 1250 */ |
5731 { NACLi_X87, | 5735 { NACLi_X87, |
5732 NACL_EMPTY_IFLAGS, | 5736 NACL_EMPTY_IFLAGS, |
5733 InstFdiv, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 5737 InstFdiv, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
5734 /* 1250 */ | 5738 /* 1251 */ |
5735 { NACLi_X87, | 5739 { NACLi_X87, |
5736 NACL_EMPTY_IFLAGS, | 5740 NACL_EMPTY_IFLAGS, |
5737 InstFdiv, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 5741 InstFdiv, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
5738 /* 1251 */ | 5742 /* 1252 */ |
5739 { NACLi_X87, | 5743 { NACLi_X87, |
5740 NACL_EMPTY_IFLAGS, | 5744 NACL_EMPTY_IFLAGS, |
5741 InstFdiv, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 5745 InstFdiv, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
5742 /* 1252 */ | 5746 /* 1253 */ |
5743 { NACLi_X87, | 5747 { NACLi_X87, |
5744 NACL_EMPTY_IFLAGS, | 5748 NACL_EMPTY_IFLAGS, |
5745 InstFdiv, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 5749 InstFdiv, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
5746 /* 1253 */ | 5750 /* 1254 */ |
5747 { NACLi_X87, | 5751 { NACLi_X87, |
5748 NACL_EMPTY_IFLAGS, | 5752 NACL_EMPTY_IFLAGS, |
5749 InstFdiv, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 5753 InstFdiv, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
5750 /* 1254 */ | 5754 /* 1255 */ |
5751 { NACLi_X87, | 5755 { NACLi_X87, |
5752 NACL_EMPTY_IFLAGS, | 5756 NACL_EMPTY_IFLAGS, |
5753 InstFdiv, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 5757 InstFdiv, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
5754 /* 1255 */ | 5758 /* 1256 */ |
5755 { NACLi_X87, | 5759 { NACLi_X87, |
5756 NACL_EMPTY_IFLAGS, | 5760 NACL_EMPTY_IFLAGS, |
5757 InstFdiv, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 5761 InstFdiv, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
5758 /* 1256 */ | 5762 /* 1257 */ |
5759 { NACLi_X87, | 5763 { NACLi_X87, |
5760 NACL_EMPTY_IFLAGS, | 5764 NACL_EMPTY_IFLAGS, |
5761 InstFfree, 0x00, 1, 699, NACL_OPCODE_NULL_OFFSET }, | 5765 InstFfree, 0x00, 1, 699, NACL_OPCODE_NULL_OFFSET }, |
5762 /* 1257 */ | 5766 /* 1258 */ |
5763 { NACLi_X87, | 5767 { NACLi_X87, |
5764 NACL_EMPTY_IFLAGS, | 5768 NACL_EMPTY_IFLAGS, |
5765 InstFfree, 0x00, 1, 700, NACL_OPCODE_NULL_OFFSET }, | 5769 InstFfree, 0x00, 1, 700, NACL_OPCODE_NULL_OFFSET }, |
5766 /* 1258 */ | 5770 /* 1259 */ |
5767 { NACLi_X87, | 5771 { NACLi_X87, |
5768 NACL_EMPTY_IFLAGS, | 5772 NACL_EMPTY_IFLAGS, |
5769 InstFfree, 0x00, 1, 701, NACL_OPCODE_NULL_OFFSET }, | 5773 InstFfree, 0x00, 1, 701, NACL_OPCODE_NULL_OFFSET }, |
5770 /* 1259 */ | 5774 /* 1260 */ |
5771 { NACLi_X87, | 5775 { NACLi_X87, |
5772 NACL_EMPTY_IFLAGS, | 5776 NACL_EMPTY_IFLAGS, |
5773 InstFfree, 0x00, 1, 702, NACL_OPCODE_NULL_OFFSET }, | 5777 InstFfree, 0x00, 1, 702, NACL_OPCODE_NULL_OFFSET }, |
5774 /* 1260 */ | 5778 /* 1261 */ |
5775 { NACLi_X87, | 5779 { NACLi_X87, |
5776 NACL_EMPTY_IFLAGS, | 5780 NACL_EMPTY_IFLAGS, |
5777 InstFfree, 0x00, 1, 703, NACL_OPCODE_NULL_OFFSET }, | 5781 InstFfree, 0x00, 1, 703, NACL_OPCODE_NULL_OFFSET }, |
5778 /* 1261 */ | 5782 /* 1262 */ |
5779 { NACLi_X87, | 5783 { NACLi_X87, |
5780 NACL_EMPTY_IFLAGS, | 5784 NACL_EMPTY_IFLAGS, |
5781 InstFfree, 0x00, 1, 704, NACL_OPCODE_NULL_OFFSET }, | 5785 InstFfree, 0x00, 1, 704, NACL_OPCODE_NULL_OFFSET }, |
5782 /* 1262 */ | 5786 /* 1263 */ |
5783 { NACLi_X87, | 5787 { NACLi_X87, |
5784 NACL_EMPTY_IFLAGS, | 5788 NACL_EMPTY_IFLAGS, |
5785 InstFfree, 0x00, 1, 705, NACL_OPCODE_NULL_OFFSET }, | 5789 InstFfree, 0x00, 1, 705, NACL_OPCODE_NULL_OFFSET }, |
5786 /* 1263 */ | 5790 /* 1264 */ |
5787 { NACLi_X87, | 5791 { NACLi_X87, |
5788 NACL_EMPTY_IFLAGS, | 5792 NACL_EMPTY_IFLAGS, |
5789 InstFfree, 0x00, 1, 706, NACL_OPCODE_NULL_OFFSET }, | 5793 InstFfree, 0x00, 1, 706, NACL_OPCODE_NULL_OFFSET }, |
5790 /* 1264 */ | 5794 /* 1265 */ |
5791 { NACLi_X87, | 5795 { NACLi_X87, |
5792 NACL_EMPTY_IFLAGS, | 5796 NACL_EMPTY_IFLAGS, |
5793 InstFst, 0x00, 2, 653, NACL_OPCODE_NULL_OFFSET }, | 5797 InstFst, 0x00, 2, 653, NACL_OPCODE_NULL_OFFSET }, |
5794 /* 1265 */ | 5798 /* 1266 */ |
5795 { NACLi_X87, | 5799 { NACLi_X87, |
5796 NACL_EMPTY_IFLAGS, | 5800 NACL_EMPTY_IFLAGS, |
5797 InstFst, 0x00, 2, 707, NACL_OPCODE_NULL_OFFSET }, | 5801 InstFst, 0x00, 2, 707, NACL_OPCODE_NULL_OFFSET }, |
5798 /* 1266 */ | 5802 /* 1267 */ |
5799 { NACLi_X87, | 5803 { NACLi_X87, |
5800 NACL_EMPTY_IFLAGS, | 5804 NACL_EMPTY_IFLAGS, |
5801 InstFst, 0x00, 2, 709, NACL_OPCODE_NULL_OFFSET }, | 5805 InstFst, 0x00, 2, 709, NACL_OPCODE_NULL_OFFSET }, |
5802 /* 1267 */ | 5806 /* 1268 */ |
5803 { NACLi_X87, | 5807 { NACLi_X87, |
5804 NACL_EMPTY_IFLAGS, | 5808 NACL_EMPTY_IFLAGS, |
5805 InstFst, 0x00, 2, 711, NACL_OPCODE_NULL_OFFSET }, | 5809 InstFst, 0x00, 2, 711, NACL_OPCODE_NULL_OFFSET }, |
5806 /* 1268 */ | 5810 /* 1269 */ |
5807 { NACLi_X87, | 5811 { NACLi_X87, |
5808 NACL_EMPTY_IFLAGS, | 5812 NACL_EMPTY_IFLAGS, |
5809 InstFst, 0x00, 2, 713, NACL_OPCODE_NULL_OFFSET }, | 5813 InstFst, 0x00, 2, 713, NACL_OPCODE_NULL_OFFSET }, |
5810 /* 1269 */ | 5814 /* 1270 */ |
5811 { NACLi_X87, | 5815 { NACLi_X87, |
5812 NACL_EMPTY_IFLAGS, | 5816 NACL_EMPTY_IFLAGS, |
5813 InstFst, 0x00, 2, 715, NACL_OPCODE_NULL_OFFSET }, | 5817 InstFst, 0x00, 2, 715, NACL_OPCODE_NULL_OFFSET }, |
5814 /* 1270 */ | 5818 /* 1271 */ |
5815 { NACLi_X87, | 5819 { NACLi_X87, |
5816 NACL_EMPTY_IFLAGS, | 5820 NACL_EMPTY_IFLAGS, |
5817 InstFst, 0x00, 2, 717, NACL_OPCODE_NULL_OFFSET }, | 5821 InstFst, 0x00, 2, 717, NACL_OPCODE_NULL_OFFSET }, |
5818 /* 1271 */ | 5822 /* 1272 */ |
5819 { NACLi_X87, | 5823 { NACLi_X87, |
5820 NACL_EMPTY_IFLAGS, | 5824 NACL_EMPTY_IFLAGS, |
5821 InstFst, 0x00, 2, 719, NACL_OPCODE_NULL_OFFSET }, | 5825 InstFst, 0x00, 2, 719, NACL_OPCODE_NULL_OFFSET }, |
5822 /* 1272 */ | 5826 /* 1273 */ |
5823 { NACLi_X87, | 5827 { NACLi_X87, |
5824 NACL_EMPTY_IFLAGS, | 5828 NACL_EMPTY_IFLAGS, |
5825 InstFstp, 0x00, 2, 653, NACL_OPCODE_NULL_OFFSET }, | 5829 InstFstp, 0x00, 2, 653, NACL_OPCODE_NULL_OFFSET }, |
5826 /* 1273 */ | 5830 /* 1274 */ |
5827 { NACLi_X87, | 5831 { NACLi_X87, |
5828 NACL_EMPTY_IFLAGS, | 5832 NACL_EMPTY_IFLAGS, |
5829 InstFstp, 0x00, 2, 707, NACL_OPCODE_NULL_OFFSET }, | 5833 InstFstp, 0x00, 2, 707, NACL_OPCODE_NULL_OFFSET }, |
5830 /* 1274 */ | 5834 /* 1275 */ |
5831 { NACLi_X87, | 5835 { NACLi_X87, |
5832 NACL_EMPTY_IFLAGS, | 5836 NACL_EMPTY_IFLAGS, |
5833 InstFstp, 0x00, 2, 709, NACL_OPCODE_NULL_OFFSET }, | 5837 InstFstp, 0x00, 2, 709, NACL_OPCODE_NULL_OFFSET }, |
5834 /* 1275 */ | 5838 /* 1276 */ |
5835 { NACLi_X87, | 5839 { NACLi_X87, |
5836 NACL_EMPTY_IFLAGS, | 5840 NACL_EMPTY_IFLAGS, |
5837 InstFstp, 0x00, 2, 711, NACL_OPCODE_NULL_OFFSET }, | 5841 InstFstp, 0x00, 2, 711, NACL_OPCODE_NULL_OFFSET }, |
5838 /* 1276 */ | 5842 /* 1277 */ |
5839 { NACLi_X87, | 5843 { NACLi_X87, |
5840 NACL_EMPTY_IFLAGS, | 5844 NACL_EMPTY_IFLAGS, |
5841 InstFstp, 0x00, 2, 713, NACL_OPCODE_NULL_OFFSET }, | 5845 InstFstp, 0x00, 2, 713, NACL_OPCODE_NULL_OFFSET }, |
5842 /* 1277 */ | 5846 /* 1278 */ |
5843 { NACLi_X87, | 5847 { NACLi_X87, |
5844 NACL_EMPTY_IFLAGS, | 5848 NACL_EMPTY_IFLAGS, |
5845 InstFstp, 0x00, 2, 715, NACL_OPCODE_NULL_OFFSET }, | 5849 InstFstp, 0x00, 2, 715, NACL_OPCODE_NULL_OFFSET }, |
5846 /* 1278 */ | 5850 /* 1279 */ |
5847 { NACLi_X87, | 5851 { NACLi_X87, |
5848 NACL_EMPTY_IFLAGS, | 5852 NACL_EMPTY_IFLAGS, |
5849 InstFstp, 0x00, 2, 717, NACL_OPCODE_NULL_OFFSET }, | 5853 InstFstp, 0x00, 2, 717, NACL_OPCODE_NULL_OFFSET }, |
5850 /* 1279 */ | 5854 /* 1280 */ |
5851 { NACLi_X87, | 5855 { NACLi_X87, |
5852 NACL_EMPTY_IFLAGS, | 5856 NACL_EMPTY_IFLAGS, |
5853 InstFstp, 0x00, 2, 719, NACL_OPCODE_NULL_OFFSET }, | 5857 InstFstp, 0x00, 2, 719, NACL_OPCODE_NULL_OFFSET }, |
5854 /* 1280 */ | 5858 /* 1281 */ |
5855 { NACLi_X87, | 5859 { NACLi_X87, |
5856 NACL_EMPTY_IFLAGS, | 5860 NACL_EMPTY_IFLAGS, |
5857 InstFucom, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, | 5861 InstFucom, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, |
5858 /* 1281 */ | 5862 /* 1282 */ |
5859 { NACLi_X87, | 5863 { NACLi_X87, |
5860 NACL_EMPTY_IFLAGS, | 5864 NACL_EMPTY_IFLAGS, |
5861 InstFucom, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 5865 InstFucom, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
5862 /* 1282 */ | 5866 /* 1283 */ |
5863 { NACLi_X87, | 5867 { NACLi_X87, |
5864 NACL_EMPTY_IFLAGS, | 5868 NACL_EMPTY_IFLAGS, |
5865 InstFucom, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, | 5869 InstFucom, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, |
5866 /* 1283 */ | 5870 /* 1284 */ |
5867 { NACLi_X87, | 5871 { NACLi_X87, |
5868 NACL_EMPTY_IFLAGS, | 5872 NACL_EMPTY_IFLAGS, |
5869 InstFucom, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, | 5873 InstFucom, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, |
5870 /* 1284 */ | 5874 /* 1285 */ |
5871 { NACLi_X87, | 5875 { NACLi_X87, |
5872 NACL_EMPTY_IFLAGS, | 5876 NACL_EMPTY_IFLAGS, |
5873 InstFucom, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, | 5877 InstFucom, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, |
5874 /* 1285 */ | 5878 /* 1286 */ |
5875 { NACLi_X87, | 5879 { NACLi_X87, |
5876 NACL_EMPTY_IFLAGS, | 5880 NACL_EMPTY_IFLAGS, |
5877 InstFucom, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, | 5881 InstFucom, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, |
5878 /* 1286 */ | 5882 /* 1287 */ |
5879 { NACLi_X87, | 5883 { NACLi_X87, |
5880 NACL_EMPTY_IFLAGS, | 5884 NACL_EMPTY_IFLAGS, |
5881 InstFucom, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, | 5885 InstFucom, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, |
5882 /* 1287 */ | 5886 /* 1288 */ |
5883 { NACLi_X87, | 5887 { NACLi_X87, |
5884 NACL_EMPTY_IFLAGS, | 5888 NACL_EMPTY_IFLAGS, |
5885 InstFucom, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, | 5889 InstFucom, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, |
5886 /* 1288 */ | 5890 /* 1289 */ |
5887 { NACLi_X87, | 5891 { NACLi_X87, |
5888 NACL_EMPTY_IFLAGS, | 5892 NACL_EMPTY_IFLAGS, |
5889 InstFucomp, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, | 5893 InstFucomp, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, |
5890 /* 1289 */ | 5894 /* 1290 */ |
5891 { NACLi_X87, | 5895 { NACLi_X87, |
5892 NACL_EMPTY_IFLAGS, | 5896 NACL_EMPTY_IFLAGS, |
5893 InstFucomp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 5897 InstFucomp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
5894 /* 1290 */ | 5898 /* 1291 */ |
5895 { NACLi_X87, | 5899 { NACLi_X87, |
5896 NACL_EMPTY_IFLAGS, | 5900 NACL_EMPTY_IFLAGS, |
5897 InstFucomp, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, | 5901 InstFucomp, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, |
5898 /* 1291 */ | 5902 /* 1292 */ |
5899 { NACLi_X87, | 5903 { NACLi_X87, |
5900 NACL_EMPTY_IFLAGS, | 5904 NACL_EMPTY_IFLAGS, |
5901 InstFucomp, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, | 5905 InstFucomp, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, |
5902 /* 1292 */ | 5906 /* 1293 */ |
5903 { NACLi_X87, | 5907 { NACLi_X87, |
5904 NACL_EMPTY_IFLAGS, | 5908 NACL_EMPTY_IFLAGS, |
5905 InstFucomp, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, | 5909 InstFucomp, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, |
5906 /* 1293 */ | 5910 /* 1294 */ |
5907 { NACLi_X87, | 5911 { NACLi_X87, |
5908 NACL_EMPTY_IFLAGS, | 5912 NACL_EMPTY_IFLAGS, |
5909 InstFucomp, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, | 5913 InstFucomp, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, |
5910 /* 1294 */ | 5914 /* 1295 */ |
5911 { NACLi_X87, | 5915 { NACLi_X87, |
5912 NACL_EMPTY_IFLAGS, | 5916 NACL_EMPTY_IFLAGS, |
5913 InstFucomp, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, | 5917 InstFucomp, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, |
5914 /* 1295 */ | 5918 /* 1296 */ |
5915 { NACLi_X87, | 5919 { NACLi_X87, |
5916 NACL_EMPTY_IFLAGS, | 5920 NACL_EMPTY_IFLAGS, |
5917 InstFucomp, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, | 5921 InstFucomp, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, |
5918 /* 1296 */ | 5922 /* 1297 */ |
5919 { NACLi_X87, | 5923 { NACLi_X87, |
5920 NACL_EMPTY_IFLAGS, | 5924 NACL_EMPTY_IFLAGS, |
5921 InstFaddp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5925 InstFaddp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5922 /* 1297 */ | 5926 /* 1298 */ |
5923 { NACLi_X87, | 5927 { NACLi_X87, |
5924 NACL_EMPTY_IFLAGS, | 5928 NACL_EMPTY_IFLAGS, |
5925 InstFaddp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 5929 InstFaddp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
5926 /* 1298 */ | 5930 /* 1299 */ |
5927 { NACLi_X87, | 5931 { NACLi_X87, |
5928 NACL_EMPTY_IFLAGS, | 5932 NACL_EMPTY_IFLAGS, |
5929 InstFaddp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 5933 InstFaddp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
5930 /* 1299 */ | 5934 /* 1300 */ |
5931 { NACLi_X87, | 5935 { NACLi_X87, |
5932 NACL_EMPTY_IFLAGS, | 5936 NACL_EMPTY_IFLAGS, |
5933 InstFaddp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 5937 InstFaddp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
5934 /* 1300 */ | 5938 /* 1301 */ |
5935 { NACLi_X87, | 5939 { NACLi_X87, |
5936 NACL_EMPTY_IFLAGS, | 5940 NACL_EMPTY_IFLAGS, |
5937 InstFaddp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 5941 InstFaddp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
5938 /* 1301 */ | 5942 /* 1302 */ |
5939 { NACLi_X87, | 5943 { NACLi_X87, |
5940 NACL_EMPTY_IFLAGS, | 5944 NACL_EMPTY_IFLAGS, |
5941 InstFaddp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 5945 InstFaddp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
5942 /* 1302 */ | 5946 /* 1303 */ |
5943 { NACLi_X87, | 5947 { NACLi_X87, |
5944 NACL_EMPTY_IFLAGS, | 5948 NACL_EMPTY_IFLAGS, |
5945 InstFaddp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 5949 InstFaddp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
5946 /* 1303 */ | 5950 /* 1304 */ |
5947 { NACLi_X87, | 5951 { NACLi_X87, |
5948 NACL_EMPTY_IFLAGS, | 5952 NACL_EMPTY_IFLAGS, |
5949 InstFaddp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 5953 InstFaddp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
5950 /* 1304 */ | 5954 /* 1305 */ |
5951 { NACLi_X87, | 5955 { NACLi_X87, |
5952 NACL_EMPTY_IFLAGS, | 5956 NACL_EMPTY_IFLAGS, |
5953 InstFmulp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5957 InstFmulp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5954 /* 1305 */ | 5958 /* 1306 */ |
5955 { NACLi_X87, | 5959 { NACLi_X87, |
5956 NACL_EMPTY_IFLAGS, | 5960 NACL_EMPTY_IFLAGS, |
5957 InstFmulp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 5961 InstFmulp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
5958 /* 1306 */ | 5962 /* 1307 */ |
5959 { NACLi_X87, | 5963 { NACLi_X87, |
5960 NACL_EMPTY_IFLAGS, | 5964 NACL_EMPTY_IFLAGS, |
5961 InstFmulp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 5965 InstFmulp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
5962 /* 1307 */ | 5966 /* 1308 */ |
5963 { NACLi_X87, | 5967 { NACLi_X87, |
5964 NACL_EMPTY_IFLAGS, | 5968 NACL_EMPTY_IFLAGS, |
5965 InstFmulp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 5969 InstFmulp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
5966 /* 1308 */ | 5970 /* 1309 */ |
5967 { NACLi_X87, | 5971 { NACLi_X87, |
5968 NACL_EMPTY_IFLAGS, | 5972 NACL_EMPTY_IFLAGS, |
5969 InstFmulp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 5973 InstFmulp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
5970 /* 1309 */ | 5974 /* 1310 */ |
5971 { NACLi_X87, | 5975 { NACLi_X87, |
5972 NACL_EMPTY_IFLAGS, | 5976 NACL_EMPTY_IFLAGS, |
5973 InstFmulp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 5977 InstFmulp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
5974 /* 1310 */ | 5978 /* 1311 */ |
5975 { NACLi_X87, | 5979 { NACLi_X87, |
5976 NACL_EMPTY_IFLAGS, | 5980 NACL_EMPTY_IFLAGS, |
5977 InstFmulp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 5981 InstFmulp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
5978 /* 1311 */ | 5982 /* 1312 */ |
5979 { NACLi_X87, | 5983 { NACLi_X87, |
5980 NACL_EMPTY_IFLAGS, | 5984 NACL_EMPTY_IFLAGS, |
5981 InstFmulp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 5985 InstFmulp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
5982 /* 1312 */ | 5986 /* 1313 */ |
5983 { NACLi_X87, | 5987 { NACLi_X87, |
5984 NACL_EMPTY_IFLAGS, | 5988 NACL_EMPTY_IFLAGS, |
5985 InstFcompp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 5989 InstFcompp, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
5986 /* 1313 */ | 5990 /* 1314 */ |
5987 { NACLi_X87, | 5991 { NACLi_X87, |
5988 NACL_EMPTY_IFLAGS, | 5992 NACL_EMPTY_IFLAGS, |
5989 InstFsubrp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 5993 InstFsubrp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
5990 /* 1314 */ | 5994 /* 1315 */ |
5991 { NACLi_X87, | 5995 { NACLi_X87, |
5992 NACL_EMPTY_IFLAGS, | 5996 NACL_EMPTY_IFLAGS, |
5993 InstFsubrp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 5997 InstFsubrp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
5994 /* 1315 */ | 5998 /* 1316 */ |
5995 { NACLi_X87, | 5999 { NACLi_X87, |
5996 NACL_EMPTY_IFLAGS, | 6000 NACL_EMPTY_IFLAGS, |
5997 InstFsubrp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 6001 InstFsubrp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
5998 /* 1316 */ | 6002 /* 1317 */ |
5999 { NACLi_X87, | 6003 { NACLi_X87, |
6000 NACL_EMPTY_IFLAGS, | 6004 NACL_EMPTY_IFLAGS, |
6001 InstFsubrp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 6005 InstFsubrp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
6002 /* 1317 */ | 6006 /* 1318 */ |
6003 { NACLi_X87, | 6007 { NACLi_X87, |
6004 NACL_EMPTY_IFLAGS, | 6008 NACL_EMPTY_IFLAGS, |
6005 InstFsubrp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 6009 InstFsubrp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
6006 /* 1318 */ | 6010 /* 1319 */ |
6007 { NACLi_X87, | 6011 { NACLi_X87, |
6008 NACL_EMPTY_IFLAGS, | 6012 NACL_EMPTY_IFLAGS, |
6009 InstFsubrp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 6013 InstFsubrp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
6010 /* 1319 */ | 6014 /* 1320 */ |
6011 { NACLi_X87, | 6015 { NACLi_X87, |
6012 NACL_EMPTY_IFLAGS, | 6016 NACL_EMPTY_IFLAGS, |
6013 InstFsubrp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 6017 InstFsubrp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
6014 /* 1320 */ | 6018 /* 1321 */ |
6015 { NACLi_X87, | 6019 { NACLi_X87, |
6016 NACL_EMPTY_IFLAGS, | 6020 NACL_EMPTY_IFLAGS, |
6017 InstFsubrp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 6021 InstFsubrp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
6018 /* 1321 */ | 6022 /* 1322 */ |
6019 { NACLi_X87, | 6023 { NACLi_X87, |
6020 NACL_EMPTY_IFLAGS, | 6024 NACL_EMPTY_IFLAGS, |
6021 InstFsubp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 6025 InstFsubp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
6022 /* 1322 */ | 6026 /* 1323 */ |
6023 { NACLi_X87, | 6027 { NACLi_X87, |
6024 NACL_EMPTY_IFLAGS, | 6028 NACL_EMPTY_IFLAGS, |
6025 InstFsubp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 6029 InstFsubp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
6026 /* 1323 */ | 6030 /* 1324 */ |
6027 { NACLi_X87, | 6031 { NACLi_X87, |
6028 NACL_EMPTY_IFLAGS, | 6032 NACL_EMPTY_IFLAGS, |
6029 InstFsubp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 6033 InstFsubp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
6030 /* 1324 */ | 6034 /* 1325 */ |
6031 { NACLi_X87, | 6035 { NACLi_X87, |
6032 NACL_EMPTY_IFLAGS, | 6036 NACL_EMPTY_IFLAGS, |
6033 InstFsubp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 6037 InstFsubp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
6034 /* 1325 */ | 6038 /* 1326 */ |
6035 { NACLi_X87, | 6039 { NACLi_X87, |
6036 NACL_EMPTY_IFLAGS, | 6040 NACL_EMPTY_IFLAGS, |
6037 InstFsubp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 6041 InstFsubp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
6038 /* 1326 */ | 6042 /* 1327 */ |
6039 { NACLi_X87, | 6043 { NACLi_X87, |
6040 NACL_EMPTY_IFLAGS, | 6044 NACL_EMPTY_IFLAGS, |
6041 InstFsubp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 6045 InstFsubp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
6042 /* 1327 */ | 6046 /* 1328 */ |
6043 { NACLi_X87, | 6047 { NACLi_X87, |
6044 NACL_EMPTY_IFLAGS, | 6048 NACL_EMPTY_IFLAGS, |
6045 InstFsubp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 6049 InstFsubp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
6046 /* 1328 */ | 6050 /* 1329 */ |
6047 { NACLi_X87, | 6051 { NACLi_X87, |
6048 NACL_EMPTY_IFLAGS, | 6052 NACL_EMPTY_IFLAGS, |
6049 InstFsubp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 6053 InstFsubp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
6050 /* 1329 */ | 6054 /* 1330 */ |
6051 { NACLi_X87, | 6055 { NACLi_X87, |
6052 NACL_EMPTY_IFLAGS, | 6056 NACL_EMPTY_IFLAGS, |
6053 InstFdivrp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 6057 InstFdivrp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
6054 /* 1330 */ | 6058 /* 1331 */ |
6055 { NACLi_X87, | 6059 { NACLi_X87, |
6056 NACL_EMPTY_IFLAGS, | 6060 NACL_EMPTY_IFLAGS, |
6057 InstFdivrp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 6061 InstFdivrp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
6058 /* 1331 */ | 6062 /* 1332 */ |
6059 { NACLi_X87, | 6063 { NACLi_X87, |
6060 NACL_EMPTY_IFLAGS, | 6064 NACL_EMPTY_IFLAGS, |
6061 InstFdivrp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 6065 InstFdivrp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
6062 /* 1332 */ | 6066 /* 1333 */ |
6063 { NACLi_X87, | 6067 { NACLi_X87, |
6064 NACL_EMPTY_IFLAGS, | 6068 NACL_EMPTY_IFLAGS, |
6065 InstFdivrp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 6069 InstFdivrp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
6066 /* 1333 */ | 6070 /* 1334 */ |
6067 { NACLi_X87, | 6071 { NACLi_X87, |
6068 NACL_EMPTY_IFLAGS, | 6072 NACL_EMPTY_IFLAGS, |
6069 InstFdivrp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 6073 InstFdivrp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
6070 /* 1334 */ | 6074 /* 1335 */ |
6071 { NACLi_X87, | 6075 { NACLi_X87, |
6072 NACL_EMPTY_IFLAGS, | 6076 NACL_EMPTY_IFLAGS, |
6073 InstFdivrp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 6077 InstFdivrp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
6074 /* 1335 */ | 6078 /* 1336 */ |
6075 { NACLi_X87, | 6079 { NACLi_X87, |
6076 NACL_EMPTY_IFLAGS, | 6080 NACL_EMPTY_IFLAGS, |
6077 InstFdivrp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 6081 InstFdivrp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
6078 /* 1336 */ | 6082 /* 1337 */ |
6079 { NACLi_X87, | 6083 { NACLi_X87, |
6080 NACL_EMPTY_IFLAGS, | 6084 NACL_EMPTY_IFLAGS, |
6081 InstFdivrp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 6085 InstFdivrp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
6082 /* 1337 */ | 6086 /* 1338 */ |
6083 { NACLi_X87, | 6087 { NACLi_X87, |
6084 NACL_EMPTY_IFLAGS, | 6088 NACL_EMPTY_IFLAGS, |
6085 InstFdivp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, | 6089 InstFdivp, 0x00, 2, 621, NACL_OPCODE_NULL_OFFSET }, |
6086 /* 1338 */ | 6090 /* 1339 */ |
6087 { NACLi_X87, | 6091 { NACLi_X87, |
6088 NACL_EMPTY_IFLAGS, | 6092 NACL_EMPTY_IFLAGS, |
6089 InstFdivp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, | 6093 InstFdivp, 0x00, 2, 685, NACL_OPCODE_NULL_OFFSET }, |
6090 /* 1339 */ | 6094 /* 1340 */ |
6091 { NACLi_X87, | 6095 { NACLi_X87, |
6092 NACL_EMPTY_IFLAGS, | 6096 NACL_EMPTY_IFLAGS, |
6093 InstFdivp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, | 6097 InstFdivp, 0x00, 2, 687, NACL_OPCODE_NULL_OFFSET }, |
6094 /* 1340 */ | 6098 /* 1341 */ |
6095 { NACLi_X87, | 6099 { NACLi_X87, |
6096 NACL_EMPTY_IFLAGS, | 6100 NACL_EMPTY_IFLAGS, |
6097 InstFdivp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, | 6101 InstFdivp, 0x00, 2, 689, NACL_OPCODE_NULL_OFFSET }, |
6098 /* 1341 */ | 6102 /* 1342 */ |
6099 { NACLi_X87, | 6103 { NACLi_X87, |
6100 NACL_EMPTY_IFLAGS, | 6104 NACL_EMPTY_IFLAGS, |
6101 InstFdivp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, | 6105 InstFdivp, 0x00, 2, 691, NACL_OPCODE_NULL_OFFSET }, |
6102 /* 1342 */ | 6106 /* 1343 */ |
6103 { NACLi_X87, | 6107 { NACLi_X87, |
6104 NACL_EMPTY_IFLAGS, | 6108 NACL_EMPTY_IFLAGS, |
6105 InstFdivp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, | 6109 InstFdivp, 0x00, 2, 693, NACL_OPCODE_NULL_OFFSET }, |
6106 /* 1343 */ | 6110 /* 1344 */ |
6107 { NACLi_X87, | 6111 { NACLi_X87, |
6108 NACL_EMPTY_IFLAGS, | 6112 NACL_EMPTY_IFLAGS, |
6109 InstFdivp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, | 6113 InstFdivp, 0x00, 2, 695, NACL_OPCODE_NULL_OFFSET }, |
6110 /* 1344 */ | 6114 /* 1345 */ |
6111 { NACLi_X87, | 6115 { NACLi_X87, |
6112 NACL_EMPTY_IFLAGS, | 6116 NACL_EMPTY_IFLAGS, |
6113 InstFdivp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, | 6117 InstFdivp, 0x00, 2, 697, NACL_OPCODE_NULL_OFFSET }, |
6114 /* 1345 */ | 6118 /* 1346 */ |
6115 { NACLi_X87, | 6119 { NACLi_X87, |
6116 NACL_EMPTY_IFLAGS, | 6120 NACL_EMPTY_IFLAGS, |
6117 InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 6121 InstInvalid, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
6118 /* 1346 */ | 6122 /* 1347 */ |
6119 { NACLi_X87, | 6123 { NACLi_X87, |
6120 NACL_EMPTY_IFLAGS, | 6124 NACL_EMPTY_IFLAGS, |
6121 InstFnstsw, 0x00, 1, 721, NACL_OPCODE_NULL_OFFSET }, | 6125 InstFnstsw, 0x00, 1, 721, NACL_OPCODE_NULL_OFFSET }, |
6122 /* 1347 */ | 6126 /* 1348 */ |
6123 { NACLi_X87, | 6127 { NACLi_X87, |
6124 NACL_EMPTY_IFLAGS, | 6128 NACL_EMPTY_IFLAGS, |
6125 InstFucomip, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, | 6129 InstFucomip, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, |
6126 /* 1348 */ | 6130 /* 1349 */ |
6127 { NACLi_X87, | 6131 { NACLi_X87, |
6128 NACL_EMPTY_IFLAGS, | 6132 NACL_EMPTY_IFLAGS, |
6129 InstFucomip, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 6133 InstFucomip, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
6130 /* 1349 */ | 6134 /* 1350 */ |
6131 { NACLi_X87, | 6135 { NACLi_X87, |
6132 NACL_EMPTY_IFLAGS, | 6136 NACL_EMPTY_IFLAGS, |
6133 InstFucomip, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, | 6137 InstFucomip, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, |
6134 /* 1350 */ | 6138 /* 1351 */ |
6135 { NACLi_X87, | 6139 { NACLi_X87, |
6136 NACL_EMPTY_IFLAGS, | 6140 NACL_EMPTY_IFLAGS, |
6137 InstFucomip, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, | 6141 InstFucomip, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, |
6138 /* 1351 */ | 6142 /* 1352 */ |
6139 { NACLi_X87, | 6143 { NACLi_X87, |
6140 NACL_EMPTY_IFLAGS, | 6144 NACL_EMPTY_IFLAGS, |
6141 InstFucomip, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, | 6145 InstFucomip, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, |
6142 /* 1352 */ | 6146 /* 1353 */ |
6143 { NACLi_X87, | 6147 { NACLi_X87, |
6144 NACL_EMPTY_IFLAGS, | 6148 NACL_EMPTY_IFLAGS, |
6145 InstFucomip, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, | 6149 InstFucomip, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, |
6146 /* 1353 */ | 6150 /* 1354 */ |
6147 { NACLi_X87, | 6151 { NACLi_X87, |
6148 NACL_EMPTY_IFLAGS, | 6152 NACL_EMPTY_IFLAGS, |
6149 InstFucomip, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, | 6153 InstFucomip, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, |
6150 /* 1354 */ | 6154 /* 1355 */ |
6151 { NACLi_X87, | 6155 { NACLi_X87, |
6152 NACL_EMPTY_IFLAGS, | 6156 NACL_EMPTY_IFLAGS, |
6153 InstFucomip, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, | 6157 InstFucomip, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, |
6154 /* 1355 */ | 6158 /* 1356 */ |
6155 { NACLi_X87, | 6159 { NACLi_X87, |
6156 NACL_EMPTY_IFLAGS, | 6160 NACL_EMPTY_IFLAGS, |
6157 InstFcomip, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, | 6161 InstFcomip, 0x00, 2, 637, NACL_OPCODE_NULL_OFFSET }, |
6158 /* 1356 */ | 6162 /* 1357 */ |
6159 { NACLi_X87, | 6163 { NACLi_X87, |
6160 NACL_EMPTY_IFLAGS, | 6164 NACL_EMPTY_IFLAGS, |
6161 InstFcomip, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, | 6165 InstFcomip, 0x00, 2, 639, NACL_OPCODE_NULL_OFFSET }, |
6162 /* 1357 */ | 6166 /* 1358 */ |
6163 { NACLi_X87, | 6167 { NACLi_X87, |
6164 NACL_EMPTY_IFLAGS, | 6168 NACL_EMPTY_IFLAGS, |
6165 InstFcomip, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, | 6169 InstFcomip, 0x00, 2, 641, NACL_OPCODE_NULL_OFFSET }, |
6166 /* 1358 */ | 6170 /* 1359 */ |
6167 { NACLi_X87, | 6171 { NACLi_X87, |
6168 NACL_EMPTY_IFLAGS, | 6172 NACL_EMPTY_IFLAGS, |
6169 InstFcomip, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, | 6173 InstFcomip, 0x00, 2, 643, NACL_OPCODE_NULL_OFFSET }, |
6170 /* 1359 */ | 6174 /* 1360 */ |
6171 { NACLi_X87, | 6175 { NACLi_X87, |
6172 NACL_EMPTY_IFLAGS, | 6176 NACL_EMPTY_IFLAGS, |
6173 InstFcomip, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, | 6177 InstFcomip, 0x00, 2, 645, NACL_OPCODE_NULL_OFFSET }, |
6174 /* 1360 */ | 6178 /* 1361 */ |
6175 { NACLi_X87, | 6179 { NACLi_X87, |
6176 NACL_EMPTY_IFLAGS, | 6180 NACL_EMPTY_IFLAGS, |
6177 InstFcomip, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, | 6181 InstFcomip, 0x00, 2, 647, NACL_OPCODE_NULL_OFFSET }, |
6178 /* 1361 */ | 6182 /* 1362 */ |
6179 { NACLi_X87, | 6183 { NACLi_X87, |
6180 NACL_EMPTY_IFLAGS, | 6184 NACL_EMPTY_IFLAGS, |
6181 InstFcomip, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, | 6185 InstFcomip, 0x00, 2, 649, NACL_OPCODE_NULL_OFFSET }, |
6182 /* 1362 */ | 6186 /* 1363 */ |
6183 { NACLi_X87, | 6187 { NACLi_X87, |
6184 NACL_EMPTY_IFLAGS, | 6188 NACL_EMPTY_IFLAGS, |
6185 InstFcomip, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, | 6189 InstFcomip, 0x00, 2, 651, NACL_OPCODE_NULL_OFFSET }, |
6186 /* 1363 */ | |
6187 { NACLi_386, | |
6188 NACL_EMPTY_IFLAGS, | |
6189 InstUd2, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | |
6190 /* 1364 */ | 6190 /* 1364 */ |
6191 { NACLi_386, | 6191 { NACLi_386, |
6192 NACL_EMPTY_IFLAGS, | 6192 NACL_EMPTY_IFLAGS, |
6193 InstNop, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 6193 InstUd2, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
6194 /* 1365 */ | 6194 /* 1365 */ |
6195 { NACLi_386, | 6195 { NACLi_386, |
6196 NACL_EMPTY_IFLAGS, | 6196 NACL_EMPTY_IFLAGS, |
| 6197 InstNop, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
| 6198 /* 1366 */ |
| 6199 { NACLi_386, |
| 6200 NACL_EMPTY_IFLAGS, |
6197 InstPause, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, | 6201 InstPause, 0x00, 0, 0, NACL_OPCODE_NULL_OFFSET }, |
6198 }; | 6202 }; |
6199 | 6203 |
6200 static const NaClPrefixOpcodeArrayOffset g_LookupTable[2543] = { | 6204 static const NaClPrefixOpcodeArrayOffset g_LookupTable[2543] = { |
6201 /* 0 */ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, | 6205 /* 0 */ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, |
6202 /* 10 */ 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, | 6206 /* 10 */ 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, |
6203 /* 20 */ 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, | 6207 /* 20 */ 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, |
6204 /* 30 */ 31, 32, 33, 34, 35, 36, 37, 38, 16, 39, | 6208 /* 30 */ 31, 32, 33, 34, 35, 36, 37, 38, 16, 39, |
6205 /* 40 */ 40, 41, 42, 43, 44, 45, 16, 46, 47, 48, | 6209 /* 40 */ 40, 41, 42, 43, 44, 45, 16, 46, 47, 48, |
6206 /* 50 */ 49, 50, 51, 52, 16, 53, 54, 55, 56, 57, | 6210 /* 50 */ 49, 50, 51, 52, 16, 53, 54, 55, 56, 57, |
(...skipping 76 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
6283 /* 820 */ 759, 760, 752, 752, 752, 752, 761, 762, 763, 764, | 6287 /* 820 */ 759, 760, 752, 752, 752, 752, 761, 762, 763, 764, |
6284 /* 830 */ 765, 766, 767, 768, 752, 752, 752, 752, 752, 752, | 6288 /* 830 */ 765, 766, 767, 768, 752, 752, 752, 752, 752, 752, |
6285 /* 840 */ 752, 752, 752, 752, 752, 752, 752, 752, 752, 769, | 6289 /* 840 */ 752, 752, 752, 752, 752, 752, 752, 752, 752, 769, |
6286 /* 850 */ 770, 752, 752, 752, 752, 752, 752, 752, 752, 752, | 6290 /* 850 */ 770, 752, 752, 752, 752, 752, 752, 752, 752, 752, |
6287 /* 860 */ 752, 752, 752, 752, 771, 772, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, | 6291 /* 860 */ 752, 752, 752, 752, 771, 772, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, |
6288 /* 870 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6292 /* 870 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6289 /* 880 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6293 /* 880 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6290 /* 890 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6294 /* 890 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6291 /* 900 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6295 /* 900 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6292 /* 910 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6296 /* 910 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6293 /* 920 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 773, 752, 752, 7
52, 752, 774, 752, 752, | 6297 /* 920 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 773, 752, 752, 7
52, 774, 775, 752, 752, |
6294 /* 930 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 775, 752, 752, 7
52, 752, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, | 6298 /* 930 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 776, 752, 752, 7
52, 752, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, |
6295 /* 940 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, 752, 752, 752, 752, | 6299 /* 940 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, 752, 752, 752, 752, |
6296 /* 950 */ 752, 752, 776, 752, 752, 752, 752, 752, 752, 752, | 6300 /* 950 */ 752, 752, 777, 752, 752, 752, 752, 752, 752, 752, |
6297 /* 960 */ 752, 752, 752, 752, 752, 752, 752, 752, 777, 752, | 6301 /* 960 */ 752, 752, 752, 752, 752, 752, 752, 752, 778, 752, |
6298 /* 970 */ 752, 752, 752, 752, 752, 752, 752, 752, 752, 752, | 6302 /* 970 */ 752, 752, 752, 752, 752, 752, 752, 752, 752, 752, |
6299 /* 980 */ 752, 752, 752, 752, 752, 752, 752, 752, 752, 752, | 6303 /* 980 */ 752, 752, 752, 752, 752, 752, 752, 752, 752, 752, |
6300 /* 990 */ 752, 752, 752, 752, NACL_OPCODE_NULL_OFFSET, 778, 779, 780, 781, 7
82, | 6304 /* 990 */ 752, 752, 752, 752, NACL_OPCODE_NULL_OFFSET, 779, 780, 781, 782, 7
83, |
6301 /* 1000 */ 783, 784, 785, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, | 6305 /* 1000 */ 784, 785, 786, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, |
6302 /* 1010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 7
86, | 6306 /* 1010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 7
87, |
6303 /* 1020 */ 787, 788, 789, 790, 791, 792, 793, NACL_OPCODE_NULL_OFFSET, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, | 6307 /* 1020 */ 788, 789, 790, 791, 792, 793, 794, NACL_OPCODE_NULL_OFFSET, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, |
6304 /* 1030 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6308 /* 1030 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6305 /* 1040 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6309 /* 1040 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6306 /* 1050 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 7
94, | 6310 /* 1050 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 7
95, |
6307 /* 1060 */ 795, 796, 796, 797, 798, 799, 800, 801, 802, 803, | 6311 /* 1060 */ 796, 797, 797, 798, 799, 800, 801, 802, 803, 804, |
6308 /* 1070 */ 804, 805, 806, 807, 808, 809, 810, 811, 812, 813, | 6312 /* 1070 */ 805, 806, 807, 808, 809, 810, 811, 812, 813, 814, |
6309 /* 1080 */ 814, 815, 816, 817, 818, 819, 820, 821, 822, 823, | 6313 /* 1080 */ 815, 816, 817, 818, 819, 820, 821, 822, 823, 824, |
6310 /* 1090 */ 824, 825, 833, 840, 848, 849, 850, 851, 796, 853, | 6314 /* 1090 */ 825, 826, 834, 841, 849, 850, 851, 852, 797, 854, |
6311 /* 1100 */ 854, 796, 796, 855, 856, 857, 858, NACL_OPCODE_NULL_OFFSET, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, | 6315 /* 1100 */ 855, 797, 797, 856, 857, 858, 859, NACL_OPCODE_NULL_OFFSET, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, |
6312 /* 1110 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6316 /* 1110 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6313 /* 1120 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6317 /* 1120 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6314 /* 1130 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6318 /* 1130 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6315 /* 1140 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6319 /* 1140 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6316 /* 1150 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, 796, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, | 6320 /* 1150 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, 797, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, |
6317 /* 1160 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6321 /* 1160 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6318 /* 1170 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, 859, 796, 860, 861, 862, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, | 6322 /* 1170 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, 860, 797, 861, 862, 863, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, |
6319 /* 1180 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, 863, 864, 865, | 6323 /* 1180 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, 864, 865, 866, |
6320 /* 1190 */ 866, 867, 868, 869, 870, 871, 872, 873, 874, 875, | 6324 /* 1190 */ 867, 868, 869, 870, 871, 872, 873, 874, 875, 876, |
6321 /* 1200 */ 876, 877, 878, 879, 880, 881, 882, 883, 884, 885, | 6325 /* 1200 */ 877, 878, 879, 880, 881, 882, 883, 884, 885, 886, |
6322 /* 1210 */ 886, 887, 888, 889, 890, 891, 892, 893, 894, 796, | 6326 /* 1210 */ 887, 888, 889, 890, 891, 892, 893, 894, 895, 797, |
6323 /* 1220 */ 895, 896, 897, 898, 899, 900, 901, 902, 903, 904, | 6327 /* 1220 */ 896, 897, 898, 899, 900, 901, 902, 903, 904, 905, |
6324 /* 1230 */ 905, 906, 907, 908, 796, NACL_OPCODE_NULL_OFFSET, 909, 910, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, | 6328 /* 1230 */ 906, 907, 908, 909, 797, NACL_OPCODE_NULL_OFFSET, 910, 911, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, |
6325 /* 1240 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6329 /* 1240 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6326 /* 1250 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 911, 912, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, | 6330 /* 1250 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 912, 913, NACL_O
PCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, |
6327 /* 1260 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6331 /* 1260 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6328 /* 1270 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6332 /* 1270 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6329 /* 1280 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6333 /* 1280 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6330 /* 1290 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6334 /* 1290 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6331 /* 1300 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6335 /* 1300 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6332 /* 1310 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6336 /* 1310 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6333 /* 1320 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6337 /* 1320 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6334 /* 1330 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6338 /* 1330 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6335 /* 1340 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6339 /* 1340 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6336 /* 1350 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6340 /* 1350 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6337 /* 1360 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 913, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 914, NACL_OPCODE
_NULL_OFFSET, 915, NACL_OPCODE_NULL_OFFSET, | 6341 /* 1360 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 914, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 915, NACL_OPCODE
_NULL_OFFSET, 916, NACL_OPCODE_NULL_OFFSET, |
6338 /* 1370 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 916, NACL_OPCODE
_NULL_OFFSET, 917, 918, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 919, N
ACL_OPCODE_NULL_OFFSET, | 6342 /* 1370 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 917, NACL_OPCODE
_NULL_OFFSET, 918, 919, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 920, N
ACL_OPCODE_NULL_OFFSET, |
6339 /* 1380 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 920, NACL_OPCODE
_NULL_OFFSET, 921, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, 922, NACL_OPCODE_NULL_OFFSET, | 6343 /* 1380 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 921, NACL_OPCODE
_NULL_OFFSET, 922, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, 923, NACL_OPCODE_NULL_OFFSET, |
6340 /* 1390 */ 923, 924, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 925, N
ACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 926, N
ACL_OPCODE_NULL_OFFSET, | 6344 /* 1390 */ 924, 925, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 926, N
ACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 927, N
ACL_OPCODE_NULL_OFFSET, |
6341 /* 1400 */ 927, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, 928, NACL_OPCODE_NULL_OFFSET, 929, 930, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6345 /* 1400 */ 928, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, 929, NACL_OPCODE_NULL_OFFSET, 930, 931, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6342 /* 1410 */ NACL_OPCODE_NULL_OFFSET, 931, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 932, NACL_OPCODE_NULL_OFFSET, 933, 934, 9
35, | 6346 /* 1410 */ NACL_OPCODE_NULL_OFFSET, 932, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 933, NACL_OPCODE_NULL_OFFSET, 934, 935, 9
36, |
6343 /* 1420 */ 936, 937, 938, 939, 940, 941, 942, 943, 944, 16, | 6347 /* 1420 */ 937, 938, 939, 940, 941, 942, 943, 944, 945, 16, |
6344 /* 1430 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6348 /* 1430 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6345 /* 1440 */ 16, 16, 16, 16, 16, 945, 946, 947, 16, 16, | 6349 /* 1440 */ 16, 16, 16, 16, 16, 946, 947, 948, 16, 16, |
6346 /* 1450 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6350 /* 1450 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6347 /* 1460 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6351 /* 1460 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6348 /* 1470 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6352 /* 1470 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6349 /* 1480 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6353 /* 1480 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6350 /* 1490 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6354 /* 1490 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6351 /* 1500 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6355 /* 1500 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6352 /* 1510 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6356 /* 1510 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6353 /* 1520 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6357 /* 1520 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6354 /* 1530 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6358 /* 1530 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6355 /* 1540 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6359 /* 1540 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6356 /* 1550 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6360 /* 1550 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6357 /* 1560 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6361 /* 1560 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6358 /* 1570 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6362 /* 1570 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6359 /* 1580 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6363 /* 1580 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6360 /* 1590 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6364 /* 1590 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6361 /* 1600 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6365 /* 1600 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6362 /* 1610 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6366 /* 1610 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6363 /* 1620 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6367 /* 1620 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6364 /* 1630 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6368 /* 1630 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6365 /* 1640 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6369 /* 1640 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6366 /* 1650 */ 16, 16, 16, 16, 16, 16, 16, 948, 949, 16, | 6370 /* 1650 */ 16, 16, 16, 16, 16, 16, 16, 949, 950, 16, |
6367 /* 1660 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6371 /* 1660 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6368 /* 1670 */ 16, 16, 16, 950, 951, 952, 953, 954, 955, 956, | 6372 /* 1670 */ 16, 16, 16, 951, 952, 953, 954, 955, 956, 957, |
6369 /* 1680 */ 957, 958, 959, 960, 961, 796, 796, 796, 796, 962, | 6373 /* 1680 */ 958, 959, 960, 961, 962, 797, 797, 797, 797, 963, |
6370 /* 1690 */ 796, 796, 796, 963, 964, 796, 965, 796, 796, 796, | 6374 /* 1690 */ 797, 797, 797, 964, 965, 797, 966, 797, 797, 797, |
6371 /* 1700 */ 796, 966, 967, 968, 796, 969, 970, 971, 972, 973, | 6375 /* 1700 */ 797, 967, 968, 969, 797, 970, 971, 972, 973, 974, |
6372 /* 1710 */ 974, 796, 796, 975, 976, 977, 978, 796, 796, 796, | 6376 /* 1710 */ 975, 797, 797, 976, 977, 978, 979, 797, 797, 797, |
6373 /* 1720 */ 796, 979, 980, 981, 982, 983, 984, 796, 985, 986, | 6377 /* 1720 */ 797, 980, 981, 982, 983, 984, 985, 797, 986, 987, |
6374 /* 1730 */ 987, 988, 989, 990, 991, 992, 993, 994, 995, 796, | 6378 /* 1730 */ 988, 989, 990, 991, 992, 993, 994, 995, 996, 797, |
6375 /* 1740 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6379 /* 1740 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6376 /* 1750 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6380 /* 1750 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6377 /* 1760 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6381 /* 1760 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6378 /* 1770 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6382 /* 1770 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6379 /* 1780 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6383 /* 1780 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6380 /* 1790 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6384 /* 1790 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6381 /* 1800 */ 796, 996, 997, 796, 796, 796, 796, 796, 796, 796, | 6385 /* 1800 */ 797, 997, 998, 797, 797, 797, 797, 797, 797, 797, |
6382 /* 1810 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6386 /* 1810 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6383 /* 1820 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6387 /* 1820 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6384 /* 1830 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6388 /* 1830 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6385 /* 1840 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6389 /* 1840 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6386 /* 1850 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6390 /* 1850 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6387 /* 1860 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6391 /* 1860 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6388 /* 1870 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6392 /* 1870 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6389 /* 1880 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6393 /* 1880 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6390 /* 1890 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6394 /* 1890 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6391 /* 1900 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, 796, | 6395 /* 1900 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, 797, |
6392 /* 1910 */ 796, 796, 796, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 7
96, 796, 796, 796, 796, | 6396 /* 1910 */ 797, 797, 797, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 7
97, 797, 797, 797, 797, |
6393 /* 1920 */ 796, 796, 796, 796, 796, 796, 796, 796, 796, NACL_OPCODE_NULL_OFFS
ET, | 6397 /* 1920 */ 797, 797, 797, 797, 797, 797, 797, 797, 797, NACL_OPCODE_NULL_OFFS
ET, |
6394 /* 1930 */ 998, 999, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1000,
NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1001, 1002, 1003, | 6398 /* 1930 */ 999, 1000, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1001,
NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1002, 1003, 1004, |
6395 /* 1940 */ 1004, 1005, 1006, 1007, 1008, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1009, | 6399 /* 1940 */ 1005, 1006, 1007, 1008, 1009, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE
_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1010, |
6396 /* 1950 */ 1010, 1011, 1012, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET
, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NAC
L_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, | 6400 /* 1950 */ 1011, 1012, 1013, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET
, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NAC
L_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, |
6397 /* 1960 */ NACL_OPCODE_NULL_OFFSET, 1013, 1014, 1015, NACL_OPCODE_NULL_OFFSET
, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NAC
L_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, | 6401 /* 1960 */ NACL_OPCODE_NULL_OFFSET, 1014, 1015, 1016, NACL_OPCODE_NULL_OFFSET
, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NAC
L_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, |
6398 /* 1970 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6402 /* 1970 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6399 /* 1980 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6403 /* 1980 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6400 /* 1990 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, 1016, 1017, 1018, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NAC
L_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, | 6404 /* 1990 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, 1017, 1018, 1019, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NAC
L_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, |
6401 /* 2000 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6405 /* 2000 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6402 /* 2010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, | 6406 /* 2010 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFS
ET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, N
ACL_OPCODE_NULL_OFFSET, |
6403 /* 2020 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1019, 1020, 1021, 102
2, NACL_OPCODE_NULL_OFFSET, | 6407 /* 2020 */ NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL
_OFFSET, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1020, 1021, 1022, 102
3, NACL_OPCODE_NULL_OFFSET, |
6404 /* 2030 */ NACL_OPCODE_NULL_OFFSET, 1023, 1024, 1025, 1026, 1027, 1028, 1029,
1030, 1031, | 6408 /* 2030 */ NACL_OPCODE_NULL_OFFSET, 1024, 1025, 1026, 1027, 1028, 1029, 1030,
1031, 1032, |
6405 /* 2040 */ 1032, 1033, 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041, | 6409 /* 2040 */ 1033, 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041, 1042, |
6406 /* 2050 */ 1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049, 1050, 1051, | 6410 /* 2050 */ 1043, 1044, 1045, 1046, 1047, 1048, 1049, 1050, 1051, 1052, |
6407 /* 2060 */ 1052, 1053, 1054, 1055, 1056, 1057, 1058, 1059, 1060, 1061, | 6411 /* 2060 */ 1053, 1054, 1055, 1056, 1057, 1058, 1059, 1060, 1061, 1062, |
6408 /* 2070 */ 1062, 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071, | 6412 /* 2070 */ 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071, 1072, |
6409 /* 2080 */ 1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081, | 6413 /* 2080 */ 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081, 1082, |
6410 /* 2090 */ 1082, 1083, 1084, 1085, 1086, NACL_OPCODE_NULL_OFFSET, 1087, 1088,
1089, 1090, | 6414 /* 2090 */ 1083, 1084, 1085, 1086, 1087, NACL_OPCODE_NULL_OFFSET, 1088, 1089,
1090, 1091, |
6411 /* 2100 */ 1091, 1092, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100, | 6415 /* 2100 */ 1092, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101, |
6412 /* 2110 */ 1101, 1102, 1103, 16, 16, 16, 16, 16, 16, 16, | 6416 /* 2110 */ 1102, 1103, 1104, 16, 16, 16, 16, 16, 16, 16, |
6413 /* 2120 */ 16, 16, 16, 16, 16, 16, 16, 16, 1104, 1105, | 6417 /* 2120 */ 16, 16, 16, 16, 16, 16, 16, 16, 1105, 1106, |
6414 /* 2130 */ 16, 16, 1106, 1107, 16, 16, 1108, 1109, 1110, 1111, | 6418 /* 2130 */ 16, 16, 1107, 1108, 16, 16, 1109, 1110, 1111, 1112, |
6415 /* 2140 */ 1112, 1113, 1114, 16, 1115, 1116, 1117, 1118, 1119, 1120, | 6419 /* 2140 */ 1113, 1114, 1115, 16, 1116, 1117, 1118, 1119, 1120, 1121, |
6416 /* 2150 */ 1121, 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129, 1130, | 6420 /* 2150 */ 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129, 1130, 1131, |
6417 /* 2160 */ NACL_OPCODE_NULL_OFFSET, 1131, 1132, 1133, 1134, 1135, 1136, 1137,
1138, 1139, | 6421 /* 2160 */ NACL_OPCODE_NULL_OFFSET, 1132, 1133, 1134, 1135, 1136, 1137, 1138,
1139, 1140, |
6418 /* 2170 */ 1140, 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149, | 6422 /* 2170 */ 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149, 1150, |
6419 /* 2180 */ 1150, 1151, 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, | 6423 /* 2180 */ 1151, 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, |
6420 /* 2190 */ 1160, 1161, 1162, 16, 16, 16, 16, 16, 16, 16, | 6424 /* 2190 */ 1161, 1162, 1163, 16, 16, 16, 16, 16, 16, 16, |
6421 /* 2200 */ 16, 16, 1163, 16, 16, 16, 16, 16, 16, 16, | 6425 /* 2200 */ 16, 16, 1164, 16, 16, 16, 16, 16, 16, 16, |
6422 /* 2210 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6426 /* 2210 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6423 /* 2220 */ 16, 16, 16, 16, 16, NACL_OPCODE_NULL_OFFSET, 1164, 1165, 1166, 116
7, | 6427 /* 2220 */ 16, 16, 16, 16, 16, NACL_OPCODE_NULL_OFFSET, 1165, 1166, 1167, 116
8, |
6424 /* 2230 */ 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, | 6428 /* 2230 */ 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178, |
6425 /* 2240 */ 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187, | 6429 /* 2240 */ 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187, 1188, |
6426 /* 2250 */ 1188, 1189, 1190, 1191, 1192, 1193, 1194, 1195, 16, 16, | 6430 /* 2250 */ 1189, 1190, 1191, 1192, 1193, 1194, 1195, 1196, 16, 16, |
6427 /* 2260 */ 1196, 1197, 16, 16, 16, 16, 1198, 1199, 1200, 1201, | 6431 /* 2260 */ 1197, 1198, 16, 16, 16, 16, 1199, 1200, 1201, 1202, |
6428 /* 2270 */ 1202, 1203, 1204, 1205, 1206, 1207, 1208, 1209, 1210, 1211, | 6432 /* 2270 */ 1203, 1204, 1205, 1206, 1207, 1208, 1209, 1210, 1211, 1212, |
6429 /* 2280 */ 1212, 1213, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1023
, 1214, 1215, 1216, 1217, 1218, | 6433 /* 2280 */ 1213, 1214, NACL_OPCODE_NULL_OFFSET, NACL_OPCODE_NULL_OFFSET, 1024
, 1215, 1216, 1217, 1218, 1219, |
6430 /* 2290 */ 1219, 1220, 1031, 1221, 1222, 1223, 1224, 1225, 1226, 1227, | 6434 /* 2290 */ 1220, 1221, 1032, 1222, 1223, 1224, 1225, 1226, 1227, 1228, |
6431 /* 2300 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6435 /* 2300 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6432 /* 2310 */ 16, 16, 16, 16, 16, 16, 1063, 1228, 1229, 1230, | 6436 /* 2310 */ 16, 16, 16, 16, 16, 16, 1064, 1229, 1230, 1231, |
6433 /* 2320 */ 1231, 1232, 1233, 1234, 1055, 1235, 1236, 1237, 1238, 1239, | 6437 /* 2320 */ 1232, 1233, 1234, 1235, 1056, 1236, 1237, 1238, 1239, 1240, |
6434 /* 2330 */ 1240, 1241, 1079, 1242, 1243, 1244, 1245, 1246, 1247, 1248, | 6438 /* 2330 */ 1241, 1242, 1080, 1243, 1244, 1245, 1246, 1247, 1248, 1249, |
6435 /* 2340 */ 1071, 1249, 1250, 1251, 1252, 1253, 1254, 1255, NACL_OPCODE_NULL_O
FFSET, 1256, | 6439 /* 2340 */ 1072, 1250, 1251, 1252, 1253, 1254, 1255, 1256, NACL_OPCODE_NULL_O
FFSET, 1257, |
6436 /* 2350 */ 1257, 1258, 1259, 1260, 1261, 1262, 1263, 16, 16, 16, | 6440 /* 2350 */ 1258, 1259, 1260, 1261, 1262, 1263, 1264, 16, 16, 16, |
6437 /* 2360 */ 16, 16, 16, 16, 16, 1264, 1265, 1266, 1267, 1268, | 6441 /* 2360 */ 16, 16, 16, 16, 16, 1265, 1266, 1267, 1268, 1269, |
6438 /* 2370 */ 1269, 1270, 1271, 1272, 1273, 1274, 1275, 1276, 1277, 1278, | 6442 /* 2370 */ 1270, 1271, 1272, 1273, 1274, 1275, 1276, 1277, 1278, 1279, |
6439 /* 2380 */ 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, | 6443 /* 2380 */ 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, |
6440 /* 2390 */ 1289, 1290, 1291, 1292, 1293, 1294, 1295, 16, 16, 16, | 6444 /* 2390 */ 1290, 1291, 1292, 1293, 1294, 1295, 1296, 16, 16, 16, |
6441 /* 2400 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | 6445 /* 2400 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, |
6442 /* 2410 */ 16, 16, 16, NACL_OPCODE_NULL_OFFSET, 1296, 1297, 1298, 1299, 1300,
1301, | 6446 /* 2410 */ 16, 16, 16, NACL_OPCODE_NULL_OFFSET, 1297, 1298, 1299, 1300, 1301,
1302, |
6443 /* 2420 */ 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311, | 6447 /* 2420 */ 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311, 1312, |
6444 /* 2430 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 1312, | 6448 /* 2430 */ 16, 16, 16, 16, 16, 16, 16, 16, 16, 1313, |
6445 /* 2440 */ 16, 16, 16, 16, 16, 16, 1313, 1314, 1315, 1316, | 6449 /* 2440 */ 16, 16, 16, 16, 16, 16, 1314, 1315, 1316, 1317, |
6446 /* 2450 */ 1317, 1318, 1319, 1320, 1321, 1322, 1323, 1324, 1325, 1326, | 6450 /* 2450 */ 1318, 1319, 1320, 1321, 1322, 1323, 1324, 1325, 1326, 1327, |
6447 /* 2460 */ 1327, 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, | 6451 /* 2460 */ 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337, |
6448 /* 2470 */ 1337, 1338, 1339, 1340, 1341, 1342, 1343, 1344, NACL_OPCODE_NULL_O
FFSET, 1345, | 6452 /* 2470 */ 1338, 1339, 1340, 1341, 1342, 1343, 1344, 1345, NACL_OPCODE_NULL_O
FFSET, 1346, |
6449 /* 2480 */ 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, | 6453 /* 2480 */ 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, |
6450 /* 2490 */ 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, | 6454 /* 2490 */ 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, |
6451 /* 2500 */ 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, 1345, | 6455 /* 2500 */ 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, 1346, |
6452 /* 2510 */ 1345, 1346, 16, 16, 16, 16, 16, 16, 16, 1347, | 6456 /* 2510 */ 1346, 1347, 16, 16, 16, 16, 16, 16, 16, 1348, |
6453 /* 2520 */ 1348, 1349, 1350, 1351, 1352, 1353, 1354, 1355, 1356, 1357, | 6457 /* 2520 */ 1349, 1350, 1351, 1352, 1353, 1354, 1355, 1356, 1357, 1358, |
6454 /* 2530 */ 1358, 1359, 1360, 1361, 1362, 16, 16, 16, 16, 16, | 6458 /* 2530 */ 1359, 1360, 1361, 1362, 1363, 16, 16, 16, 16, 16, |
6455 /* 2540 */ 16, 16, 16, }; | 6459 /* 2540 */ 16, 16, 16, }; |
6456 | 6460 |
6457 static const NaClPrefixOpcodeSelector g_PrefixOpcode[NaClInstPrefixEnumSize] = { | 6461 static const NaClPrefixOpcodeSelector g_PrefixOpcode[NaClInstPrefixEnumSize] = { |
6458 /* NoPrefix */ { 0 , 0x00, 0xff }, | 6462 /* NoPrefix */ { 0 , 0x00, 0xff }, |
6459 /* Prefix0F */ { 256 , 0x00, 0xff }, | 6463 /* Prefix0F */ { 256 , 0x00, 0xff }, |
6460 /* PrefixF20F */ { 512 , 0x0f, 0xff }, | 6464 /* PrefixF20F */ { 512 , 0x0f, 0xff }, |
6461 /* PrefixF30F */ { 753 , 0x0f, 0xff }, | 6465 /* PrefixF30F */ { 753 , 0x0f, 0xff }, |
6462 /* Prefix660F */ { 994 , 0x0f, 0xff }, | 6466 /* Prefix660F */ { 994 , 0x0f, 0xff }, |
6463 /* Prefix0F0F */ { 1235 , 0x0b, 0xc0 }, | 6467 /* Prefix0F0F */ { 1235 , 0x0b, 0xc0 }, |
6464 /* Prefix0F38 */ { 1417 , 0x00, 0xff }, | 6468 /* Prefix0F38 */ { 1417 , 0x00, 0xff }, |
(...skipping 48 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
6513 | 6517 |
6514 static const NaClInstNode g_OpcodeSeq[95] = { | 6518 static const NaClInstNode g_OpcodeSeq[95] = { |
6515 /* 0 */ | 6519 /* 0 */ |
6516 { 0x0f, | 6520 { 0x0f, |
6517 NACL_OPCODE_NULL_OFFSET, | 6521 NACL_OPCODE_NULL_OFFSET, |
6518 g_OpcodeSeq + 1, | 6522 g_OpcodeSeq + 1, |
6519 g_OpcodeSeq + 20, | 6523 g_OpcodeSeq + 20, |
6520 }, | 6524 }, |
6521 /* 1 */ | 6525 /* 1 */ |
6522 { 0x0b, | 6526 { 0x0b, |
6523 1363, | 6527 1364, |
6524 NULL, | 6528 NULL, |
6525 g_OpcodeSeq + 2, | 6529 g_OpcodeSeq + 2, |
6526 }, | 6530 }, |
6527 /* 2 */ | 6531 /* 2 */ |
6528 { 0x1f, | 6532 { 0x1f, |
6529 NACL_OPCODE_NULL_OFFSET, | 6533 NACL_OPCODE_NULL_OFFSET, |
6530 g_OpcodeSeq + 3, | 6534 g_OpcodeSeq + 3, |
6531 NULL, | 6535 NULL, |
6532 }, | 6536 }, |
6533 /* 3 */ | 6537 /* 3 */ |
6534 { 0x00, | 6538 { 0x00, |
6535 1364, | 6539 1365, |
6536 NULL, | 6540 NULL, |
6537 g_OpcodeSeq + 4, | 6541 g_OpcodeSeq + 4, |
6538 }, | 6542 }, |
6539 /* 4 */ | 6543 /* 4 */ |
6540 { 0x40, | 6544 { 0x40, |
6541 NACL_OPCODE_NULL_OFFSET, | 6545 NACL_OPCODE_NULL_OFFSET, |
6542 g_OpcodeSeq + 5, | 6546 g_OpcodeSeq + 5, |
6543 g_OpcodeSeq + 6, | 6547 g_OpcodeSeq + 6, |
6544 }, | 6548 }, |
6545 /* 5 */ | 6549 /* 5 */ |
6546 { 0x00, | 6550 { 0x00, |
6547 1364, | 6551 1365, |
6548 NULL, | 6552 NULL, |
6549 NULL, | 6553 NULL, |
6550 }, | 6554 }, |
6551 /* 6 */ | 6555 /* 6 */ |
6552 { 0x44, | 6556 { 0x44, |
6553 NACL_OPCODE_NULL_OFFSET, | 6557 NACL_OPCODE_NULL_OFFSET, |
6554 g_OpcodeSeq + 7, | 6558 g_OpcodeSeq + 7, |
6555 g_OpcodeSeq + 9, | 6559 g_OpcodeSeq + 9, |
6556 }, | 6560 }, |
6557 /* 7 */ | 6561 /* 7 */ |
6558 { 0x00, | 6562 { 0x00, |
6559 NACL_OPCODE_NULL_OFFSET, | 6563 NACL_OPCODE_NULL_OFFSET, |
6560 g_OpcodeSeq + 8, | 6564 g_OpcodeSeq + 8, |
6561 NULL, | 6565 NULL, |
6562 }, | 6566 }, |
6563 /* 8 */ | 6567 /* 8 */ |
6564 { 0x00, | 6568 { 0x00, |
6565 1364, | 6569 1365, |
6566 NULL, | 6570 NULL, |
6567 NULL, | 6571 NULL, |
6568 }, | 6572 }, |
6569 /* 9 */ | 6573 /* 9 */ |
6570 { 0x80, | 6574 { 0x80, |
6571 NACL_OPCODE_NULL_OFFSET, | 6575 NACL_OPCODE_NULL_OFFSET, |
6572 g_OpcodeSeq + 10, | 6576 g_OpcodeSeq + 10, |
6573 g_OpcodeSeq + 14, | 6577 g_OpcodeSeq + 14, |
6574 }, | 6578 }, |
6575 /* 10 */ | 6579 /* 10 */ |
6576 { 0x00, | 6580 { 0x00, |
6577 NACL_OPCODE_NULL_OFFSET, | 6581 NACL_OPCODE_NULL_OFFSET, |
6578 g_OpcodeSeq + 11, | 6582 g_OpcodeSeq + 11, |
6579 NULL, | 6583 NULL, |
6580 }, | 6584 }, |
6581 /* 11 */ | 6585 /* 11 */ |
6582 { 0x00, | 6586 { 0x00, |
6583 NACL_OPCODE_NULL_OFFSET, | 6587 NACL_OPCODE_NULL_OFFSET, |
6584 g_OpcodeSeq + 12, | 6588 g_OpcodeSeq + 12, |
6585 NULL, | 6589 NULL, |
6586 }, | 6590 }, |
6587 /* 12 */ | 6591 /* 12 */ |
6588 { 0x00, | 6592 { 0x00, |
6589 NACL_OPCODE_NULL_OFFSET, | 6593 NACL_OPCODE_NULL_OFFSET, |
6590 g_OpcodeSeq + 13, | 6594 g_OpcodeSeq + 13, |
6591 NULL, | 6595 NULL, |
6592 }, | 6596 }, |
6593 /* 13 */ | 6597 /* 13 */ |
6594 { 0x00, | 6598 { 0x00, |
6595 1364, | 6599 1365, |
6596 NULL, | 6600 NULL, |
6597 NULL, | 6601 NULL, |
6598 }, | 6602 }, |
6599 /* 14 */ | 6603 /* 14 */ |
6600 { 0x84, | 6604 { 0x84, |
6601 NACL_OPCODE_NULL_OFFSET, | 6605 NACL_OPCODE_NULL_OFFSET, |
6602 g_OpcodeSeq + 15, | 6606 g_OpcodeSeq + 15, |
6603 NULL, | 6607 NULL, |
6604 }, | 6608 }, |
6605 /* 15 */ | 6609 /* 15 */ |
(...skipping 15 matching lines...) Expand all Loading... |
6621 NULL, | 6625 NULL, |
6622 }, | 6626 }, |
6623 /* 18 */ | 6627 /* 18 */ |
6624 { 0x00, | 6628 { 0x00, |
6625 NACL_OPCODE_NULL_OFFSET, | 6629 NACL_OPCODE_NULL_OFFSET, |
6626 g_OpcodeSeq + 19, | 6630 g_OpcodeSeq + 19, |
6627 NULL, | 6631 NULL, |
6628 }, | 6632 }, |
6629 /* 19 */ | 6633 /* 19 */ |
6630 { 0x00, | 6634 { 0x00, |
6631 1364, | 6635 1365, |
6632 NULL, | 6636 NULL, |
6633 NULL, | 6637 NULL, |
6634 }, | 6638 }, |
6635 /* 20 */ | 6639 /* 20 */ |
6636 { 0x66, | 6640 { 0x66, |
6637 NACL_OPCODE_NULL_OFFSET, | 6641 NACL_OPCODE_NULL_OFFSET, |
6638 g_OpcodeSeq + 21, | 6642 g_OpcodeSeq + 21, |
6639 g_OpcodeSeq + 92, | 6643 g_OpcodeSeq + 92, |
6640 }, | 6644 }, |
6641 /* 21 */ | 6645 /* 21 */ |
(...skipping 15 matching lines...) Expand all Loading... |
6657 g_OpcodeSeq + 26, | 6661 g_OpcodeSeq + 26, |
6658 }, | 6662 }, |
6659 /* 24 */ | 6663 /* 24 */ |
6660 { 0x00, | 6664 { 0x00, |
6661 NACL_OPCODE_NULL_OFFSET, | 6665 NACL_OPCODE_NULL_OFFSET, |
6662 g_OpcodeSeq + 25, | 6666 g_OpcodeSeq + 25, |
6663 NULL, | 6667 NULL, |
6664 }, | 6668 }, |
6665 /* 25 */ | 6669 /* 25 */ |
6666 { 0x00, | 6670 { 0x00, |
6667 1364, | 6671 1365, |
6668 NULL, | 6672 NULL, |
6669 NULL, | 6673 NULL, |
6670 }, | 6674 }, |
6671 /* 26 */ | 6675 /* 26 */ |
6672 { 0x84, | 6676 { 0x84, |
6673 NACL_OPCODE_NULL_OFFSET, | 6677 NACL_OPCODE_NULL_OFFSET, |
6674 g_OpcodeSeq + 27, | 6678 g_OpcodeSeq + 27, |
6675 NULL, | 6679 NULL, |
6676 }, | 6680 }, |
6677 /* 27 */ | 6681 /* 27 */ |
(...skipping 15 matching lines...) Expand all Loading... |
6693 NULL, | 6697 NULL, |
6694 }, | 6698 }, |
6695 /* 30 */ | 6699 /* 30 */ |
6696 { 0x00, | 6700 { 0x00, |
6697 NACL_OPCODE_NULL_OFFSET, | 6701 NACL_OPCODE_NULL_OFFSET, |
6698 g_OpcodeSeq + 31, | 6702 g_OpcodeSeq + 31, |
6699 NULL, | 6703 NULL, |
6700 }, | 6704 }, |
6701 /* 31 */ | 6705 /* 31 */ |
6702 { 0x00, | 6706 { 0x00, |
6703 1364, | 6707 1365, |
6704 NULL, | 6708 NULL, |
6705 NULL, | 6709 NULL, |
6706 }, | 6710 }, |
6707 /* 32 */ | 6711 /* 32 */ |
6708 { 0x2e, | 6712 { 0x2e, |
6709 NACL_OPCODE_NULL_OFFSET, | 6713 NACL_OPCODE_NULL_OFFSET, |
6710 g_OpcodeSeq + 33, | 6714 g_OpcodeSeq + 33, |
6711 g_OpcodeSeq + 41, | 6715 g_OpcodeSeq + 41, |
6712 }, | 6716 }, |
6713 /* 33 */ | 6717 /* 33 */ |
(...skipping 33 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
6747 NULL, | 6751 NULL, |
6748 }, | 6752 }, |
6749 /* 39 */ | 6753 /* 39 */ |
6750 { 0x00, | 6754 { 0x00, |
6751 NACL_OPCODE_NULL_OFFSET, | 6755 NACL_OPCODE_NULL_OFFSET, |
6752 g_OpcodeSeq + 40, | 6756 g_OpcodeSeq + 40, |
6753 NULL, | 6757 NULL, |
6754 }, | 6758 }, |
6755 /* 40 */ | 6759 /* 40 */ |
6756 { 0x00, | 6760 { 0x00, |
6757 1364, | 6761 1365, |
6758 NULL, | 6762 NULL, |
6759 NULL, | 6763 NULL, |
6760 }, | 6764 }, |
6761 /* 41 */ | 6765 /* 41 */ |
6762 { 0x66, | 6766 { 0x66, |
6763 NACL_OPCODE_NULL_OFFSET, | 6767 NACL_OPCODE_NULL_OFFSET, |
6764 g_OpcodeSeq + 42, | 6768 g_OpcodeSeq + 42, |
6765 g_OpcodeSeq + 91, | 6769 g_OpcodeSeq + 91, |
6766 }, | 6770 }, |
6767 /* 42 */ | 6771 /* 42 */ |
(...skipping 39 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
6807 NULL, | 6811 NULL, |
6808 }, | 6812 }, |
6809 /* 49 */ | 6813 /* 49 */ |
6810 { 0x00, | 6814 { 0x00, |
6811 NACL_OPCODE_NULL_OFFSET, | 6815 NACL_OPCODE_NULL_OFFSET, |
6812 g_OpcodeSeq + 50, | 6816 g_OpcodeSeq + 50, |
6813 NULL, | 6817 NULL, |
6814 }, | 6818 }, |
6815 /* 50 */ | 6819 /* 50 */ |
6816 { 0x00, | 6820 { 0x00, |
6817 1364, | 6821 1365, |
6818 NULL, | 6822 NULL, |
6819 NULL, | 6823 NULL, |
6820 }, | 6824 }, |
6821 /* 51 */ | 6825 /* 51 */ |
6822 { 0x66, | 6826 { 0x66, |
6823 NACL_OPCODE_NULL_OFFSET, | 6827 NACL_OPCODE_NULL_OFFSET, |
6824 g_OpcodeSeq + 52, | 6828 g_OpcodeSeq + 52, |
6825 NULL, | 6829 NULL, |
6826 }, | 6830 }, |
6827 /* 52 */ | 6831 /* 52 */ |
(...skipping 39 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
6867 NULL, | 6871 NULL, |
6868 }, | 6872 }, |
6869 /* 59 */ | 6873 /* 59 */ |
6870 { 0x00, | 6874 { 0x00, |
6871 NACL_OPCODE_NULL_OFFSET, | 6875 NACL_OPCODE_NULL_OFFSET, |
6872 g_OpcodeSeq + 60, | 6876 g_OpcodeSeq + 60, |
6873 NULL, | 6877 NULL, |
6874 }, | 6878 }, |
6875 /* 60 */ | 6879 /* 60 */ |
6876 { 0x00, | 6880 { 0x00, |
6877 1364, | 6881 1365, |
6878 NULL, | 6882 NULL, |
6879 NULL, | 6883 NULL, |
6880 }, | 6884 }, |
6881 /* 61 */ | 6885 /* 61 */ |
6882 { 0x66, | 6886 { 0x66, |
6883 NACL_OPCODE_NULL_OFFSET, | 6887 NACL_OPCODE_NULL_OFFSET, |
6884 g_OpcodeSeq + 62, | 6888 g_OpcodeSeq + 62, |
6885 NULL, | 6889 NULL, |
6886 }, | 6890 }, |
6887 /* 62 */ | 6891 /* 62 */ |
(...skipping 39 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
6927 NULL, | 6931 NULL, |
6928 }, | 6932 }, |
6929 /* 69 */ | 6933 /* 69 */ |
6930 { 0x00, | 6934 { 0x00, |
6931 NACL_OPCODE_NULL_OFFSET, | 6935 NACL_OPCODE_NULL_OFFSET, |
6932 g_OpcodeSeq + 70, | 6936 g_OpcodeSeq + 70, |
6933 NULL, | 6937 NULL, |
6934 }, | 6938 }, |
6935 /* 70 */ | 6939 /* 70 */ |
6936 { 0x00, | 6940 { 0x00, |
6937 1364, | 6941 1365, |
6938 NULL, | 6942 NULL, |
6939 NULL, | 6943 NULL, |
6940 }, | 6944 }, |
6941 /* 71 */ | 6945 /* 71 */ |
6942 { 0x66, | 6946 { 0x66, |
6943 NACL_OPCODE_NULL_OFFSET, | 6947 NACL_OPCODE_NULL_OFFSET, |
6944 g_OpcodeSeq + 72, | 6948 g_OpcodeSeq + 72, |
6945 NULL, | 6949 NULL, |
6946 }, | 6950 }, |
6947 /* 72 */ | 6951 /* 72 */ |
(...skipping 39 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
6987 NULL, | 6991 NULL, |
6988 }, | 6992 }, |
6989 /* 79 */ | 6993 /* 79 */ |
6990 { 0x00, | 6994 { 0x00, |
6991 NACL_OPCODE_NULL_OFFSET, | 6995 NACL_OPCODE_NULL_OFFSET, |
6992 g_OpcodeSeq + 80, | 6996 g_OpcodeSeq + 80, |
6993 NULL, | 6997 NULL, |
6994 }, | 6998 }, |
6995 /* 80 */ | 6999 /* 80 */ |
6996 { 0x00, | 7000 { 0x00, |
6997 1364, | 7001 1365, |
6998 NULL, | 7002 NULL, |
6999 NULL, | 7003 NULL, |
7000 }, | 7004 }, |
7001 /* 81 */ | 7005 /* 81 */ |
7002 { 0x66, | 7006 { 0x66, |
7003 NACL_OPCODE_NULL_OFFSET, | 7007 NACL_OPCODE_NULL_OFFSET, |
7004 g_OpcodeSeq + 82, | 7008 g_OpcodeSeq + 82, |
7005 NULL, | 7009 NULL, |
7006 }, | 7010 }, |
7007 /* 82 */ | 7011 /* 82 */ |
(...skipping 39 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
7047 NULL, | 7051 NULL, |
7048 }, | 7052 }, |
7049 /* 89 */ | 7053 /* 89 */ |
7050 { 0x00, | 7054 { 0x00, |
7051 NACL_OPCODE_NULL_OFFSET, | 7055 NACL_OPCODE_NULL_OFFSET, |
7052 g_OpcodeSeq + 90, | 7056 g_OpcodeSeq + 90, |
7053 NULL, | 7057 NULL, |
7054 }, | 7058 }, |
7055 /* 90 */ | 7059 /* 90 */ |
7056 { 0x00, | 7060 { 0x00, |
7057 1364, | 7061 1365, |
7058 NULL, | 7062 NULL, |
7059 NULL, | 7063 NULL, |
7060 }, | 7064 }, |
7061 /* 91 */ | 7065 /* 91 */ |
7062 { 0x90, | 7066 { 0x90, |
7063 1364, | 7067 1365, |
7064 NULL, | 7068 NULL, |
7065 NULL, | 7069 NULL, |
7066 }, | 7070 }, |
7067 /* 92 */ | 7071 /* 92 */ |
7068 { 0x90, | 7072 { 0x90, |
7069 1364, | 7073 1365, |
7070 NULL, | 7074 NULL, |
7071 g_OpcodeSeq + 93, | 7075 g_OpcodeSeq + 93, |
7072 }, | 7076 }, |
7073 /* 93 */ | 7077 /* 93 */ |
7074 { 0xf3, | 7078 { 0xf3, |
7075 NACL_OPCODE_NULL_OFFSET, | 7079 NACL_OPCODE_NULL_OFFSET, |
7076 g_OpcodeSeq + 94, | 7080 g_OpcodeSeq + 94, |
7077 NULL, | 7081 NULL, |
7078 }, | 7082 }, |
7079 /* 94 */ | 7083 /* 94 */ |
7080 { 0x90, | 7084 { 0x90, |
7081 1365, | 7085 1366, |
7082 NULL, | 7086 NULL, |
7083 NULL, | 7087 NULL, |
7084 }, | 7088 }, |
7085 }; | 7089 }; |
OLD | NEW |