Dry run: Try jobs failed on following builders: v8_linux64_rel_ng on master.tryserver.v8 (JOB_FAILED, http://build.chromium.org/p/tryserver.v8/builders/v8_linux64_rel_ng/builds/14657) v8_linux64_rel_ng_triggered on ...
4 years, 2 months ago
(2016-10-17 07:45:57 UTC)
#9
On 2016/10/17 at 08:38:14, bmeurer wrote: > https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc > File src/compiler/pipeline.cc (right): > > https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc#newcode1653 ...
4 years, 2 months ago
(2016-10-17 12:13:20 UTC)
#16
On 2016/10/17 at 08:38:14, bmeurer wrote:
> https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc
> File src/compiler/pipeline.cc (right):
>
>
https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc#ne...
> src/compiler/pipeline.cc:1653: // Run<LateGraphTrimmingPhase>();
> Thx!
PTAL: There was a problem with the instruction selection for Int32PairXXX nodes
on 32 bit platforms. Graph trimming may delete the projection nodes of
Int32PairXXX nodes, which means that we cannot reliably use the projection nodes
for register allocation. I use the following observation to deal with the
problem: As far as I can see, if a projection node is deleted, then it is always
the projection node of the high word. This means that for Int32PairSub,
Int32PairAdd, and Int32PairMul, if the projection node of the high word gets
deleted, we can just emit code for normal 32 bit Add, Sub, and Mul. For shift
instructions, if the projection node of the high word gets deleted, we just
allocate a temp register instead of an output register.
titzer
On 2016/10/17 12:13:20, ahaas wrote: > On 2016/10/17 at 08:38:14, bmeurer wrote: > > https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc ...
4 years, 2 months ago
(2016-10-17 12:21:14 UTC)
#17
On 2016/10/17 12:13:20, ahaas wrote:
> On 2016/10/17 at 08:38:14, bmeurer wrote:
> > https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc
> > File src/compiler/pipeline.cc (right):
> >
> >
>
https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc#ne...
> > src/compiler/pipeline.cc:1653: // Run<LateGraphTrimmingPhase>();
> > Thx!
>
> PTAL: There was a problem with the instruction selection for Int32PairXXX
nodes
> on 32 bit platforms. Graph trimming may delete the projection nodes of
> Int32PairXXX nodes, which means that we cannot reliably use the projection
nodes
> for register allocation. I use the following observation to deal with the
> problem: As far as I can see, if a projection node is deleted, then it is
always
> the projection node of the high word. This means that for Int32PairSub,
> Int32PairAdd, and Int32PairMul, if the projection node of the high word gets
> deleted, we can just emit code for normal 32 bit Add, Sub, and Mul. For shift
> instructions, if the projection node of the high word gets deleted, we just
> allocate a temp register instead of an output register.
The assumption that only the high word gets deleted isn't sound in general. E.g.
if there is a Int32PairAdd flowing into a shift-right by 32 with no other uses,
then only the high projection will be live.
ahaas
On 2016/10/17 at 12:21:14, titzer wrote: > On 2016/10/17 12:13:20, ahaas wrote: > > On ...
4 years, 2 months ago
(2016-10-17 12:36:28 UTC)
#18
On 2016/10/17 at 12:21:14, titzer wrote:
> On 2016/10/17 12:13:20, ahaas wrote:
> > On 2016/10/17 at 08:38:14, bmeurer wrote:
> > > https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc
> > > File src/compiler/pipeline.cc (right):
> > >
> > >
> >
https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc#ne...
> > > src/compiler/pipeline.cc:1653: // Run<LateGraphTrimmingPhase>();
> > > Thx!
> >
> > PTAL: There was a problem with the instruction selection for Int32PairXXX
nodes
> > on 32 bit platforms. Graph trimming may delete the projection nodes of
> > Int32PairXXX nodes, which means that we cannot reliably use the projection
nodes
> > for register allocation. I use the following observation to deal with the
> > problem: As far as I can see, if a projection node is deleted, then it is
always
> > the projection node of the high word. This means that for Int32PairSub,
> > Int32PairAdd, and Int32PairMul, if the projection node of the high word gets
> > deleted, we can just emit code for normal 32 bit Add, Sub, and Mul. For
shift
> > instructions, if the projection node of the high word gets deleted, we just
> > allocate a temp register instead of an output register.
>
> The assumption that only the high word gets deleted isn't sound in general.
E.g. if there is a Int32PairAdd flowing into a shift-right by 32 with no other
uses, then only the high projection will be live.
That's true, but we haven't implemented that optimization yet.
commit-bot: I haz the power
The CQ bit was unchecked by commit-bot@chromium.org
4 years, 2 months ago
(2016-10-17 12:43:53 UTC)
#19
4 years, 2 months ago
(2016-10-17 12:43:53 UTC)
#20
Dry run: This issue passed the CQ dry run.
titzer
On 2016/10/17 12:36:28, ahaas wrote: > On 2016/10/17 at 12:21:14, titzer wrote: > > On ...
4 years, 2 months ago
(2016-10-17 12:44:11 UTC)
#21
On 2016/10/17 12:36:28, ahaas wrote:
> On 2016/10/17 at 12:21:14, titzer wrote:
> > On 2016/10/17 12:13:20, ahaas wrote:
> > > On 2016/10/17 at 08:38:14, bmeurer wrote:
> > > >
https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc
> > > > File src/compiler/pipeline.cc (right):
> > > >
> > > >
> > >
>
https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc#ne...
> > > > src/compiler/pipeline.cc:1653: // Run<LateGraphTrimmingPhase>();
> > > > Thx!
> > >
> > > PTAL: There was a problem with the instruction selection for Int32PairXXX
> nodes
> > > on 32 bit platforms. Graph trimming may delete the projection nodes of
> > > Int32PairXXX nodes, which means that we cannot reliably use the projection
> nodes
> > > for register allocation. I use the following observation to deal with the
> > > problem: As far as I can see, if a projection node is deleted, then it is
> always
> > > the projection node of the high word. This means that for Int32PairSub,
> > > Int32PairAdd, and Int32PairMul, if the projection node of the high word
gets
> > > deleted, we can just emit code for normal 32 bit Add, Sub, and Mul. For
> shift
> > > instructions, if the projection node of the high word gets deleted, we
just
> > > allocate a temp register instead of an output register.
> >
> > The assumption that only the high word gets deleted isn't sound in general.
> E.g. if there is a Int32PairAdd flowing into a shift-right by 32 with no other
> uses, then only the high projection will be live.
>
> That's true, but we haven't implemented that optimization yet.
We will, then we'll have revisit this issue again. I think it's better to just
go ahead and handle the general case.
ahaas
The CQ bit was checked by ahaas@chromium.org to run a CQ dry run
4 years, 2 months ago
(2016-10-18 13:46:04 UTC)
#22
On 2016/10/17 at 12:44:11, titzer wrote: > On 2016/10/17 12:36:28, ahaas wrote: > > On ...
4 years, 2 months ago
(2016-10-18 13:49:57 UTC)
#24
On 2016/10/17 at 12:44:11, titzer wrote:
> On 2016/10/17 12:36:28, ahaas wrote:
> > On 2016/10/17 at 12:21:14, titzer wrote:
> > > On 2016/10/17 12:13:20, ahaas wrote:
> > > > On 2016/10/17 at 08:38:14, bmeurer wrote:
> > > > >
https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc
> > > > > File src/compiler/pipeline.cc (right):
> > > > >
> > > > >
> > > >
> >
https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc#ne...
> > > > > src/compiler/pipeline.cc:1653: // Run<LateGraphTrimmingPhase>();
> > > > > Thx!
> > > >
> > > > PTAL: There was a problem with the instruction selection for
Int32PairXXX
> > nodes
> > > > on 32 bit platforms. Graph trimming may delete the projection nodes of
> > > > Int32PairXXX nodes, which means that we cannot reliably use the
projection
> > nodes
> > > > for register allocation. I use the following observation to deal with
the
> > > > problem: As far as I can see, if a projection node is deleted, then it
is
> > always
> > > > the projection node of the high word. This means that for Int32PairSub,
> > > > Int32PairAdd, and Int32PairMul, if the projection node of the high word
gets
> > > > deleted, we can just emit code for normal 32 bit Add, Sub, and Mul. For
> > shift
> > > > instructions, if the projection node of the high word gets deleted, we
just
> > > > allocate a temp register instead of an output register.
> > >
> > > The assumption that only the high word gets deleted isn't sound in
general.
> > E.g. if there is a Int32PairAdd flowing into a shift-right by 32 with no
other
> > uses, then only the high projection will be live.
> >
> > That's true, but we haven't implemented that optimization yet.
>
> We will, then we'll have revisit this issue again. I think it's better to just
go ahead and handle the general case.
Apparently not having Projection(0) is not a big deal because for register
allocation we use the pair node itself and not Projection(0). This means we
handle the case with no Projection(0) node correctly already.
commit-bot: I haz the power
The CQ bit was unchecked by commit-bot@chromium.org
4 years, 2 months ago
(2016-10-18 14:11:04 UTC)
#25
4 years, 2 months ago
(2016-10-18 14:11:05 UTC)
#26
Dry run: This issue passed the CQ dry run.
ahaas
On 2016/10/18 at 13:49:57, ahaas wrote: > On 2016/10/17 at 12:44:11, titzer wrote: > > ...
4 years, 2 months ago
(2016-10-19 09:15:43 UTC)
#27
On 2016/10/18 at 13:49:57, ahaas wrote:
> On 2016/10/17 at 12:44:11, titzer wrote:
> > On 2016/10/17 12:36:28, ahaas wrote:
> > > On 2016/10/17 at 12:21:14, titzer wrote:
> > > > On 2016/10/17 12:13:20, ahaas wrote:
> > > > > On 2016/10/17 at 08:38:14, bmeurer wrote:
> > > > > >
https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc
> > > > > > File src/compiler/pipeline.cc (right):
> > > > > >
> > > > > >
> > > > >
> > >
https://codereview.chromium.org/2428443002/diff/1/src/compiler/pipeline.cc#ne...
> > > > > > src/compiler/pipeline.cc:1653: // Run<LateGraphTrimmingPhase>();
> > > > > > Thx!
> > > > >
> > > > > PTAL: There was a problem with the instruction selection for
Int32PairXXX
> > > nodes
> > > > > on 32 bit platforms. Graph trimming may delete the projection nodes of
> > > > > Int32PairXXX nodes, which means that we cannot reliably use the
projection
> > > nodes
> > > > > for register allocation. I use the following observation to deal with
the
> > > > > problem: As far as I can see, if a projection node is deleted, then it
is
> > > always
> > > > > the projection node of the high word. This means that for
Int32PairSub,
> > > > > Int32PairAdd, and Int32PairMul, if the projection node of the high
word gets
> > > > > deleted, we can just emit code for normal 32 bit Add, Sub, and Mul.
For
> > > shift
> > > > > instructions, if the projection node of the high word gets deleted, we
just
> > > > > allocate a temp register instead of an output register.
> > > >
> > > > The assumption that only the high word gets deleted isn't sound in
general.
> > > E.g. if there is a Int32PairAdd flowing into a shift-right by 32 with no
other
> > > uses, then only the high projection will be live.
> > >
> > > That's true, but we haven't implemented that optimization yet.
> >
> > We will, then we'll have revisit this issue again. I think it's better to
just go ahead and handle the general case.
>
> Apparently not having Projection(0) is not a big deal because for register
allocation we use the pair node itself and not Projection(0). This means we
handle the case with no Projection(0) node correctly already.
PTAL
lgtm modulo last comment https://codereview.chromium.org/2428443002/diff/80001/src/compiler/ia32/instruction-selector-ia32.cc File src/compiler/ia32/instruction-selector-ia32.cc (right): https://codereview.chromium.org/2428443002/diff/80001/src/compiler/ia32/instruction-selector-ia32.cc#newcode743 src/compiler/ia32/instruction-selector-ia32.cc:743: outputs[output_count++] = g.DefineAsFixed(projection1, edx); On ...
4 years, 2 months ago
(2016-10-19 11:07:08 UTC)
#32
lgtm modulo last comment
https://codereview.chromium.org/2428443002/diff/80001/src/compiler/ia32/instr...
File src/compiler/ia32/instruction-selector-ia32.cc (right):
https://codereview.chromium.org/2428443002/diff/80001/src/compiler/ia32/instr...
src/compiler/ia32/instruction-selector-ia32.cc:743: outputs[output_count++] =
g.DefineAsFixed(projection1, edx);
On 2016/10/19 09:59:19, ahaas wrote:
> On 2016/10/19 at 09:20:42, titzer wrote:
> > This doesn't seem quite right. Isn't edx overwritten, even if the result is
> not used?
>
> We always use edx because it is one of the input registers. If projection1
> exists, then we also define edx as an output register.
That's what I mean. Shouldn't we always mark edx as clobbered so that the
register allocator knows?
commit-bot: I haz the power
The CQ bit was unchecked by commit-bot@chromium.org
4 years, 2 months ago
(2016-10-19 11:13:10 UTC)
#33
On 2016/10/19 at 11:07:08, titzer wrote: > lgtm modulo last comment > > https://codereview.chromium.org/2428443002/diff/80001/src/compiler/ia32/instruction-selector-ia32.cc > ...
4 years, 2 months ago
(2016-10-19 15:51:53 UTC)
#37
On 2016/10/19 at 11:07:08, titzer wrote:
> lgtm modulo last comment
>
>
https://codereview.chromium.org/2428443002/diff/80001/src/compiler/ia32/instr...
> File src/compiler/ia32/instruction-selector-ia32.cc (right):
>
>
https://codereview.chromium.org/2428443002/diff/80001/src/compiler/ia32/instr...
> src/compiler/ia32/instruction-selector-ia32.cc:743: outputs[output_count++] =
g.DefineAsFixed(projection1, edx);
> On 2016/10/19 09:59:19, ahaas wrote:
> > On 2016/10/19 at 09:20:42, titzer wrote:
> > > This doesn't seem quite right. Isn't edx overwritten, even if the result
is
> > not used?
> >
> > We always use edx because it is one of the input registers. If projection1
> > exists, then we also define edx as an output register.
>
> That's what I mean. Shouldn't we always mark edx as clobbered so that the
register allocator knows?
Done.
commit-bot: I haz the power
The CQ bit was unchecked by commit-bot@chromium.org
4 years, 2 months ago
(2016-10-19 16:12:08 UTC)
#38
Oops, wrong link. Here's the right one: https://chromeperf.appspot.com/report?sid=fd3bfa4c0ff033c9fae08631292e2bd681c3812b1412f4f2f412d51b8ef0d677 Filling an issue: https://bugs.chromium.org/p/v8/issues/detail?id=5555
4 years, 2 months ago
(2016-10-24 03:49:43 UTC)
#46
Description was changed from ========== [wasm] Trim graph before scheduling. The scheduler expects a trimmed ...
4 years, 1 month ago
(2016-11-17 22:07:01 UTC)
#47
Message was sent while issue was closed.
Description was changed from
==========
[wasm] Trim graph before scheduling.
The scheduler expects a trimmed graph, so we have to trim the graph
before scheduling.
R=titzer@chromium.org, bmeurer@chromium.org
TEST=cctest/test-run-wasm/RunWasmCompiled_GraphTrimming
==========
to
==========
[wasm] Trim graph before scheduling.
The scheduler expects a trimmed graph, so we have to trim the graph
before scheduling.
R=titzer@chromium.org, bmeurer@chromium.org
TEST=cctest/test-run-wasm/RunWasmCompiled_GraphTrimming
Committed: https://crrev.com/990236825974e683640f9ca56ddd53e3e831a278
Cr-Commit-Position: refs/heads/master@{#40446}
==========
commit-bot: I haz the power
Patchset 7 (id:??) landed as https://crrev.com/990236825974e683640f9ca56ddd53e3e831a278 Cr-Commit-Position: refs/heads/master@{#40446}
4 years, 1 month ago
(2016-11-17 22:07:02 UTC)
#48
Issue 2428443002: [wasm] Trim graph before scheduling.
(Closed)
Created 4 years, 2 months ago by ahaas
Modified 4 years, 1 month ago
Reviewers: Benedikt Meurer, titzer, bradn
Base URL:
Comments: 12