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Side by Side Diff: src/compiler/mips/code-generator-mips.cc

Issue 2428443002: [wasm] Trim graph before scheduling. (Closed)
Patch Set: Use proper temp registers if Projection(1) does not exist. Created 4 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 #include "src/compilation-info.h" 6 #include "src/compilation-info.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
(...skipping 958 matching lines...) Expand 10 before | Expand all | Expand 10 after
969 break; 969 break;
970 case kMipsSar: 970 case kMipsSar:
971 if (instr->InputAt(1)->IsRegister()) { 971 if (instr->InputAt(1)->IsRegister()) {
972 __ srav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); 972 __ srav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
973 } else { 973 } else {
974 int32_t imm = i.InputOperand(1).immediate(); 974 int32_t imm = i.InputOperand(1).immediate();
975 __ sra(i.OutputRegister(), i.InputRegister(0), imm); 975 __ sra(i.OutputRegister(), i.InputRegister(0), imm);
976 } 976 }
977 break; 977 break;
978 case kMipsShlPair: { 978 case kMipsShlPair: {
979 Register second_output =
980 instr->OutputCount() >= 2 ? i.OutputRegister(1) : i.TempRegister(0);
979 if (instr->InputAt(2)->IsRegister()) { 981 if (instr->InputAt(2)->IsRegister()) {
980 __ ShlPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0), 982 __ ShlPair(i.OutputRegister(0), second_output, i.InputRegister(0),
981 i.InputRegister(1), i.InputRegister(2)); 983 i.InputRegister(1), i.InputRegister(2));
982 } else { 984 } else {
983 uint32_t imm = i.InputOperand(2).immediate(); 985 uint32_t imm = i.InputOperand(2).immediate();
984 __ ShlPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0), 986 __ ShlPair(i.OutputRegister(0), second_output, i.InputRegister(0),
985 i.InputRegister(1), imm); 987 i.InputRegister(1), imm);
986 } 988 }
987 } break; 989 } break;
988 case kMipsShrPair: { 990 case kMipsShrPair: {
991 Register second_output =
992 instr->OutputCount() >= 2 ? i.OutputRegister(1) : i.TempRegister(0);
989 if (instr->InputAt(2)->IsRegister()) { 993 if (instr->InputAt(2)->IsRegister()) {
990 __ ShrPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0), 994 __ ShrPair(i.OutputRegister(0), second_output, i.InputRegister(0),
991 i.InputRegister(1), i.InputRegister(2)); 995 i.InputRegister(1), i.InputRegister(2));
992 } else { 996 } else {
993 uint32_t imm = i.InputOperand(2).immediate(); 997 uint32_t imm = i.InputOperand(2).immediate();
994 __ ShrPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0), 998 __ ShrPair(i.OutputRegister(0), second_output, i.InputRegister(0),
995 i.InputRegister(1), imm); 999 i.InputRegister(1), imm);
996 } 1000 }
997 } break; 1001 } break;
998 case kMipsSarPair: { 1002 case kMipsSarPair: {
1003 Register second_output =
1004 instr->OutputCount() >= 2 ? i.OutputRegister(1) : i.TempRegister(0);
999 if (instr->InputAt(2)->IsRegister()) { 1005 if (instr->InputAt(2)->IsRegister()) {
1000 __ SarPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0), 1006 __ SarPair(i.OutputRegister(0), second_output, i.InputRegister(0),
1001 i.InputRegister(1), i.InputRegister(2)); 1007 i.InputRegister(1), i.InputRegister(2));
1002 } else { 1008 } else {
1003 uint32_t imm = i.InputOperand(2).immediate(); 1009 uint32_t imm = i.InputOperand(2).immediate();
1004 __ SarPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0), 1010 __ SarPair(i.OutputRegister(0), second_output, i.InputRegister(0),
1005 i.InputRegister(1), imm); 1011 i.InputRegister(1), imm);
1006 } 1012 }
1007 } break; 1013 } break;
1008 case kMipsExt: 1014 case kMipsExt:
1009 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), 1015 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
1010 i.InputInt8(2)); 1016 i.InputInt8(2));
1011 break; 1017 break;
1012 case kMipsIns: 1018 case kMipsIns:
1013 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) { 1019 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) {
1014 __ Ins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2)); 1020 __ Ins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2));
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2249 padding_size -= v8::internal::Assembler::kInstrSize; 2255 padding_size -= v8::internal::Assembler::kInstrSize;
2250 } 2256 }
2251 } 2257 }
2252 } 2258 }
2253 2259
2254 #undef __ 2260 #undef __
2255 2261
2256 } // namespace compiler 2262 } // namespace compiler
2257 } // namespace internal 2263 } // namespace internal
2258 } // namespace v8 2264 } // namespace v8
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