Index: src/x64/disasm-x64.cc |
diff --git a/src/x64/disasm-x64.cc b/src/x64/disasm-x64.cc |
index adeda0bb08b293378791710509874694bdf3633f..7ed81b47e147ac41262deea98f62646ffb0b218b 100644 |
--- a/src/x64/disasm-x64.cc |
+++ b/src/x64/disasm-x64.cc |
@@ -315,7 +315,8 @@ class DisassemblerX64 { |
rex_(0), |
operand_size_(0), |
group_1_prefix_(0), |
- byte_size_operand_(false) { |
+ byte_size_operand_(false), |
+ instruction_table_(instruction_table.Pointer()) { |
tmp_buffer_[0] = '\0'; |
} |
@@ -344,6 +345,7 @@ class DisassemblerX64 { |
byte group_1_prefix_; // 0xF2, 0xF3, or (if no group 1 prefix is present) 0. |
// Byte size operand override. |
bool byte_size_operand_; |
+ const InstructionTable* const instruction_table_; |
void setRex(byte rex) { |
ASSERT_EQ(0x40, rex & 0xF0); |
@@ -1340,7 +1342,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, |
data++; |
} |
- const InstructionDesc& idesc = instruction_table.Get().Get(current); |
+ const InstructionDesc& idesc = instruction_table_->Get(current); |
byte_size_operand_ = idesc.byte_size_operation; |
switch (idesc.type) { |
case ZERO_OPERANDS_INSTR: |