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1 # Copyright 2015 The Chromium Authors. All rights reserved. | 1 # Copyright 2015 The Chromium Authors. All rights reserved. |
2 # Use of this source code is governed by a BSD-style license that can be | 2 # Use of this source code is governed by a BSD-style license that can be |
3 # found in the LICENSE file. | 3 # found in the LICENSE file. |
4 | 4 |
5 import("//build/config/v8_target_cpu.gni") | 5 import("//build/config/v8_target_cpu.gni") |
6 | 6 |
7 # These are primarily relevant in current_cpu == "mips*" contexts, where | 7 # These are primarily relevant in current_cpu == "mips*" contexts, where |
8 # MIPS code is being compiled. But they can also be relevant in the | 8 # MIPS code is being compiled. But they can also be relevant in the |
9 # other contexts when the code will change its behavior based on the | 9 # other contexts when the code will change its behavior based on the |
10 # cpu it wants to generate code for. | 10 # cpu it wants to generate code for. |
11 if (current_cpu == "mipsel" || v8_current_cpu == "mipsel") { | 11 if (current_cpu == "mipsel" || v8_current_cpu == "mipsel" || |
| 12 current_cpu == "mips" || v8_current_cpu == "mips") { |
12 declare_args() { | 13 declare_args() { |
13 # MIPS arch variant. Possible values are: | 14 # MIPS arch variant. Possible values are: |
14 # "r1" | 15 # "r1" |
15 # "r2" | 16 # "r2" |
16 # "r6" | 17 # "r6" |
17 mips_arch_variant = "r1" | 18 mips_arch_variant = "r1" |
18 | 19 |
19 # MIPS DSP ASE revision. Possible values are: | 20 # MIPS DSP ASE revision. Possible values are: |
20 # 0: unavailable | 21 # 0: unavailable |
21 # 1: revision 1 | 22 # 1: revision 1 |
22 # 2: revision 2 | 23 # 2: revision 2 |
23 mips_dsp_rev = 0 | 24 mips_dsp_rev = 0 |
24 | 25 |
25 # MIPS SIMD Arch compilation flag. | 26 # MIPS SIMD Arch compilation flag. |
26 mips_use_msa = false | 27 mips_use_msa = false |
27 | 28 |
28 # MIPS floating-point ABI. Possible values are: | 29 # MIPS floating-point ABI. Possible values are: |
29 # "hard": sets the GCC -mhard-float option. | 30 # "hard": sets the GCC -mhard-float option. |
30 # "soft": sets the GCC -msoft-float option. | 31 # "soft": sets the GCC -msoft-float option. |
31 mips_float_abi = "hard" | 32 mips_float_abi = "hard" |
32 | 33 |
33 # MIPS32 floating-point register width. Possible values are: | 34 # MIPS32 floating-point register width. Possible values are: |
34 # "fp32": sets the GCC -mfp32 option. | 35 # "fp32": sets the GCC -mfp32 option. |
35 # "fp64": sets the GCC -mfp64 option. | 36 # "fp64": sets the GCC -mfp64 option. |
36 # "fpxx": sets the GCC -mfpxx option. | 37 # "fpxx": sets the GCC -mfpxx option. |
37 mips_fpu_mode = "fp32" | 38 mips_fpu_mode = "fp32" |
38 } | 39 } |
39 } else if (current_cpu == "mips64el" || v8_current_cpu == "mips64el") { | 40 } else if (current_cpu == "mips64el" || v8_current_cpu == "mips64el" || |
| 41 current_cpu == "mips64" || v8_current_cpu == "mips64") { |
40 # MIPS arch variant. Possible values are: | 42 # MIPS arch variant. Possible values are: |
41 # "r2" | 43 # "r2" |
42 # "r6" | 44 # "r6" |
43 if (current_os == "android" || target_os == "android") { | 45 if (current_os == "android" || target_os == "android") { |
44 declare_args() { | 46 declare_args() { |
45 mips_arch_variant = "r6" | 47 mips_arch_variant = "r6" |
46 | 48 |
47 # MIPS SIMD Arch compilation flag. | 49 # MIPS SIMD Arch compilation flag. |
48 mips_use_msa = true | 50 mips_use_msa = true |
49 } | 51 } |
50 } else { | 52 } else { |
51 declare_args() { | 53 declare_args() { |
52 mips_arch_variant = "r2" | 54 mips_arch_variant = "r2" |
53 | 55 |
54 # MIPS SIMD Arch compilation flag. | 56 # MIPS SIMD Arch compilation flag. |
55 mips_use_msa = false | 57 mips_use_msa = false |
56 } | 58 } |
57 } | 59 } |
58 } | 60 } |
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