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Unified Diff: tests_lit/assembler/arm32/add.ll

Issue 1411873002: emit add/sub registers instructions in integrated ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 5 years, 2 months ago
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Index: tests_lit/assembler/arm32/add.ll
diff --git a/tests_lit/assembler/arm32/add.ll b/tests_lit/assembler/arm32/add.ll
index c6b7d28eeaec51ef85c1bf3b21155dd6921a6095..06a0921f3a5cb3aac443a66c445fbebd748b712a 100644
--- a/tests_lit/assembler/arm32/add.ll
+++ b/tests_lit/assembler/arm32/add.ll
@@ -1,5 +1,4 @@
; Show that we know how to translate add.
-; TODO(kschimpf) Currently only know how to test add 1 to R0.
; NOTE: We use -O2 to get rid of memory stores.
Jim Stichnoth 2015/10/16 21:30:09 ; REQUIRES: allow_dump
Karl 2015/10/17 20:00:41 Done.
@@ -14,8 +13,8 @@ define internal i32 @add1ToR0(i32 %p) {
}
; ASM-LABEL: add1ToR0:
-; ASM: add r0, r0, #1
-; ASM: bx lr
+; ASM: add r0, r0, #1
+; ASM-NEXT: bx lr
; IASM-LABEL: add1ToR0:
; IASM: .byte 0x1
@@ -23,3 +22,18 @@ define internal i32 @add1ToR0(i32 %p) {
; IASM-NEXT: .byte 0x80
; IASM-NEXT: .byte 0xe2
+define internal i32 @Add2Regs(i32 %p1, i32 %p2) {
+ %v = add i32 %p1, %p2
+ ret i32 %v
+}
+
+; ASM-LABEL: Add2Regs:
+; ASM: add r0, r0, r1
+; ASM-NEXT: bx lr
+
+; IASM-LABEL: Add2Regs:
+
+; IASM: .byte 0x1
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x80
+; IASM-NEXT: .byte 0xe0

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