Add instruction 'adc (register)' to ARM integrated assembler.

tests_lit/assembler/arm32/add.ll

Index: tests_lit/assembler/arm32/add.ll
diff --git a/tests_lit/assembler/arm32/add.ll b/tests_lit/assembler/arm32/add.ll
index 420c696436f91455906e800d419daebaac3b9b1b..b5e8b37792fa3485f738f498659a2d4c406fee36 100644
--- a/tests_lit/assembler/arm32/add.ll
+++ b/tests_lit/assembler/arm32/add.ll
@@ -96,3 +96,28 @@ define internal i64 @addI64ToR0R1(i64 %p) {
 ; IASM-NEXT:    .byte 0x10
 ; IASM-NEXT:    .byte 0xa1
 ; IASM-NEXT:    .byte 0xe2
+
+define internal i64 @AddI64Regs(i64 %p1, i64 %p2) {
+  %v = add i64 %p1, %p2
+  ret i64 %v
+}
+
+; ASM-LABEL:AddI64Regs:
+; ASM-NEXT:.LAddI64Regs$__0:
+; ASM-NEXT:     adds    r0, r0, r2
+; ASM-NEXT:     adc     r1, r1, r3
+
+; DIS-LABEL:00000030 <AddI64Regs>:
+; DIS-NEXT:  30:	e0900002
+; DIS-NEXT:  34:	e0a11003
+
+; IASM-LABEL:AddI64Regs:
+; IASM-NEXT:.LAddI64Regs$__0:
+; IASM-NEXT:    .byte 0x2
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x90
+; IASM-NEXT:    .byte 0xe0
+; IASM-NEXT:    .byte 0x3
+; IASM-NEXT:    .byte 0x10
+; IASM-NEXT:    .byte 0xa1
+; IASM-NEXT:    .byte 0xe0