Add MOV (register) to ARM integrated assembler.

src/IceAssemblerARM32.cpp

Index: src/IceAssemblerARM32.cpp
diff --git a/src/IceAssemblerARM32.cpp b/src/IceAssemblerARM32.cpp
index eb10ab76b2588ebd3e10029e2fbc21af22484035..57a347bc4dcf68f7edfa1a91bf3b90ba9e8e820b 100644
--- a/src/IceAssemblerARM32.cpp
+++ b/src/IceAssemblerARM32.cpp
@@ -625,20 +625,38 @@ void AssemblerARM32::mov(const Operand *OpRd, const Operand *OpSrc,
     return setNeedsTextFixup();
   IValueT Src;
   // TODO(kschimpf) Handle other forms of mov.
-  if (decodeOperand(OpSrc, Src) != DecodedAsRotatedImm8)
-    return setNeedsTextFixup();
-  // MOV (immediate) - ARM section A8.8.102, encoding A1:
-  //   mov{S}<c> <Rd>, #<RotatedImm8>
-  //
-  // cccc0011101s0000ddddiiiiiiiiiiii where cccc=Cond, s=SetFlags, dddd=Rd, and
-  // iiiiiiiiiiii=RotatedImm8=Src.  Note: We don't use movs in this assembler.
   constexpr bool SetFlags = false;
-  if ((Rd == RegARM32::Encoded_Reg_pc && SetFlags))
-    // Conditions of rule violated.
-    return setNeedsTextFixup();
   constexpr IValueT Rn = 0;
   constexpr IValueT Mov = B3 | B2 | B0; // 1101.
-  emitType01(Cond, kInstTypeDataImmediate, Mov, SetFlags, Rn, Rd, Src);
+  switch (decodeOperand(OpSrc, Src)) {
+  default:

[Jim Stichnoth, 2015/10/30 21:47:02]

Do you mean for the default case to fallthrough?

[Karl, 2015/10/30 22:15:31]

Hmm, must be inhaling too many fumes. Fixing to require text fixup.

+  case DecodedAsRegister: {
+    // MOV (register) - ARM section A8.8.104, encoding A1:
+    //   mov{S}<c> <Rd>, <Rn>
+    //
+    // cccc0001101s0000dddd00000000mmmm where cccc=Cond, s=SetFlags, dddd=Rd,
+    // and nnnn=Rn.
+    return setNeedsTextFixup();

[Jim Stichnoth, 2015/10/30 21:47:02]

The code below this is unreachable...

[Karl, 2015/10/30 22:15:31]

Apparently here is where I misplaced the default code. Removing.

+    if ((Rd == RegARM32::Encoded_Reg_pc && SetFlags))
+      // Conditions of rule violated.
+      return setNeedsTextFixup();
+    emitType01(Cond, kInstTypeDataRegister, Mov, SetFlags, Rn, Rd, Src);
+    return;
+  }
+  case DecodedAsRotatedImm8: {
+    // MOV (immediate) - ARM section A8.8.102, encoding A1:
+    //   mov{S}<c> <Rd>, #<RotatedImm8>
+    //
+    // cccc0011101s0000ddddiiiiiiiiiiii where cccc=Cond, s=SetFlags, dddd=Rd,
+    // and iiiiiiiiiiii=RotatedImm8=Src.  Note: We don't use movs in this
+    // assembler.
+    if ((Rd == RegARM32::Encoded_Reg_pc && SetFlags))
+      // Conditions of rule violated.
+      return setNeedsTextFixup();
+    emitType01(Cond, kInstTypeDataImmediate, Mov, SetFlags, Rn, Rd, Src);
+    return;
+  }
+  }
 }
 
 void AssemblerARM32::movw(const Operand *OpRd, const Operand *OpSrc,