Index: src/IceAssemblerARM32.h |
diff --git a/src/IceAssemblerARM32.h b/src/IceAssemblerARM32.h |
index 2b6bbb11d9e9ac48ce1498c258510419e1c9d5c2..6c94b5ad17ab7fcf0eee2722f139e60edeeee349 100644 |
--- a/src/IceAssemblerARM32.h |
+++ b/src/IceAssemblerARM32.h |
@@ -18,6 +18,10 @@ |
/// \file |
/// This file implements the Assembler class for ARM32. |
/// |
+/// Note: All references to ARM "section" documentation refers to the "ARM |
+/// Architecture Reference Manual, ARMv7-A and ARMv7-R edition". See: |
+/// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406c |
+/// |
//===----------------------------------------------------------------------===// |
#ifndef SUBZERO_SRC_ICEASSEMBLERARM32_H |
@@ -27,6 +31,7 @@ |
#include "IceConditionCodesARM32.h" |
#include "IceDefs.h" |
#include "IceFixups.h" |
+#include "IceInstARM32.h" |
#include "IceRegistersARM32.h" |
#include "IceTargetLowering.h" |
@@ -74,8 +79,8 @@ public: |
} |
Ice::Label *getCfgNodeLabel(SizeT NodeNumber) override { |
- (void)NodeNumber; |
- llvm_unreachable("Not yet implemented."); |
+ assert(NodeNumber < CfgNodeLabels.size()); |
+ return CfgNodeLabels[NodeNumber]; |
} |
void bindCfgNodeLabel(SizeT NodeNumber) override { |
@@ -90,9 +95,12 @@ public: |
} |
void bind(Label *label); |
- void bkpt(uint16_t imm16); |
+ void bkpt(uint16_t Imm16); |
- void bx(RegARM32::GPRRegister rm, CondARM32::Cond cond = CondARM32::AL); |
+ void mov(RegARM32::GPRRegister Rd, const OperandARM32FlexImm &FlexImm, |
+ CondARM32::Cond Cond); |
+ |
+ void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL); |
static bool classof(const Assembler *Asm) { |
return Asm->getKind() == Asm_ARM32; |
@@ -152,9 +160,7 @@ private: |
static constexpr uint32_t B27 = 1 << 27; |
// Constants used for the decoding or encoding of the individual fields of |
- // instructions. Based on section A5.1 from the "ARM Architecture Reference |
- // Manual, ARMv7-A and ARMv7-R edition". See: |
- // http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406c |
+ // instructions. Based on ARM section A5.1. |
static constexpr uint32_t kConditionShift = 28; |
static constexpr uint32_t kConditionBits = 4; |
static constexpr uint32_t kTypeShift = 25; |
@@ -227,8 +233,39 @@ private: |
static constexpr uint32_t kOpc1Shift = 21; |
static constexpr uint32_t kOpc1Bits = 3; |
+ // Types of instructions. |
+ static constexpr uint32_t kInstTypeReg = 0; |
+ static constexpr uint32_t kInstTypeImmediate = 1; |
+ |
static constexpr uint32_t kBranchOffsetMask = 0x00ffffff; |
+ // Converts from bool to bit. |
John
2015/10/12 20:45:27
optional: All of these helpers are part of the ass
Karl
2015/10/12 21:24:56
Done.
|
+ static uint32_t encodeBool(bool b) { return b ? 1 : 0; } |
+ |
+ // Converts rotated immediate into imm12. |
+ static uint32_t encodeImm12FromFlexImm(const OperandARM32FlexImm &FlexImm) { |
+ uint32_t Immed8 = FlexImm.getImm(); |
+ uint32_t Rotate = FlexImm.getRotateAmt(); |
+ assert((Rotate < (1 << kRotateBits)) && (Immed8 < (1 << kImmed8Bits))); |
+ return (Rotate << kRotateShift) | (Immed8 << kImmed8Shift); |
+ } |
+ |
+ static bool isGPRRegisterDefined(uint32_t R) { |
+ return R != encodeGPRRegister(RegARM32::Encoded_Not_GPR); |
+ } |
+ |
+ static uint32_t encodeGPRRegister(RegARM32::GPRRegister Rn) { |
+ return static_cast<uint32_t>(Rn); |
+ } |
+ |
+ static bool isConditionDefined(CondARM32::Cond Cond) { |
+ return Cond != CondARM32::kNone; |
+ } |
+ |
+ static uint32_t encodeCondition(CondARM32::Cond Cond) { |
+ return static_cast<uint32_t>(Cond); |
+ } |
+ |
// A vector of pool-allocated x86 labels for CFG nodes. |
using LabelVector = std::vector<Label *>; |
LabelVector CfgNodeLabels; |
@@ -238,7 +275,12 @@ private: |
return getOrCreateLabel(NodeNumber, CfgNodeLabels); |
} |
- void emitInt32(int32_t Value) { Buffer.emit<int32_t>(Value); } |
+ void emitInt32(uint32_t Value) { Buffer.emit<uint32_t>(Value); } |
+ |
+ // Pattern cccctttoooosnnnnddddiiiiiiiiiiii where cccc=Cond, ttt=Type, |
+ // oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM section A5.2.3). |
+ void emitType01(CondARM32::Cond Cond, uint32_t Type, uint32_t Opcode, |
+ bool SetCc, uint32_t Rn, uint32_t Rd, uint32_t imm12); |
static int32_t BkptEncoding(uint16_t imm16) { |
// bkpt requires that the cond field is AL. |