Fix emission of move immediate for ARM integrated assembler.

src/IceAssemblerARM32.cpp

Index: src/IceAssemblerARM32.cpp
diff --git a/src/IceAssemblerARM32.cpp b/src/IceAssemblerARM32.cpp
index ab22450f04ba482c6e3ffa71b8c4a647c93dbb43..8738e23a6d43598f33290ba9541d2883ae4f70dc 100644
--- a/src/IceAssemblerARM32.cpp
+++ b/src/IceAssemblerARM32.cpp
@@ -56,20 +56,45 @@ void ARM32::AssemblerARM32::bind(Label *label) {
   label->bindTo(bound);
 }
 
+void ARM32::AssemblerARM32::emitType01(CondARM32::Cond Cond, uint32_t Type,
+                                       uint32_t Opcode, bool SetCc, uint32_t Rn,
+                                       uint32_t Rd, uint32_t Imm12) {
+  assert(isGPRRegisterDefined(Rd));
+  assert(Cond != CondARM32::kNone);
+  uint32_t Encoding = encodeCondition(Cond) << kConditionShift |
+                      (Type << kTypeShift) | (Opcode << kOpcodeShift) |
+                      (encodeBool(SetCc) << kSShift) | (Rn << kRnShift) |
+                      (Rd << kRdShift) | Imm12;
+  emitInt32(Encoding);
+}
+
 void ARM32::AssemblerARM32::bkpt(uint16_t imm16) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitInt32(BkptEncoding(imm16));
 }
 
-void ARM32::AssemblerARM32::bx(RegARM32::GPRRegister rm, CondARM32::Cond cond) {
+void ARM32::AssemblerARM32::bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond) {
   // cccc000100101111111111110001mmmm where mmmm=rm and cccc=Cond.
-  assert(rm != RegARM32::Encoded_Not_GPR);
-  assert(cond != CondARM32::kNone);
+  // (ARM cection A8.8.27, encoding A1).
+  assert(isGPRRegisterDefined(Rm));
+  assert(isConditionDefined(Cond));
+  AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  uint32_t Encoding = (encodeCondition(Cond) << kConditionShift) | B24 | B21 |
+                      (0xfff << 8) | B4 | (encodeGPRRegister(Rm) << kRmShift);
+  emitInt32(Encoding);
+}
+
+void ARM32::AssemblerARM32::mov(RegARM32::GPRRegister Rd,
+                                const OperandARM32FlexImm &FlexImm,
+                                CondARM32::Cond Cond) {
+  // cccc0011101s0000ddddiiiiiiiiiiii (ARM section A8.8.102, encoding A1)
+  assert(isConditionDefined(Cond));
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
-  int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | B24 |
-                     B21 | (0xfff << 8) | B4 |
-                     (static_cast<int32_t>(rm) << kRmShift);
-  emitInt32(encoding);
+  bool SetCc = false;  // Note: We don't use movs in this assembler.
+  uint32_t Rn = 0;
+  uint32_t Mov = B3 | B2 | B0; // 1101.
+  emitType01(Cond, kInstTypeImmediate, Mov, SetCc, Rn, encodeGPRRegister(Rd),
+             encodeImm12FromFlexImm(FlexImm));
 }
 
 } // end of namespace Ice