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Side by Side Diff: tests/validator/rewrite_nontemporals.c

Issue 1309953002: x86 validator: Rewrite non-temporal stores into cached memory accesses (Closed) Base URL: https://chromium.googlesource.com/native_client/src/native_client.git@master
Patch Set: Review nit Created 4 years, 10 months ago
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1 /*
2 * Copyright 2016 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
7 #include <string.h>
8
9 #include "native_client/src/include/nacl_assert.h"
10
11 char g_src[16];
12 char g_dest[16];
13
14 void reset_test_vars(void) {
15 memset(g_src, 0xff, sizeof(g_src));
16 memset(g_dest, 0, sizeof(g_dest));
17 }
18
19 #if defined(__x86_64__)
20 # define MEM_SUFFIX "(%%r15)"
21 #else
22 # define MEM_SUFFIX
23 #endif
24
25 /*
26 * This test checks that non-temporal store instructions still have the
27 * same effect after being rewritten to normal store instructions.
28 */
29
30 int main(void) {
31 /* Test movntdq. */
32 reset_test_vars();
33 asm("movdqa g_src " MEM_SUFFIX ", %%xmm0\n"
34 "movntdq %%xmm0, g_dest " MEM_SUFFIX "\n" : : : "xmm0");
35 ASSERT_EQ(memcmp(g_dest, g_src, 16), 0);
36
37 #if defined(__i386__)
38 /* Test movntq. */
39 reset_test_vars();
40 asm("movq g_src, %%mm0\n"
41 "movntq %%mm0, g_dest\n" : : : "mm0");
42 ASSERT_EQ(memcmp(g_dest, g_src, 8), 0);
43 #endif
44
45 #if defined(__x86_64__)
46 /* Test movntps. */
47 reset_test_vars();
48 asm("movdqa g_src(%%r15), %%xmm0\n"
49 "movntps %%xmm0, g_dest(%%r15)\n" : : : "xmm0");
50 ASSERT_EQ(memcmp(g_dest, g_src, 16), 0);
51
52 /* Test movnti, using 32-bit operand. */
53 reset_test_vars();
54 asm("mov g_src(%%r15), %%eax\n"
55 "movnti %%eax, g_dest(%%r15)\n" : : : "eax");
56 ASSERT_EQ(memcmp(g_dest, g_src, 4), 0);
57
58 /* Test movnti, using 64-bit operand. */
59 reset_test_vars();
60 asm("mov g_src(%%r15), %%rax\n"
61 "movnti %%rax, g_dest(%%r15)\n" : : : "rax");
62 ASSERT_EQ(memcmp(g_dest, g_src, 8), 0);
63
64 /* Test movnti, using a destination with a restricted register. */
65 reset_test_vars();
66 asm("mov g_src(%%r15), %%rax\n"
67 ".p2align 5\n" /* Ensure following instructions are in the same bundle */
68 "leal g_dest, %%ecx\n"
69 "movnti %%rax, (%%r15, %%rcx)\n" : : : "rax", "rcx");
70 ASSERT_EQ(memcmp(g_dest, g_src, 4), 0);
71
72 /*
73 * Test movnti, using a destination with RIP-relative addressing,
74 * which is sensitive to the address of the instruction.
75 */
76 reset_test_vars();
77 asm("mov g_src(%%r15), %%rax\n"
78 "movnti %%rax, g_dest(%%rip)\n" : : : "rax");
79 ASSERT_EQ(memcmp(g_dest, g_src, 8), 0);
80
81 /* Test prefetchnta. This has no side effects that we can test for. */
82 asm("prefetchnta g_dest(%r15)\n");
83 #endif
84
85 return 0;
86 }
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