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Unified Diff: src/trusted/validator_arm/baseline_classes.h

Issue 11569019: Fix uses in ARM table media_instructions. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/
Patch Set: Created 8 years ago
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Index: src/trusted/validator_arm/baseline_classes.h
===================================================================
--- src/trusted/validator_arm/baseline_classes.h (revision 10465)
+++ src/trusted/validator_arm/baseline_classes.h (working copy)
@@ -441,6 +441,41 @@
NACL_DISALLOW_COPY_AND_ASSIGN(Unary1RegisterImmediateOpPc);
};
+// Models a 1-register unary operation with two immediate 5 values
+// defining a bit range.
+// Op<c> Rd, #lsb, #width
+// +--------+--------------+----------+--------+----------+--------------+
+// |31302928|27262524232221|2019181716|15141312|1110 9 8 7| 6 5 4 3 2 1 0|
+// +--------+--------------+----------+--------+----------+--------------+
+// | cond | | msb | Rd | lsb | |
+// +--------+--------------+----------+--------+----------+--------------+
+// Definitions
+// Rd = The destination register.
+// lsb = The least significant bit to be modified.
+// msb = lsb + width - 1 - The most significant bit to be modified
+// width = msb - lsb + 1 - The number of bits to be modified.
+//
+// If Rd is R15 or msbit < lsbit, the instruction is unpredictable.
+// NaCl disallows writing to PC to cause a jump.
+// Note: Currently, only implements bfc.
+class Unary1RegisterBitRangeMsbGeLsb : public ClassDecoder {
+ public:
+ // Interface for components of the instruction.
+ static const Imm5Bits7To11Interface lsb;
+ static const RegBits12To15Interface d;
+ static const Imm5Bits16To20Interface msb;
+ static const ConditionBits28To31Interface cond;
+
+ // Methods for class.
+ Unary1RegisterBitRangeMsbGeLsb() : ClassDecoder() {}
+ virtual SafetyLevel safety(Instruction i) const;
+ virtual RegisterList defs(Instruction i) const;
+ virtual RegisterList uses(Instruction i) const;
+
+ private:
+ NACL_DISALLOW_COPY_AND_ASSIGN(Unary1RegisterBitRangeMsbGeLsb);
+};
+
// Models a 2-register binary operation with two immediate values
// defining a bit range.
// Op<c> Rd, Rn, #<lsb>, #width
@@ -471,6 +506,7 @@
Binary2RegisterBitRangeMsbGeLsb() {}
virtual SafetyLevel safety(Instruction i) const;
virtual RegisterList defs(Instruction i) const;
+ virtual RegisterList uses(Instruction i) const;
private:
NACL_DISALLOW_COPY_AND_ASSIGN(Binary2RegisterBitRangeMsbGeLsb);
@@ -508,6 +544,7 @@
Binary2RegisterBitRangeNotRnIsPcBitfieldExtract() {}
virtual SafetyLevel safety(Instruction i) const;
virtual RegisterList defs(Instruction i) const;
+ virtual RegisterList uses(Instruction i) const;
private:
NACL_DISALLOW_COPY_AND_ASSIGN(
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