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Issue 10977051: Support for SDIV and MLS ARM instructions, and implement DoModI using them (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 8 years, 2 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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972 __ bind(&positive_dividend); 972 __ bind(&positive_dividend);
973 __ and_(result, dividend, Operand(divisor - 1)); 973 __ and_(result, dividend, Operand(divisor - 1));
974 __ bind(&done); 974 __ bind(&done);
975 return; 975 return;
976 } 976 }
977 977
978 // These registers hold untagged 32 bit values. 978 // These registers hold untagged 32 bit values.
979 Register left = ToRegister(instr->left()); 979 Register left = ToRegister(instr->left());
980 Register right = ToRegister(instr->right()); 980 Register right = ToRegister(instr->right());
981 Register result = ToRegister(instr->result()); 981 Register result = ToRegister(instr->result());
982 Label done;
982 983
983 Register scratch = scratch0(); 984 if (CpuFeatures::IsSupported(SUDIV)) {
984 Register scratch2 = ToRegister(instr->temp()); 985 CpuFeatures::Scope scope(SUDIV);
985 DwVfpRegister dividend = ToDoubleRegister(instr->temp2()); 986 // Check for x % 0.
986 DwVfpRegister divisor = ToDoubleRegister(instr->temp3()); 987 if (instr->hydrogen()->CheckFlag(HValue::kCanBeDivByZero)) {
987 DwVfpRegister quotient = double_scratch0(); 988 __ cmp(right, Operand(0));
989 DeoptimizeIf(eq, instr->environment());
990 }
988 991
989 ASSERT(!dividend.is(divisor)); 992 // For r3 = r1 % r2; we can have the following ARM code
990 ASSERT(!dividend.is(quotient)); 993 // sdiv r3, r1, r2
991 ASSERT(!divisor.is(quotient)); 994 // mls r3, r3, r2, r1
992 ASSERT(!scratch.is(left));
993 ASSERT(!scratch.is(right));
994 ASSERT(!scratch.is(result));
995 995
996 Label done, vfp_modulo, both_positive, right_negative; 996 __ sdiv(result, left, right);
997 __ mls(result, result, right, left);
998 __ cmp(result, Operand(0));
999 __ b(ne, &done);
997 1000
998 // Check for x % 0. 1001 if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
999 if (instr->hydrogen()->CheckFlag(HValue::kCanBeDivByZero)) { 1002 __ cmp(left, Operand(0));
1000 __ cmp(right, Operand(0)); 1003 DeoptimizeIf(lt, instr->environment());
1001 DeoptimizeIf(eq, instr->environment()); 1004 }
1005 } else {
1006 Register scratch = scratch0();
1007 Register scratch2 = ToRegister(instr->temp());
1008 DwVfpRegister dividend = ToDoubleRegister(instr->temp2());
1009 DwVfpRegister divisor = ToDoubleRegister(instr->temp3());
1010 DwVfpRegister quotient = double_scratch0();
1011
1012 ASSERT(!dividend.is(divisor));
1013 ASSERT(!dividend.is(quotient));
1014 ASSERT(!divisor.is(quotient));
1015 ASSERT(!scratch.is(left));
1016 ASSERT(!scratch.is(right));
1017 ASSERT(!scratch.is(result));
1018
1019 Label done, vfp_modulo, both_positive, right_negative;
1020
1021 // Check for x % 0.
1022 if (instr->hydrogen()->CheckFlag(HValue::kCanBeDivByZero)) {
1023 __ cmp(right, Operand(0));
1024 DeoptimizeIf(eq, instr->environment());
1025 }
1026
1027 __ Move(result, left);
1028
1029 // (0 % x) must yield 0 (if x is finite, which is the case here).
1030 __ cmp(left, Operand(0));
1031 __ b(eq, &done);
1032 // Preload right in a vfp register.
1033 __ vmov(divisor.low(), right);
1034 __ b(lt, &vfp_modulo);
1035
1036 __ cmp(left, Operand(right));
1037 __ b(lt, &done);
1038
1039 // Check for (positive) power of two on the right hand side.
1040 __ JumpIfNotPowerOfTwoOrZeroAndNeg(right,
1041 scratch,
1042 &right_negative,
1043 &both_positive);
1044 // Perform modulo operation (scratch contains right - 1).
1045 __ and_(result, scratch, Operand(left));
1046 __ b(&done);
1047
1048 __ bind(&right_negative);
1049 // Negate right. The sign of the divisor does not matter.
1050 __ rsb(right, right, Operand(0));
1051
1052 __ bind(&both_positive);
1053 const int kUnfolds = 3;
1054 // If the right hand side is smaller than the (nonnegative)
1055 // left hand side, the left hand side is the result.
1056 // Else try a few subtractions of the left hand side.
1057 __ mov(scratch, left);
1058 for (int i = 0; i < kUnfolds; i++) {
1059 // Check if the left hand side is less or equal than the
1060 // the right hand side.
1061 __ cmp(scratch, Operand(right));
1062 __ mov(result, scratch, LeaveCC, lt);
1063 __ b(lt, &done);
1064 // If not, reduce the left hand side by the right hand
1065 // side and check again.
1066 if (i < kUnfolds - 1) __ sub(scratch, scratch, right);
1067 }
1068
1069 __ bind(&vfp_modulo);
1070 // Load the arguments in VFP registers.
1071 // The divisor value is preloaded before. Be careful that 'right'
1072 // is only live on entry.
1073 __ vmov(dividend.low(), left);
1074 // From here on don't use right as it may have been reallocated
1075 // (for example to scratch2).
1076 right = no_reg;
1077
1078 __ vcvt_f64_s32(dividend, dividend.low());
1079 __ vcvt_f64_s32(divisor, divisor.low());
1080
1081 // We do not care about the sign of the divisor.
1082 __ vabs(divisor, divisor);
1083 // Compute the quotient and round it to a 32bit integer.
1084 __ vdiv(quotient, dividend, divisor);
1085 __ vcvt_s32_f64(quotient.low(), quotient);
1086 __ vcvt_f64_s32(quotient, quotient.low());
1087
1088 // Compute the remainder in result.
1089 DwVfpRegister double_scratch = dividend;
1090 __ vmul(double_scratch, divisor, quotient);
1091 __ vcvt_s32_f64(double_scratch.low(), double_scratch);
1092 __ vmov(scratch, double_scratch.low());
1093
1094 if (!instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
1095 __ sub(result, left, scratch);
1096 } else {
1097 Label ok;
1098 // Check for -0.
1099 __ sub(scratch2, left, scratch, SetCC);
1100 __ b(ne, &ok);
1101 __ cmp(left, Operand(0));
1102 DeoptimizeIf(mi, instr->environment());
1103 __ bind(&ok);
1104 // Load the result and we are done.
1105 __ mov(result, scratch2);
1106 }
1002 } 1107 }
1003
1004 __ Move(result, left);
1005
1006 // (0 % x) must yield 0 (if x is finite, which is the case here).
1007 __ cmp(left, Operand(0));
1008 __ b(eq, &done);
1009 // Preload right in a vfp register.
1010 __ vmov(divisor.low(), right);
1011 __ b(lt, &vfp_modulo);
1012
1013 __ cmp(left, Operand(right));
1014 __ b(lt, &done);
1015
1016 // Check for (positive) power of two on the right hand side.
1017 __ JumpIfNotPowerOfTwoOrZeroAndNeg(right,
1018 scratch,
1019 &right_negative,
1020 &both_positive);
1021 // Perform modulo operation (scratch contains right - 1).
1022 __ and_(result, scratch, Operand(left));
1023 __ b(&done);
1024
1025 __ bind(&right_negative);
1026 // Negate right. The sign of the divisor does not matter.
1027 __ rsb(right, right, Operand(0));
1028
1029 __ bind(&both_positive);
1030 const int kUnfolds = 3;
1031 // If the right hand side is smaller than the (nonnegative)
1032 // left hand side, the left hand side is the result.
1033 // Else try a few subtractions of the left hand side.
1034 __ mov(scratch, left);
1035 for (int i = 0; i < kUnfolds; i++) {
1036 // Check if the left hand side is less or equal than the
1037 // the right hand side.
1038 __ cmp(scratch, Operand(right));
1039 __ mov(result, scratch, LeaveCC, lt);
1040 __ b(lt, &done);
1041 // If not, reduce the left hand side by the right hand
1042 // side and check again.
1043 if (i < kUnfolds - 1) __ sub(scratch, scratch, right);
1044 }
1045
1046 __ bind(&vfp_modulo);
1047 // Load the arguments in VFP registers.
1048 // The divisor value is preloaded before. Be careful that 'right' is only live
1049 // on entry.
1050 __ vmov(dividend.low(), left);
1051 // From here on don't use right as it may have been reallocated (for example
1052 // to scratch2).
1053 right = no_reg;
1054
1055 __ vcvt_f64_s32(dividend, dividend.low());
1056 __ vcvt_f64_s32(divisor, divisor.low());
1057
1058 // We do not care about the sign of the divisor.
1059 __ vabs(divisor, divisor);
1060 // Compute the quotient and round it to a 32bit integer.
1061 __ vdiv(quotient, dividend, divisor);
1062 __ vcvt_s32_f64(quotient.low(), quotient);
1063 __ vcvt_f64_s32(quotient, quotient.low());
1064
1065 // Compute the remainder in result.
1066 DwVfpRegister double_scratch = dividend;
1067 __ vmul(double_scratch, divisor, quotient);
1068 __ vcvt_s32_f64(double_scratch.low(), double_scratch);
1069 __ vmov(scratch, double_scratch.low());
1070
1071 if (!instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
1072 __ sub(result, left, scratch);
1073 } else {
1074 Label ok;
1075 // Check for -0.
1076 __ sub(scratch2, left, scratch, SetCC);
1077 __ b(ne, &ok);
1078 __ cmp(left, Operand(0));
1079 DeoptimizeIf(mi, instr->environment());
1080 __ bind(&ok);
1081 // Load the result and we are done.
1082 __ mov(result, scratch2);
1083 }
1084
1085 __ bind(&done); 1108 __ bind(&done);
1086 } 1109 }
1087 1110
1088 1111
1089 void LCodeGen::EmitSignedIntegerDivisionByConstant( 1112 void LCodeGen::EmitSignedIntegerDivisionByConstant(
1090 Register result, 1113 Register result,
1091 Register dividend, 1114 Register dividend,
1092 int32_t divisor, 1115 int32_t divisor,
1093 Register remainder, 1116 Register remainder,
1094 Register scratch, 1117 Register scratch,
(...skipping 4565 matching lines...) Expand 10 before | Expand all | Expand 10 after
5660 __ sub(scratch, result, Operand(index, LSL, kPointerSizeLog2 - kSmiTagSize)); 5683 __ sub(scratch, result, Operand(index, LSL, kPointerSizeLog2 - kSmiTagSize));
5661 __ ldr(result, FieldMemOperand(scratch, 5684 __ ldr(result, FieldMemOperand(scratch,
5662 FixedArray::kHeaderSize - kPointerSize)); 5685 FixedArray::kHeaderSize - kPointerSize));
5663 __ bind(&done); 5686 __ bind(&done);
5664 } 5687 }
5665 5688
5666 5689
5667 #undef __ 5690 #undef __
5668 5691
5669 } } // namespace v8::internal 5692 } } // namespace v8::internal
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