src/trusted/validator_arm/gen/arm32_decode_named_decoder.h - Issue 10879090: ARM validator: continue with extra_load_store_instructions.

Unified Diff: src/trusted/validator_arm/gen/arm32_decode_named_decoder.h

Issue 10879090: ARM validator: continue with extra_load_store_instructions. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client

Patch Set: Update with more tables. Created 8 years, 4 months ago

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« src/trusted/validator_arm/baseline_classes.h ('K') | « src/trusted/validator_arm/gen/arm32_decode_named_classes.h ('k') | src/trusted/validator_arm/gen/arm32_decode_tests.cc » ('j') | no next file with comments »
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Index: src/trusted/validator_arm/gen/arm32_decode_named_decoder.h

diff --git a/src/trusted/validator_arm/gen/arm32_decode_named_decoder.h b/src/trusted/validator_arm/gen/arm32_decode_named_decoder.h

index 84f2970003a97ec3981d00878ca326dad9e4721d..ad65c8694d3473f7e0551ede1de603d888a0a047 100644

--- a/src/trusted/validator_arm/gen/arm32_decode_named_decoder.h

+++ b/src/trusted/validator_arm/gen/arm32_decode_named_decoder.h

@@ -187,7 +187,7 @@ class NamedArm32DecoderState : nacl_arm_dec::DecoderState {

const NamedCondVfpOp_Vsqrt_Rule_388_A1_P762 CondVfpOp_Vsqrt_Rule_388_A1_P762_instance_;

const NamedCondVfpOp_Vsub_Rule_402_A2_P790 CondVfpOp_Vsub_Rule_402_A2_P790_instance_;

const NamedCoprocessorOp_None CoprocessorOp_None_instance_;

- const NamedDeprecated_None Deprecated_None_instance_;

+ const NamedDeprecated_cccc00010b00nnnntttt00001001tttt Deprecated_cccc00010b00nnnntttt00001001tttt_instance_;

const NamedDuplicateToVfpRegisters_Vdup_Rule_303_A1_P594 DuplicateToVfpRegisters_Vdup_Rule_303_A1_P594_instance_;

const NamedEffectiveNoOp_None EffectiveNoOp_None_instance_;

const NamedForbidden_None Forbidden_None_instance_;

@@ -201,6 +201,10 @@ class NamedArm32DecoderState : nacl_arm_dec::DecoderState {

const NamedForbiddenCondNop_Stm_Rule_11_B6_A1_P22 ForbiddenCondNop_Stm_Rule_11_B6_A1_P22_instance_;

const NamedForbiddenCondNop_Wfe_Rule_411_A1_P808 ForbiddenCondNop_Wfe_Rule_411_A1_P808_instance_;

const NamedForbiddenCondNop_Wfi_Rule_412_A1_P810 ForbiddenCondNop_Wfi_Rule_412_A1_P810_instance_;

+ const NamedForbiddenCondNop_cccc00010100iiiiiiiiiiii0111iiii ForbiddenCondNop_cccc00010100iiiiiiiiiiii0111iiii_instance_;

+ const NamedForbiddenCondNop_cccc0001011000000000000001101110 ForbiddenCondNop_cccc0001011000000000000001101110_instance_;

+ const NamedForbiddenCondNop_cccc00010r00mmmmdddd001m00000000 ForbiddenCondNop_cccc00010r00mmmmdddd001m00000000_instance_;

+ const NamedForbiddenCondNop_cccc00010r10mmmm1111001m0000nnnn ForbiddenCondNop_cccc00010r10mmmm1111001m0000nnnn_instance_;

const NamedForbiddenUncondNop_None ForbiddenUncondNop_None_instance_;

const NamedForbiddenUncondNop_Blx_Rule_23_A2_P58 ForbiddenUncondNop_Blx_Rule_23_A2_P58_instance_;

const NamedLoad2RegisterImm12Op_Ldr_Rule_58_A1_P120 Load2RegisterImm12Op_Ldr_Rule_58_A1_P120_instance_;

@@ -467,6 +471,10 @@ class NamedArm32DecoderState : nacl_arm_dec::DecoderState {

const NamedForbidden_Stm_Rule_11_B6_A1_P22 Forbidden_Stm_Rule_11_B6_A1_P22_instance_;

const NamedForbidden_Wfe_Rule_411_A1_P808 Forbidden_Wfe_Rule_411_A1_P808_instance_;

const NamedForbidden_Wfi_Rule_412_A1_P810 Forbidden_Wfi_Rule_412_A1_P810_instance_;

+ const NamedForbidden_cccc00010100iiiiiiiiiiii0111iiii Forbidden_cccc00010100iiiiiiiiiiii0111iiii_instance_;

+ const NamedForbidden_cccc0001011000000000000001101110 Forbidden_cccc0001011000000000000001101110_instance_;

+ const NamedForbidden_cccc00010r00mmmmdddd001m00000000 Forbidden_cccc00010r00mmmmdddd001m00000000_instance_;

+ const NamedForbidden_cccc00010r10mmmm1111001m0000nnnn Forbidden_cccc00010r10mmmm1111001m0000nnnn_instance_;

const NamedLoadBasedImmedMemory_Ldr_Rule_58_A1_P120 LoadBasedImmedMemory_Ldr_Rule_58_A1_P120_instance_;

const NamedLoadBasedImmedMemory_Ldr_Rule_59_A1_P122 LoadBasedImmedMemory_Ldr_Rule_59_A1_P122_instance_;

const NamedLoadBasedImmedMemory_Ldrb_Rule_62_A1_P128 LoadBasedImmedMemory_Ldrb_Rule_62_A1_P128_instance_;