| Index: src/arm/assembler-arm.cc
|
| diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc
|
| index bf0a655317f6fc94fabb680ed680d5608e215f74..9f2839551a1649efe576f57cb2a6b37183dd601b 100644
|
| --- a/src/arm/assembler-arm.cc
|
| +++ b/src/arm/assembler-arm.cc
|
| @@ -2402,6 +2402,18 @@ void Assembler::vsqrt(const DwVfpRegister dst,
|
| }
|
|
|
|
|
| +void Assembler::vorr(const DwVfpRegister dst,
|
| + const DwVfpRegister src1,
|
| + const DwVfpRegister src2) {
|
| + // Instruction details available in ARM DDI 0406A, A8-680.
|
| + // 1111 (31-28) | 00100 (27-23) | D=?(22) | 10 (21-20) | Vn(19-16) |
|
| + // Vd(15-12) | 0001 (11-8) | N=?(7) | Q=?(6) | M=?(5) | 1 (4) | Vm (3-0)
|
| + ASSERT(CpuFeatures::IsEnabled(VFP2));
|
| + emit((0xF << 28) | B25 | B21 | src1.code()*B16 |
|
| + dst.code()*B12 | B8 | B4 | src2.code());
|
| +}
|
| +
|
| +
|
| // Pseudo instructions.
|
| void Assembler::nop(int type) {
|
| // This is mov rx, rx.
|
|
|