| OLD | NEW |
| 1 /* | 1 /* |
| 2 * Copyright 2012 The Native Client Authors. All rights reserved. | 2 * Copyright 2012 The Native Client Authors. All rights reserved. |
| 3 * Use of this source code is governed by a BSD-style license that can | 3 * Use of this source code is governed by a BSD-style license that can |
| 4 * be found in the LICENSE file. | 4 * be found in the LICENSE file. |
| 5 */ | 5 */ |
| 6 | 6 |
| 7 // DO NOT EDIT: GENERATED CODE | 7 // DO NOT EDIT: GENERATED CODE |
| 8 | 8 |
| 9 #ifndef NACL_TRUSTED_BUT_NOT_TCB | 9 #ifndef NACL_TRUSTED_BUT_NOT_TCB |
| 10 #error This file is not meant for use in the TCB | 10 #error This file is not meant for use in the TCB |
| (...skipping 744 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 755 | 755 |
| 756 class ForbiddenCondNopTester_Wfi_Rule_412_A1_P810_ | 756 class ForbiddenCondNopTester_Wfi_Rule_412_A1_P810_ |
| 757 : public UnsafeCondNopTester { | 757 : public UnsafeCondNopTester { |
| 758 public: | 758 public: |
| 759 ForbiddenCondNopTester_Wfi_Rule_412_A1_P810_() | 759 ForbiddenCondNopTester_Wfi_Rule_412_A1_P810_() |
| 760 : UnsafeCondNopTester( | 760 : UnsafeCondNopTester( |
| 761 state_.ForbiddenCondNop_Wfi_Rule_412_A1_P810_instance_) | 761 state_.ForbiddenCondNop_Wfi_Rule_412_A1_P810_instance_) |
| 762 {} | 762 {} |
| 763 }; | 763 }; |
| 764 | 764 |
| 765 class Load2RegisterImmediateDoubleOpTester_Ldrd_Rule_66_A1_P136_NotRnIsPc | 765 class Load2RegisterImm12OpTester_Ldr_Rule_58_A1_P120_NotRnIsPc |
| 766 : public LoadStore2RegisterImmediateDoubleOpTesterNotRnIsPc { | 766 : public LoadStore2RegisterImm12OpTesterNotRnIsPc { |
| 767 public: | 767 public: |
| 768 Load2RegisterImmediateDoubleOpTester_Ldrd_Rule_66_A1_P136_NotRnIsPc() | 768 Load2RegisterImm12OpTester_Ldr_Rule_58_A1_P120_NotRnIsPc() |
| 769 : LoadStore2RegisterImmediateDoubleOpTesterNotRnIsPc( | 769 : LoadStore2RegisterImm12OpTesterNotRnIsPc( |
| 770 state_.Load2RegisterImmediateDoubleOp_Ldrd_Rule_66_A1_P136_instance_) | 770 state_.Load2RegisterImm12Op_Ldr_Rule_58_A1_P120_instance_) |
| 771 {} | 771 {} |
| 772 }; | 772 }; |
| 773 | 773 |
| 774 class Load2RegisterImmediateDoubleOpTester_Ldrd_Rule_67_A1_P138_ | 774 class Load2RegisterImm12OpTester_Ldr_Rule_59_A1_P122_ |
| 775 : public LoadStore2RegisterImmediateDoubleOpTester { | 775 : public LoadStore2RegisterImm12OpTester { |
| 776 public: | 776 public: |
| 777 Load2RegisterImmediateDoubleOpTester_Ldrd_Rule_67_A1_P138_() | 777 Load2RegisterImm12OpTester_Ldr_Rule_59_A1_P122_() |
| 778 : LoadStore2RegisterImmediateDoubleOpTester( | 778 : LoadStore2RegisterImm12OpTester( |
| 779 state_.Load2RegisterImmediateDoubleOp_Ldrd_Rule_67_A1_P138_instance_) | 779 state_.Load2RegisterImm12Op_Ldr_Rule_59_A1_P122_instance_) |
| 780 {} | 780 {} |
| 781 }; | 781 }; |
| 782 | 782 |
| 783 class Load2RegisterImmediateOpTester_Ldrh_Rule_74_A1_P152_NotRnIsPc | 783 class Load2RegisterImm12OpTester_Ldrb_Rule_62_A1_P128_NotRnIsPc |
| 784 : public LoadStore2RegisterImmediateOpTesterNotRnIsPc { | 784 : public LoadStore2RegisterImm12OpTesterNotRnIsPc { |
| 785 public: | 785 public: |
| 786 Load2RegisterImmediateOpTester_Ldrh_Rule_74_A1_P152_NotRnIsPc() | 786 Load2RegisterImm12OpTester_Ldrb_Rule_62_A1_P128_NotRnIsPc() |
| 787 : LoadStore2RegisterImmediateOpTesterNotRnIsPc( | 787 : LoadStore2RegisterImm12OpTesterNotRnIsPc( |
| 788 state_.Load2RegisterImmediateOp_Ldrh_Rule_74_A1_P152_instance_) | 788 state_.Load2RegisterImm12Op_Ldrb_Rule_62_A1_P128_instance_) |
| 789 {} | 789 {} |
| 790 }; | 790 }; |
| 791 | 791 |
| 792 class Load2RegisterImmediateOpTester_Ldrh_Rule_75_A1_P154_ | 792 class Load2RegisterImm12OpTester_Ldrb_Rule_63_A1_P130_ |
| 793 : public LoadStore2RegisterImmediateOpTester { | 793 : public LoadStore2RegisterImm12OpTester { |
| 794 public: | 794 public: |
| 795 Load2RegisterImmediateOpTester_Ldrh_Rule_75_A1_P154_() | 795 Load2RegisterImm12OpTester_Ldrb_Rule_63_A1_P130_() |
| 796 : LoadStore2RegisterImmediateOpTester( | 796 : LoadStore2RegisterImm12OpTester( |
| 797 state_.Load2RegisterImmediateOp_Ldrh_Rule_75_A1_P154_instance_) | 797 state_.Load2RegisterImm12Op_Ldrb_Rule_63_A1_P130_instance_) |
| 798 {} | 798 {} |
| 799 }; | 799 }; |
| 800 | 800 |
| 801 class Load2RegisterImmediateOpTester_Ldrsb_Rule_78_A1_P160_NotRnIsPc | 801 class Load2RegisterImm8DoubleOpTester_Ldrd_Rule_66_A1_P136_NotRnIsPc |
| 802 : public LoadStore2RegisterImmediateOpTesterNotRnIsPc { | 802 : public LoadStore2RegisterImm8DoubleOpTesterNotRnIsPc { |
| 803 public: | 803 public: |
| 804 Load2RegisterImmediateOpTester_Ldrsb_Rule_78_A1_P160_NotRnIsPc() | 804 Load2RegisterImm8DoubleOpTester_Ldrd_Rule_66_A1_P136_NotRnIsPc() |
| 805 : LoadStore2RegisterImmediateOpTesterNotRnIsPc( | 805 : LoadStore2RegisterImm8DoubleOpTesterNotRnIsPc( |
| 806 state_.Load2RegisterImmediateOp_Ldrsb_Rule_78_A1_P160_instance_) | 806 state_.Load2RegisterImm8DoubleOp_Ldrd_Rule_66_A1_P136_instance_) |
| 807 {} | 807 {} |
| 808 }; | 808 }; |
| 809 | 809 |
| 810 class Load2RegisterImmediateOpTester_Ldrsh_Rule_82_A1_P168_NotRnIsPc | 810 class Load2RegisterImm8DoubleOpTester_Ldrd_Rule_67_A1_P138_ |
| 811 : public LoadStore2RegisterImmediateOpTesterNotRnIsPc { | 811 : public LoadStore2RegisterImm8DoubleOpTester { |
| 812 public: | 812 public: |
| 813 Load2RegisterImmediateOpTester_Ldrsh_Rule_82_A1_P168_NotRnIsPc() | 813 Load2RegisterImm8DoubleOpTester_Ldrd_Rule_67_A1_P138_() |
| 814 : LoadStore2RegisterImmediateOpTesterNotRnIsPc( | 814 : LoadStore2RegisterImm8DoubleOpTester( |
| 815 state_.Load2RegisterImmediateOp_Ldrsh_Rule_82_A1_P168_instance_) | 815 state_.Load2RegisterImm8DoubleOp_Ldrd_Rule_67_A1_P138_instance_) |
| 816 {} | 816 {} |
| 817 }; | 817 }; |
| 818 | 818 |
| 819 class Load2RegisterImmediateOpTester_Ldrsh_Rule_83_A1_P170_ | 819 class Load2RegisterImm8OpTester_Ldrh_Rule_74_A1_P152_NotRnIsPc |
| 820 : public LoadStore2RegisterImmediateOpTester { | 820 : public LoadStore2RegisterImm8OpTesterNotRnIsPc { |
| 821 public: | 821 public: |
| 822 Load2RegisterImmediateOpTester_Ldrsh_Rule_83_A1_P170_() | 822 Load2RegisterImm8OpTester_Ldrh_Rule_74_A1_P152_NotRnIsPc() |
| 823 : LoadStore2RegisterImmediateOpTester( | 823 : LoadStore2RegisterImm8OpTesterNotRnIsPc( |
| 824 state_.Load2RegisterImmediateOp_Ldrsh_Rule_83_A1_P170_instance_) | 824 state_.Load2RegisterImm8Op_Ldrh_Rule_74_A1_P152_instance_) |
| 825 {} | 825 {} |
| 826 }; | 826 }; |
| 827 | 827 |
| 828 class Load2RegisterImmediateOpTester_ldrsb_Rule_79_A1_162_ | 828 class Load2RegisterImm8OpTester_Ldrh_Rule_75_A1_P154_ |
| 829 : public LoadStore2RegisterImmediateOpTester { | 829 : public LoadStore2RegisterImm8OpTester { |
| 830 public: | 830 public: |
| 831 Load2RegisterImmediateOpTester_ldrsb_Rule_79_A1_162_() | 831 Load2RegisterImm8OpTester_Ldrh_Rule_75_A1_P154_() |
| 832 : LoadStore2RegisterImmediateOpTester( | 832 : LoadStore2RegisterImm8OpTester( |
| 833 state_.Load2RegisterImmediateOp_ldrsb_Rule_79_A1_162_instance_) | 833 state_.Load2RegisterImm8Op_Ldrh_Rule_75_A1_P154_instance_) |
| 834 {} |
| 835 }; |
| 836 |
| 837 class Load2RegisterImm8OpTester_Ldrsb_Rule_78_A1_P160_NotRnIsPc |
| 838 : public LoadStore2RegisterImm8OpTesterNotRnIsPc { |
| 839 public: |
| 840 Load2RegisterImm8OpTester_Ldrsb_Rule_78_A1_P160_NotRnIsPc() |
| 841 : LoadStore2RegisterImm8OpTesterNotRnIsPc( |
| 842 state_.Load2RegisterImm8Op_Ldrsb_Rule_78_A1_P160_instance_) |
| 843 {} |
| 844 }; |
| 845 |
| 846 class Load2RegisterImm8OpTester_Ldrsh_Rule_82_A1_P168_NotRnIsPc |
| 847 : public LoadStore2RegisterImm8OpTesterNotRnIsPc { |
| 848 public: |
| 849 Load2RegisterImm8OpTester_Ldrsh_Rule_82_A1_P168_NotRnIsPc() |
| 850 : LoadStore2RegisterImm8OpTesterNotRnIsPc( |
| 851 state_.Load2RegisterImm8Op_Ldrsh_Rule_82_A1_P168_instance_) |
| 852 {} |
| 853 }; |
| 854 |
| 855 class Load2RegisterImm8OpTester_Ldrsh_Rule_83_A1_P170_ |
| 856 : public LoadStore2RegisterImm8OpTester { |
| 857 public: |
| 858 Load2RegisterImm8OpTester_Ldrsh_Rule_83_A1_P170_() |
| 859 : LoadStore2RegisterImm8OpTester( |
| 860 state_.Load2RegisterImm8Op_Ldrsh_Rule_83_A1_P170_instance_) |
| 861 {} |
| 862 }; |
| 863 |
| 864 class Load2RegisterImm8OpTester_ldrsb_Rule_79_A1_162_ |
| 865 : public LoadStore2RegisterImm8OpTester { |
| 866 public: |
| 867 Load2RegisterImm8OpTester_ldrsb_Rule_79_A1_162_() |
| 868 : LoadStore2RegisterImm8OpTester( |
| 869 state_.Load2RegisterImm8Op_ldrsb_Rule_79_A1_162_instance_) |
| 834 {} | 870 {} |
| 835 }; | 871 }; |
| 836 | 872 |
| 837 class Load3RegisterDoubleOpTester_Ldrd_Rule_68_A1_P140_ | 873 class Load3RegisterDoubleOpTester_Ldrd_Rule_68_A1_P140_ |
| 838 : public LoadStore3RegisterDoubleOpTester { | 874 : public LoadStore3RegisterDoubleOpTester { |
| 839 public: | 875 public: |
| 840 Load3RegisterDoubleOpTester_Ldrd_Rule_68_A1_P140_() | 876 Load3RegisterDoubleOpTester_Ldrd_Rule_68_A1_P140_() |
| 841 : LoadStore3RegisterDoubleOpTester( | 877 : LoadStore3RegisterDoubleOpTester( |
| 842 state_.Load3RegisterDoubleOp_Ldrd_Rule_68_A1_P140_instance_) | 878 state_.Load3RegisterDoubleOp_Ldrd_Rule_68_A1_P140_instance_) |
| 843 {} | 879 {} |
| 844 }; | 880 }; |
| 845 | 881 |
| 882 class Load3RegisterImm5OpTester_Ldr_Rule_60_A1_P124_ |
| 883 : public LoadStore3RegisterImm5OpTester { |
| 884 public: |
| 885 Load3RegisterImm5OpTester_Ldr_Rule_60_A1_P124_() |
| 886 : LoadStore3RegisterImm5OpTester( |
| 887 state_.Load3RegisterImm5Op_Ldr_Rule_60_A1_P124_instance_) |
| 888 {} |
| 889 }; |
| 890 |
| 891 class Load3RegisterImm5OpTester_Ldrb_Rule_64_A1_P132_ |
| 892 : public LoadStore3RegisterImm5OpTester { |
| 893 public: |
| 894 Load3RegisterImm5OpTester_Ldrb_Rule_64_A1_P132_() |
| 895 : LoadStore3RegisterImm5OpTester( |
| 896 state_.Load3RegisterImm5Op_Ldrb_Rule_64_A1_P132_instance_) |
| 897 {} |
| 898 }; |
| 899 |
| 846 class Load3RegisterOpTester_Ldrh_Rule_76_A1_P156_ | 900 class Load3RegisterOpTester_Ldrh_Rule_76_A1_P156_ |
| 847 : public LoadStore3RegisterOpTester { | 901 : public LoadStore3RegisterOpTester { |
| 848 public: | 902 public: |
| 849 Load3RegisterOpTester_Ldrh_Rule_76_A1_P156_() | 903 Load3RegisterOpTester_Ldrh_Rule_76_A1_P156_() |
| 850 : LoadStore3RegisterOpTester( | 904 : LoadStore3RegisterOpTester( |
| 851 state_.Load3RegisterOp_Ldrh_Rule_76_A1_P156_instance_) | 905 state_.Load3RegisterOp_Ldrh_Rule_76_A1_P156_instance_) |
| 852 {} | 906 {} |
| 853 }; | 907 }; |
| 854 | 908 |
| 855 class Load3RegisterOpTester_Ldrsb_Rule_80_A1_P164_ | 909 class Load3RegisterOpTester_Ldrsb_Rule_80_A1_P164_ |
| (...skipping 25 matching lines...) Expand all Loading... |
| 881 | 935 |
| 882 class MaskedBinaryRegisterImmediateTestTester_Tst_Rule_230_A1_P454_ | 936 class MaskedBinaryRegisterImmediateTestTester_Tst_Rule_230_A1_P454_ |
| 883 : public BinaryRegisterImmediateTestTester { | 937 : public BinaryRegisterImmediateTestTester { |
| 884 public: | 938 public: |
| 885 MaskedBinaryRegisterImmediateTestTester_Tst_Rule_230_A1_P454_() | 939 MaskedBinaryRegisterImmediateTestTester_Tst_Rule_230_A1_P454_() |
| 886 : BinaryRegisterImmediateTestTester( | 940 : BinaryRegisterImmediateTestTester( |
| 887 state_.MaskedBinaryRegisterImmediateTest_Tst_Rule_230_A1_P454_instance_) | 941 state_.MaskedBinaryRegisterImmediateTest_Tst_Rule_230_A1_P454_instance_) |
| 888 {} | 942 {} |
| 889 }; | 943 }; |
| 890 | 944 |
| 891 class Store2RegisterImmediateDoubleOpTester_Strd_Rule_200_A1_P396_ | 945 class Store2RegisterImm12OpTester_Str_Rule_194_A1_P384_ |
| 892 : public LoadStore2RegisterImmediateDoubleOpTester { | 946 : public LoadStore2RegisterImm12OpTester { |
| 893 public: | 947 public: |
| 894 Store2RegisterImmediateDoubleOpTester_Strd_Rule_200_A1_P396_() | 948 Store2RegisterImm12OpTester_Str_Rule_194_A1_P384_() |
| 895 : LoadStore2RegisterImmediateDoubleOpTester( | 949 : LoadStore2RegisterImm12OpTester( |
| 896 state_.Store2RegisterImmediateDoubleOp_Strd_Rule_200_A1_P396_instance_) | 950 state_.Store2RegisterImm12Op_Str_Rule_194_A1_P384_instance_) |
| 897 {} | 951 {} |
| 898 }; | 952 }; |
| 899 | 953 |
| 900 class Store2RegisterImmediateOpTester_Strh_Rule_207_A1_P410_ | 954 class Store2RegisterImm12OpTester_Strb_Rule_197_A1_P390_ |
| 901 : public LoadStore2RegisterImmediateOpTester { | 955 : public LoadStore2RegisterImm12OpTester { |
| 902 public: | 956 public: |
| 903 Store2RegisterImmediateOpTester_Strh_Rule_207_A1_P410_() | 957 Store2RegisterImm12OpTester_Strb_Rule_197_A1_P390_() |
| 904 : LoadStore2RegisterImmediateOpTester( | 958 : LoadStore2RegisterImm12OpTester( |
| 905 state_.Store2RegisterImmediateOp_Strh_Rule_207_A1_P410_instance_) | 959 state_.Store2RegisterImm12Op_Strb_Rule_197_A1_P390_instance_) |
| 960 {} |
| 961 }; |
| 962 |
| 963 class Store2RegisterImm8DoubleOpTester_Strd_Rule_200_A1_P396_ |
| 964 : public LoadStore2RegisterImm8DoubleOpTester { |
| 965 public: |
| 966 Store2RegisterImm8DoubleOpTester_Strd_Rule_200_A1_P396_() |
| 967 : LoadStore2RegisterImm8DoubleOpTester( |
| 968 state_.Store2RegisterImm8DoubleOp_Strd_Rule_200_A1_P396_instance_) |
| 969 {} |
| 970 }; |
| 971 |
| 972 class Store2RegisterImm8OpTester_Strh_Rule_207_A1_P410_ |
| 973 : public LoadStore2RegisterImm8OpTester { |
| 974 public: |
| 975 Store2RegisterImm8OpTester_Strh_Rule_207_A1_P410_() |
| 976 : LoadStore2RegisterImm8OpTester( |
| 977 state_.Store2RegisterImm8Op_Strh_Rule_207_A1_P410_instance_) |
| 906 {} | 978 {} |
| 907 }; | 979 }; |
| 908 | 980 |
| 909 class Store3RegisterDoubleOpTester_Strd_Rule_201_A1_P398_ | 981 class Store3RegisterDoubleOpTester_Strd_Rule_201_A1_P398_ |
| 910 : public LoadStore3RegisterDoubleOpTester { | 982 : public LoadStore3RegisterDoubleOpTester { |
| 911 public: | 983 public: |
| 912 Store3RegisterDoubleOpTester_Strd_Rule_201_A1_P398_() | 984 Store3RegisterDoubleOpTester_Strd_Rule_201_A1_P398_() |
| 913 : LoadStore3RegisterDoubleOpTester( | 985 : LoadStore3RegisterDoubleOpTester( |
| 914 state_.Store3RegisterDoubleOp_Strd_Rule_201_A1_P398_instance_) | 986 state_.Store3RegisterDoubleOp_Strd_Rule_201_A1_P398_instance_) |
| 915 {} | 987 {} |
| 916 }; | 988 }; |
| 917 | 989 |
| 990 class Store3RegisterImm5OpTester_Str_Rule_195_A1_P386_ |
| 991 : public LoadStore3RegisterImm5OpTester { |
| 992 public: |
| 993 Store3RegisterImm5OpTester_Str_Rule_195_A1_P386_() |
| 994 : LoadStore3RegisterImm5OpTester( |
| 995 state_.Store3RegisterImm5Op_Str_Rule_195_A1_P386_instance_) |
| 996 {} |
| 997 }; |
| 998 |
| 999 class Store3RegisterImm5OpTester_Strb_Rule_198_A1_P392_ |
| 1000 : public LoadStore3RegisterImm5OpTester { |
| 1001 public: |
| 1002 Store3RegisterImm5OpTester_Strb_Rule_198_A1_P392_() |
| 1003 : LoadStore3RegisterImm5OpTester( |
| 1004 state_.Store3RegisterImm5Op_Strb_Rule_198_A1_P392_instance_) |
| 1005 {} |
| 1006 }; |
| 1007 |
| 918 class Store3RegisterOpTester_Strh_Rule_208_A1_P412_ | 1008 class Store3RegisterOpTester_Strh_Rule_208_A1_P412_ |
| 919 : public LoadStore3RegisterOpTester { | 1009 : public LoadStore3RegisterOpTester { |
| 920 public: | 1010 public: |
| 921 Store3RegisterOpTester_Strh_Rule_208_A1_P412_() | 1011 Store3RegisterOpTester_Strh_Rule_208_A1_P412_() |
| 922 : LoadStore3RegisterOpTester( | 1012 : LoadStore3RegisterOpTester( |
| 923 state_.Store3RegisterOp_Strh_Rule_208_A1_P412_instance_) | 1013 state_.Store3RegisterOp_Strh_Rule_208_A1_P412_instance_) |
| 924 {} | 1014 {} |
| 925 }; | 1015 }; |
| 926 | 1016 |
| 927 class Unary1RegisterBitRangeTester_Bfc_17_A1_P46_ | 1017 class Unary1RegisterBitRangeTester_Bfc_17_A1_P46_ |
| (...skipping 790 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1718 | 1808 |
| 1719 TEST_F(Arm32DecoderStateTests, | 1809 TEST_F(Arm32DecoderStateTests, |
| 1720 ForbiddenCondNopTester_Wfi_Rule_412_A1_P810__cccc001100100000111100000000
0011_Test) { | 1810 ForbiddenCondNopTester_Wfi_Rule_412_A1_P810__cccc001100100000111100000000
0011_Test) { |
| 1721 ForbiddenCondNopTester_Wfi_Rule_412_A1_P810_ baseline_tester; | 1811 ForbiddenCondNopTester_Wfi_Rule_412_A1_P810_ baseline_tester; |
| 1722 NamedForbidden_Wfi_Rule_412_A1_P810 actual; | 1812 NamedForbidden_Wfi_Rule_412_A1_P810 actual; |
| 1723 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1813 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1724 a_vs_b_tester.Test("cccc0011001000001111000000000011"); | 1814 a_vs_b_tester.Test("cccc0011001000001111000000000011"); |
| 1725 } | 1815 } |
| 1726 | 1816 |
| 1727 TEST_F(Arm32DecoderStateTests, | 1817 TEST_F(Arm32DecoderStateTests, |
| 1728 Load2RegisterImmediateDoubleOpTester_Ldrd_Rule_66_A1_P136_NotRnIsPc_cccc0
00pd1w0nnnnttttiiii1101iiii_Test) { | 1818 Load2RegisterImm12OpTester_Ldr_Rule_58_A1_P120_NotRnIsPc_cccc010pd0w1nnnn
ttttiiiiiiiiiiii_Test) { |
| 1729 Load2RegisterImmediateDoubleOpTester_Ldrd_Rule_66_A1_P136_NotRnIsPc baseline_t
ester; | 1819 Load2RegisterImm12OpTester_Ldr_Rule_58_A1_P120_NotRnIsPc baseline_tester; |
| 1820 NamedLdrImmediate_Ldr_Rule_58_A1_P120 actual; |
| 1821 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1822 a_vs_b_tester.Test("cccc010pd0w1nnnnttttiiiiiiiiiiii"); |
| 1823 } |
| 1824 |
| 1825 TEST_F(Arm32DecoderStateTests, |
| 1826 Load2RegisterImm12OpTester_Ldr_Rule_59_A1_P122__cccc0101d0011111ttttiiiii
iiiiiii_Test) { |
| 1827 Load2RegisterImm12OpTester_Ldr_Rule_59_A1_P122_ baseline_tester; |
| 1828 NamedLdrImmediate_Ldr_Rule_59_A1_P122 actual; |
| 1829 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1830 a_vs_b_tester.Test("cccc0101d0011111ttttiiiiiiiiiiii"); |
| 1831 } |
| 1832 |
| 1833 TEST_F(Arm32DecoderStateTests, |
| 1834 Load2RegisterImm12OpTester_Ldrb_Rule_62_A1_P128_NotRnIsPc_cccc010pd1w1nnn
nttttiiiiiiiiiiii_Test) { |
| 1835 Load2RegisterImm12OpTester_Ldrb_Rule_62_A1_P128_NotRnIsPc baseline_tester; |
| 1836 NamedLdrImmediate_Ldrb_Rule_62_A1_P128 actual; |
| 1837 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1838 a_vs_b_tester.Test("cccc010pd1w1nnnnttttiiiiiiiiiiii"); |
| 1839 } |
| 1840 |
| 1841 TEST_F(Arm32DecoderStateTests, |
| 1842 Load2RegisterImm12OpTester_Ldrb_Rule_63_A1_P130__cccc0101d1011111ttttiiii
iiiiiiii_Test) { |
| 1843 Load2RegisterImm12OpTester_Ldrb_Rule_63_A1_P130_ baseline_tester; |
| 1844 NamedLdrImmediate_Ldrb_Rule_63_A1_P130 actual; |
| 1845 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1846 a_vs_b_tester.Test("cccc0101d1011111ttttiiiiiiiiiiii"); |
| 1847 } |
| 1848 |
| 1849 TEST_F(Arm32DecoderStateTests, |
| 1850 Load2RegisterImm8DoubleOpTester_Ldrd_Rule_66_A1_P136_NotRnIsPc_cccc000pd1
w0nnnnttttiiii1101iiii_Test) { |
| 1851 Load2RegisterImm8DoubleOpTester_Ldrd_Rule_66_A1_P136_NotRnIsPc baseline_tester
; |
| 1730 NamedLdrImmediateDouble_Ldrd_Rule_66_A1_P136 actual; | 1852 NamedLdrImmediateDouble_Ldrd_Rule_66_A1_P136 actual; |
| 1731 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1853 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1732 a_vs_b_tester.Test("cccc000pd1w0nnnnttttiiii1101iiii"); | 1854 a_vs_b_tester.Test("cccc000pd1w0nnnnttttiiii1101iiii"); |
| 1733 } | 1855 } |
| 1734 | 1856 |
| 1735 TEST_F(Arm32DecoderStateTests, | 1857 TEST_F(Arm32DecoderStateTests, |
| 1736 Load2RegisterImmediateDoubleOpTester_Ldrd_Rule_67_A1_P138__cccc0001d10011
11ttttiiii1101iiii_Test) { | 1858 Load2RegisterImm8DoubleOpTester_Ldrd_Rule_67_A1_P138__cccc0001d1001111ttt
tiiii1101iiii_Test) { |
| 1737 Load2RegisterImmediateDoubleOpTester_Ldrd_Rule_67_A1_P138_ baseline_tester; | 1859 Load2RegisterImm8DoubleOpTester_Ldrd_Rule_67_A1_P138_ baseline_tester; |
| 1738 NamedLdrImmediateDouble_Ldrd_Rule_67_A1_P138 actual; | 1860 NamedLdrImmediateDouble_Ldrd_Rule_67_A1_P138 actual; |
| 1739 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1861 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1740 a_vs_b_tester.Test("cccc0001d1001111ttttiiii1101iiii"); | 1862 a_vs_b_tester.Test("cccc0001d1001111ttttiiii1101iiii"); |
| 1741 } | 1863 } |
| 1742 | 1864 |
| 1743 TEST_F(Arm32DecoderStateTests, | 1865 TEST_F(Arm32DecoderStateTests, |
| 1744 Load2RegisterImmediateOpTester_Ldrh_Rule_74_A1_P152_NotRnIsPc_cccc000pd1w
1nnnnttttiiii1011iiii_Test) { | 1866 Load2RegisterImm8OpTester_Ldrh_Rule_74_A1_P152_NotRnIsPc_cccc000pd1w1nnnn
ttttiiii1011iiii_Test) { |
| 1745 Load2RegisterImmediateOpTester_Ldrh_Rule_74_A1_P152_NotRnIsPc baseline_tester; | 1867 Load2RegisterImm8OpTester_Ldrh_Rule_74_A1_P152_NotRnIsPc baseline_tester; |
| 1746 NamedLdrImmediate_Ldrh_Rule_74_A1_P152 actual; | 1868 NamedLdrImmediate_Ldrh_Rule_74_A1_P152 actual; |
| 1747 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1869 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1748 a_vs_b_tester.Test("cccc000pd1w1nnnnttttiiii1011iiii"); | 1870 a_vs_b_tester.Test("cccc000pd1w1nnnnttttiiii1011iiii"); |
| 1749 } | 1871 } |
| 1750 | 1872 |
| 1751 TEST_F(Arm32DecoderStateTests, | 1873 TEST_F(Arm32DecoderStateTests, |
| 1752 Load2RegisterImmediateOpTester_Ldrh_Rule_75_A1_P154__cccc0001d1011111tttt
iiii1011iiii_Test) { | 1874 Load2RegisterImm8OpTester_Ldrh_Rule_75_A1_P154__cccc0001d1011111ttttiiii1
011iiii_Test) { |
| 1753 Load2RegisterImmediateOpTester_Ldrh_Rule_75_A1_P154_ baseline_tester; | 1875 Load2RegisterImm8OpTester_Ldrh_Rule_75_A1_P154_ baseline_tester; |
| 1754 NamedLdrImmediate_Ldrh_Rule_75_A1_P154 actual; | 1876 NamedLdrImmediate_Ldrh_Rule_75_A1_P154 actual; |
| 1755 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1877 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1756 a_vs_b_tester.Test("cccc0001d1011111ttttiiii1011iiii"); | 1878 a_vs_b_tester.Test("cccc0001d1011111ttttiiii1011iiii"); |
| 1757 } | 1879 } |
| 1758 | 1880 |
| 1759 TEST_F(Arm32DecoderStateTests, | 1881 TEST_F(Arm32DecoderStateTests, |
| 1760 Load2RegisterImmediateOpTester_Ldrsb_Rule_78_A1_P160_NotRnIsPc_cccc000pd1
w1nnnnttttiiii1101iiii_Test) { | 1882 Load2RegisterImm8OpTester_Ldrsb_Rule_78_A1_P160_NotRnIsPc_cccc000pd1w1nnn
nttttiiii1101iiii_Test) { |
| 1761 Load2RegisterImmediateOpTester_Ldrsb_Rule_78_A1_P160_NotRnIsPc baseline_tester
; | 1883 Load2RegisterImm8OpTester_Ldrsb_Rule_78_A1_P160_NotRnIsPc baseline_tester; |
| 1762 NamedLdrImmediate_Ldrsb_Rule_78_A1_P160 actual; | 1884 NamedLdrImmediate_Ldrsb_Rule_78_A1_P160 actual; |
| 1763 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1885 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1764 a_vs_b_tester.Test("cccc000pd1w1nnnnttttiiii1101iiii"); | 1886 a_vs_b_tester.Test("cccc000pd1w1nnnnttttiiii1101iiii"); |
| 1765 } | 1887 } |
| 1766 | 1888 |
| 1767 TEST_F(Arm32DecoderStateTests, | 1889 TEST_F(Arm32DecoderStateTests, |
| 1768 Load2RegisterImmediateOpTester_Ldrsh_Rule_82_A1_P168_NotRnIsPc_cccc000pd1
w1nnnnttttiiii1111iiii_Test) { | 1890 Load2RegisterImm8OpTester_Ldrsh_Rule_82_A1_P168_NotRnIsPc_cccc000pd1w1nnn
nttttiiii1111iiii_Test) { |
| 1769 Load2RegisterImmediateOpTester_Ldrsh_Rule_82_A1_P168_NotRnIsPc baseline_tester
; | 1891 Load2RegisterImm8OpTester_Ldrsh_Rule_82_A1_P168_NotRnIsPc baseline_tester; |
| 1770 NamedLdrImmediate_Ldrsh_Rule_82_A1_P168 actual; | 1892 NamedLdrImmediate_Ldrsh_Rule_82_A1_P168 actual; |
| 1771 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1893 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1772 a_vs_b_tester.Test("cccc000pd1w1nnnnttttiiii1111iiii"); | 1894 a_vs_b_tester.Test("cccc000pd1w1nnnnttttiiii1111iiii"); |
| 1773 } | 1895 } |
| 1774 | 1896 |
| 1775 TEST_F(Arm32DecoderStateTests, | 1897 TEST_F(Arm32DecoderStateTests, |
| 1776 Load2RegisterImmediateOpTester_Ldrsh_Rule_83_A1_P170__cccc0001d1011111ttt
tiiii1111iiii_Test) { | 1898 Load2RegisterImm8OpTester_Ldrsh_Rule_83_A1_P170__cccc0001d1011111ttttiiii
1111iiii_Test) { |
| 1777 Load2RegisterImmediateOpTester_Ldrsh_Rule_83_A1_P170_ baseline_tester; | 1899 Load2RegisterImm8OpTester_Ldrsh_Rule_83_A1_P170_ baseline_tester; |
| 1778 NamedLdrImmediate_Ldrsh_Rule_83_A1_P170 actual; | 1900 NamedLdrImmediate_Ldrsh_Rule_83_A1_P170 actual; |
| 1779 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1901 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1780 a_vs_b_tester.Test("cccc0001d1011111ttttiiii1111iiii"); | 1902 a_vs_b_tester.Test("cccc0001d1011111ttttiiii1111iiii"); |
| 1781 } | 1903 } |
| 1782 | 1904 |
| 1783 TEST_F(Arm32DecoderStateTests, | 1905 TEST_F(Arm32DecoderStateTests, |
| 1784 Load2RegisterImmediateOpTester_ldrsb_Rule_79_A1_162__cccc0001d1011111tttt
iiii1101iiii_Test) { | 1906 Load2RegisterImm8OpTester_ldrsb_Rule_79_A1_162__cccc0001d1011111ttttiiii1
101iiii_Test) { |
| 1785 Load2RegisterImmediateOpTester_ldrsb_Rule_79_A1_162_ baseline_tester; | 1907 Load2RegisterImm8OpTester_ldrsb_Rule_79_A1_162_ baseline_tester; |
| 1786 NamedLdrImmediate_ldrsb_Rule_79_A1_162 actual; | 1908 NamedLdrImmediate_ldrsb_Rule_79_A1_162 actual; |
| 1787 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1909 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1788 a_vs_b_tester.Test("cccc0001d1011111ttttiiii1101iiii"); | 1910 a_vs_b_tester.Test("cccc0001d1011111ttttiiii1101iiii"); |
| 1789 } | 1911 } |
| 1790 | 1912 |
| 1791 TEST_F(Arm32DecoderStateTests, | 1913 TEST_F(Arm32DecoderStateTests, |
| 1792 Load3RegisterDoubleOpTester_Ldrd_Rule_68_A1_P140__cccc000pd0w0nnnntttt000
01101mmmm_Test) { | 1914 Load3RegisterDoubleOpTester_Ldrd_Rule_68_A1_P140__cccc000pd0w0nnnntttt000
01101mmmm_Test) { |
| 1793 Load3RegisterDoubleOpTester_Ldrd_Rule_68_A1_P140_ baseline_tester; | 1915 Load3RegisterDoubleOpTester_Ldrd_Rule_68_A1_P140_ baseline_tester; |
| 1794 NamedLdrRegisterDouble_Ldrd_Rule_68_A1_P140 actual; | 1916 NamedLdrRegisterDouble_Ldrd_Rule_68_A1_P140 actual; |
| 1795 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1917 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1796 a_vs_b_tester.Test("cccc000pd0w0nnnntttt00001101mmmm"); | 1918 a_vs_b_tester.Test("cccc000pd0w0nnnntttt00001101mmmm"); |
| 1797 } | 1919 } |
| 1798 | 1920 |
| 1799 TEST_F(Arm32DecoderStateTests, | 1921 TEST_F(Arm32DecoderStateTests, |
| 1922 Load3RegisterImm5OpTester_Ldr_Rule_60_A1_P124__cccc011pd0w1nnnnttttiiiiit
t0mmmm_Test) { |
| 1923 Load3RegisterImm5OpTester_Ldr_Rule_60_A1_P124_ baseline_tester; |
| 1924 NamedLdrRegister_Ldr_Rule_60_A1_P124 actual; |
| 1925 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1926 a_vs_b_tester.Test("cccc011pd0w1nnnnttttiiiiitt0mmmm"); |
| 1927 } |
| 1928 |
| 1929 TEST_F(Arm32DecoderStateTests, |
| 1930 Load3RegisterImm5OpTester_Ldrb_Rule_64_A1_P132__cccc011pd1w1nnnnttttiiiii
tt0mmmm_Test) { |
| 1931 Load3RegisterImm5OpTester_Ldrb_Rule_64_A1_P132_ baseline_tester; |
| 1932 NamedLdrRegister_Ldrb_Rule_64_A1_P132 actual; |
| 1933 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1934 a_vs_b_tester.Test("cccc011pd1w1nnnnttttiiiiitt0mmmm"); |
| 1935 } |
| 1936 |
| 1937 TEST_F(Arm32DecoderStateTests, |
| 1800 Load3RegisterOpTester_Ldrh_Rule_76_A1_P156__cccc000pd0w1nnnntttt00001011m
mmm_Test) { | 1938 Load3RegisterOpTester_Ldrh_Rule_76_A1_P156__cccc000pd0w1nnnntttt00001011m
mmm_Test) { |
| 1801 Load3RegisterOpTester_Ldrh_Rule_76_A1_P156_ baseline_tester; | 1939 Load3RegisterOpTester_Ldrh_Rule_76_A1_P156_ baseline_tester; |
| 1802 NamedLdrRegister_Ldrh_Rule_76_A1_P156 actual; | 1940 NamedLdrRegister_Ldrh_Rule_76_A1_P156 actual; |
| 1803 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1941 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1804 a_vs_b_tester.Test("cccc000pd0w1nnnntttt00001011mmmm"); | 1942 a_vs_b_tester.Test("cccc000pd0w1nnnntttt00001011mmmm"); |
| 1805 } | 1943 } |
| 1806 | 1944 |
| 1807 TEST_F(Arm32DecoderStateTests, | 1945 TEST_F(Arm32DecoderStateTests, |
| 1808 Load3RegisterOpTester_Ldrsb_Rule_80_A1_P164__cccc000pd0w1nnnntttt00001101
mmmm_Test) { | 1946 Load3RegisterOpTester_Ldrsb_Rule_80_A1_P164__cccc000pd0w1nnnntttt00001101
mmmm_Test) { |
| 1809 Load3RegisterOpTester_Ldrsb_Rule_80_A1_P164_ baseline_tester; | 1947 Load3RegisterOpTester_Ldrsb_Rule_80_A1_P164_ baseline_tester; |
| (...skipping 20 matching lines...) Expand all Loading... |
| 1830 | 1968 |
| 1831 TEST_F(Arm32DecoderStateTests, | 1969 TEST_F(Arm32DecoderStateTests, |
| 1832 MaskedBinaryRegisterImmediateTestTester_Tst_Rule_230_A1_P454__cccc0011000
1nnnn0000iiiiiiiiiiii_Test) { | 1970 MaskedBinaryRegisterImmediateTestTester_Tst_Rule_230_A1_P454__cccc0011000
1nnnn0000iiiiiiiiiiii_Test) { |
| 1833 MaskedBinaryRegisterImmediateTestTester_Tst_Rule_230_A1_P454_ baseline_tester; | 1971 MaskedBinaryRegisterImmediateTestTester_Tst_Rule_230_A1_P454_ baseline_tester; |
| 1834 NamedTestIfAddressMasked_Tst_Rule_230_A1_P454 actual; | 1972 NamedTestIfAddressMasked_Tst_Rule_230_A1_P454 actual; |
| 1835 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1973 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1836 a_vs_b_tester.Test("cccc00110001nnnn0000iiiiiiiiiiii"); | 1974 a_vs_b_tester.Test("cccc00110001nnnn0000iiiiiiiiiiii"); |
| 1837 } | 1975 } |
| 1838 | 1976 |
| 1839 TEST_F(Arm32DecoderStateTests, | 1977 TEST_F(Arm32DecoderStateTests, |
| 1840 Store2RegisterImmediateDoubleOpTester_Strd_Rule_200_A1_P396__cccc000pd1w0
nnnnttttiiii1111iiii_Test) { | 1978 Store2RegisterImm12OpTester_Str_Rule_194_A1_P384__cccc010pd0w0nnnnttttiii
iiiiiiiii_Test) { |
| 1841 Store2RegisterImmediateDoubleOpTester_Strd_Rule_200_A1_P396_ baseline_tester; | 1979 Store2RegisterImm12OpTester_Str_Rule_194_A1_P384_ baseline_tester; |
| 1980 NamedStrImmediate_Str_Rule_194_A1_P384 actual; |
| 1981 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1982 a_vs_b_tester.Test("cccc010pd0w0nnnnttttiiiiiiiiiiii"); |
| 1983 } |
| 1984 |
| 1985 TEST_F(Arm32DecoderStateTests, |
| 1986 Store2RegisterImm12OpTester_Strb_Rule_197_A1_P390__cccc010pd1w0nnnnttttii
iiiiiiiiii_Test) { |
| 1987 Store2RegisterImm12OpTester_Strb_Rule_197_A1_P390_ baseline_tester; |
| 1988 NamedStrImmediate_Strb_Rule_197_A1_P390 actual; |
| 1989 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1990 a_vs_b_tester.Test("cccc010pd1w0nnnnttttiiiiiiiiiiii"); |
| 1991 } |
| 1992 |
| 1993 TEST_F(Arm32DecoderStateTests, |
| 1994 Store2RegisterImm8DoubleOpTester_Strd_Rule_200_A1_P396__cccc000pd1w0nnnnt
tttiiii1111iiii_Test) { |
| 1995 Store2RegisterImm8DoubleOpTester_Strd_Rule_200_A1_P396_ baseline_tester; |
| 1842 NamedStrImmediateDouble_Strd_Rule_200_A1_P396 actual; | 1996 NamedStrImmediateDouble_Strd_Rule_200_A1_P396 actual; |
| 1843 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 1997 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1844 a_vs_b_tester.Test("cccc000pd1w0nnnnttttiiii1111iiii"); | 1998 a_vs_b_tester.Test("cccc000pd1w0nnnnttttiiii1111iiii"); |
| 1845 } | 1999 } |
| 1846 | 2000 |
| 1847 TEST_F(Arm32DecoderStateTests, | 2001 TEST_F(Arm32DecoderStateTests, |
| 1848 Store2RegisterImmediateOpTester_Strh_Rule_207_A1_P410__cccc000pd1w0nnnntt
ttiiii1011iiii_Test) { | 2002 Store2RegisterImm8OpTester_Strh_Rule_207_A1_P410__cccc000pd1w0nnnnttttiii
i1011iiii_Test) { |
| 1849 Store2RegisterImmediateOpTester_Strh_Rule_207_A1_P410_ baseline_tester; | 2003 Store2RegisterImm8OpTester_Strh_Rule_207_A1_P410_ baseline_tester; |
| 1850 NamedStrImmediate_Strh_Rule_207_A1_P410 actual; | 2004 NamedStrImmediate_Strh_Rule_207_A1_P410 actual; |
| 1851 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 2005 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1852 a_vs_b_tester.Test("cccc000pd1w0nnnnttttiiii1011iiii"); | 2006 a_vs_b_tester.Test("cccc000pd1w0nnnnttttiiii1011iiii"); |
| 1853 } | 2007 } |
| 1854 | 2008 |
| 1855 TEST_F(Arm32DecoderStateTests, | 2009 TEST_F(Arm32DecoderStateTests, |
| 1856 Store3RegisterDoubleOpTester_Strd_Rule_201_A1_P398__cccc000pd0w0nnnntttt0
0001111mmmm_Test) { | 2010 Store3RegisterDoubleOpTester_Strd_Rule_201_A1_P398__cccc000pd0w0nnnntttt0
0001111mmmm_Test) { |
| 1857 Store3RegisterDoubleOpTester_Strd_Rule_201_A1_P398_ baseline_tester; | 2011 Store3RegisterDoubleOpTester_Strd_Rule_201_A1_P398_ baseline_tester; |
| 1858 NamedStrRegisterDouble_Strd_Rule_201_A1_P398 actual; | 2012 NamedStrRegisterDouble_Strd_Rule_201_A1_P398 actual; |
| 1859 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 2013 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1860 a_vs_b_tester.Test("cccc000pd0w0nnnntttt00001111mmmm"); | 2014 a_vs_b_tester.Test("cccc000pd0w0nnnntttt00001111mmmm"); |
| 1861 } | 2015 } |
| 1862 | 2016 |
| 1863 TEST_F(Arm32DecoderStateTests, | 2017 TEST_F(Arm32DecoderStateTests, |
| 2018 Store3RegisterImm5OpTester_Str_Rule_195_A1_P386__cccc011pd0w0nnnnttttiiii
itt0mmmm_Test) { |
| 2019 Store3RegisterImm5OpTester_Str_Rule_195_A1_P386_ baseline_tester; |
| 2020 NamedStrRegister_Str_Rule_195_A1_P386 actual; |
| 2021 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 2022 a_vs_b_tester.Test("cccc011pd0w0nnnnttttiiiiitt0mmmm"); |
| 2023 } |
| 2024 |
| 2025 TEST_F(Arm32DecoderStateTests, |
| 2026 Store3RegisterImm5OpTester_Strb_Rule_198_A1_P392__cccc011pd1w0nnnnttttiii
iitt0mmmm_Test) { |
| 2027 Store3RegisterImm5OpTester_Strb_Rule_198_A1_P392_ baseline_tester; |
| 2028 NamedStrRegister_Strb_Rule_198_A1_P392 actual; |
| 2029 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 2030 a_vs_b_tester.Test("cccc011pd1w0nnnnttttiiiiitt0mmmm"); |
| 2031 } |
| 2032 |
| 2033 TEST_F(Arm32DecoderStateTests, |
| 1864 Store3RegisterOpTester_Strh_Rule_208_A1_P412__cccc000pd0w0nnnntttt0000101
1mmmm_Test) { | 2034 Store3RegisterOpTester_Strh_Rule_208_A1_P412__cccc000pd0w0nnnntttt0000101
1mmmm_Test) { |
| 1865 Store3RegisterOpTester_Strh_Rule_208_A1_P412_ baseline_tester; | 2035 Store3RegisterOpTester_Strh_Rule_208_A1_P412_ baseline_tester; |
| 1866 NamedStrRegister_Strh_Rule_208_A1_P412 actual; | 2036 NamedStrRegister_Strh_Rule_208_A1_P412 actual; |
| 1867 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 2037 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1868 a_vs_b_tester.Test("cccc000pd0w0nnnntttt00001011mmmm"); | 2038 a_vs_b_tester.Test("cccc000pd0w0nnnntttt00001011mmmm"); |
| 1869 } | 2039 } |
| 1870 | 2040 |
| 1871 TEST_F(Arm32DecoderStateTests, | 2041 TEST_F(Arm32DecoderStateTests, |
| 1872 Unary1RegisterImmediateOpTester_Mov_Rule_96_A2_P_194_RegsNotPc_cccc001100
00iiiiddddIIIIIIIIIIII_Test) { | 2042 Unary1RegisterImmediateOpTester_Mov_Rule_96_A2_P_194_RegsNotPc_cccc001100
00iiiiddddIIIIIIIIIIII_Test) { |
| 1873 Unary1RegisterImmediateOpTester_Mov_Rule_96_A2_P_194_RegsNotPc baseline_tester
; | 2043 Unary1RegisterImmediateOpTester_Mov_Rule_96_A2_P_194_RegsNotPc baseline_tester
; |
| (...skipping 89 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1963 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); | 2133 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester); |
| 1964 a_vs_b_tester.Test("cccc0001111u0000ddddssss0tt1mmmm"); | 2134 a_vs_b_tester.Test("cccc0001111u0000ddddssss0tt1mmmm"); |
| 1965 } | 2135 } |
| 1966 | 2136 |
| 1967 } // namespace nacl_arm_test | 2137 } // namespace nacl_arm_test |
| 1968 | 2138 |
| 1969 int main(int argc, char* argv[]) { | 2139 int main(int argc, char* argv[]) { |
| 1970 testing::InitGoogleTest(&argc, argv); | 2140 testing::InitGoogleTest(&argc, argv); |
| 1971 return RUN_ALL_TESTS(); | 2141 return RUN_ALL_TESTS(); |
| 1972 } | 2142 } |
| OLD | NEW |