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| 1 /* | 1 /* |
| 2 * Copyright 2012 The Native Client Authors. All rights reserved. | 2 * Copyright 2012 The Native Client Authors. All rights reserved. |
| 3 * Use of this source code is governed by a BSD-style license that can | 3 * Use of this source code is governed by a BSD-style license that can |
| 4 * be found in the LICENSE file. | 4 * be found in the LICENSE file. |
| 5 */ | 5 */ |
| 6 | 6 |
| 7 // DO NOT EDIT: GENERATED CODE | 7 // DO NOT EDIT: GENERATED CODE |
| 8 | 8 |
| 9 | 9 |
| 10 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_GEN_ARM32_DECODE_H_ | 10 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_GEN_ARM32_DECODE_H_ |
| (...skipping 146 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 157 const DontCareInstRnRsRmNotPc DontCareInstRnRsRmNotPc_instance_; | 157 const DontCareInstRnRsRmNotPc DontCareInstRnRsRmNotPc_instance_; |
| 158 const EffectiveNoOp EffectiveNoOp_instance_; | 158 const EffectiveNoOp EffectiveNoOp_instance_; |
| 159 const Forbidden Forbidden_instance_; | 159 const Forbidden Forbidden_instance_; |
| 160 const LdrImmediate LdrImmediate_instance_; | 160 const LdrImmediate LdrImmediate_instance_; |
| 161 const LdrImmediateDouble LdrImmediateDouble_instance_; | 161 const LdrImmediateDouble LdrImmediateDouble_instance_; |
| 162 const LdrRegister LdrRegister_instance_; | 162 const LdrRegister LdrRegister_instance_; |
| 163 const LdrRegisterDouble LdrRegisterDouble_instance_; | 163 const LdrRegisterDouble LdrRegisterDouble_instance_; |
| 164 const LoadCoprocessor LoadCoprocessor_instance_; | 164 const LoadCoprocessor LoadCoprocessor_instance_; |
| 165 const LoadDoubleExclusive LoadDoubleExclusive_instance_; | 165 const LoadDoubleExclusive LoadDoubleExclusive_instance_; |
| 166 const LoadExclusive LoadExclusive_instance_; | 166 const LoadExclusive LoadExclusive_instance_; |
| 167 const LoadImmediate LoadImmediate_instance_; | |
| 168 const LoadMultiple LoadMultiple_instance_; | 167 const LoadMultiple LoadMultiple_instance_; |
| 169 const LoadRegister LoadRegister_instance_; | |
| 170 const LongMultiply LongMultiply_instance_; | 168 const LongMultiply LongMultiply_instance_; |
| 171 const MaskAddress MaskAddress_instance_; | 169 const MaskAddress MaskAddress_instance_; |
| 172 const MoveDoubleFromCoprocessor MoveDoubleFromCoprocessor_instance_; | 170 const MoveDoubleFromCoprocessor MoveDoubleFromCoprocessor_instance_; |
| 173 const MoveFromCoprocessor MoveFromCoprocessor_instance_; | 171 const MoveFromCoprocessor MoveFromCoprocessor_instance_; |
| 174 const MoveToStatusRegister MoveToStatusRegister_instance_; | 172 const MoveToStatusRegister MoveToStatusRegister_instance_; |
| 175 const Multiply Multiply_instance_; | 173 const Multiply Multiply_instance_; |
| 176 const PackSatRev PackSatRev_instance_; | 174 const PackSatRev PackSatRev_instance_; |
| 177 const Roadblock Roadblock_instance_; | 175 const Roadblock Roadblock_instance_; |
| 178 const SatAddSub SatAddSub_instance_; | 176 const SatAddSub SatAddSub_instance_; |
| 179 const StoreCoprocessor StoreCoprocessor_instance_; | 177 const StoreCoprocessor StoreCoprocessor_instance_; |
| 180 const StoreExclusive StoreExclusive_instance_; | 178 const StoreExclusive StoreExclusive_instance_; |
| 181 const StoreImmediate StoreImmediate_instance_; | 179 const StoreImmediate StoreImmediate_instance_; |
| 182 const StoreRegister StoreRegister_instance_; | |
| 183 const StrImmediate StrImmediate_instance_; | 180 const StrImmediate StrImmediate_instance_; |
| 184 const StrImmediateDouble StrImmediateDouble_instance_; | 181 const StrImmediateDouble StrImmediateDouble_instance_; |
| 185 const StrRegister StrRegister_instance_; | 182 const StrRegister StrRegister_instance_; |
| 186 const StrRegisterDouble StrRegisterDouble_instance_; | 183 const StrRegisterDouble StrRegisterDouble_instance_; |
| 187 const TestIfAddressMasked TestIfAddressMasked_instance_; | 184 const TestIfAddressMasked TestIfAddressMasked_instance_; |
| 188 const Unary1RegisterBitRange Unary1RegisterBitRange_instance_; | 185 const Unary1RegisterBitRange Unary1RegisterBitRange_instance_; |
| 189 const Unary1RegisterImmediateOp Unary1RegisterImmediateOp_instance_; | 186 const Unary1RegisterImmediateOp Unary1RegisterImmediateOp_instance_; |
| 190 const Undefined Undefined_instance_; | 187 const Undefined Undefined_instance_; |
| 191 const Unpredictable Unpredictable_instance_; | 188 const Unpredictable Unpredictable_instance_; |
| 192 const VectorLoad VectorLoad_instance_; | 189 const VectorLoad VectorLoad_instance_; |
| 193 const VectorStore VectorStore_instance_; | 190 const VectorStore VectorStore_instance_; |
| 194 }; | 191 }; |
| 195 | 192 |
| 196 } // namespace nacl_arm_dec | 193 } // namespace nacl_arm_dec |
| 197 #endif // NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_GEN_ARM32_DECODE_H_ | 194 #endif // NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_GEN_ARM32_DECODE_H_ |
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