Clean up testing of instructions. Allow testing to quit if test pattern tests

src/trusted/validator_arm/gen/arm32_decode.cc

Index: src/trusted/validator_arm/gen/arm32_decode.cc
===================================================================
--- src/trusted/validator_arm/gen/arm32_decode.cc	(revision 8517)
+++ src/trusted/validator_arm/gen/arm32_decode.cc	(working copy)
@@ -17,6 +17,7 @@
 Arm32DecoderState::Arm32DecoderState() : DecoderState()
   , Binary2RegisterImmedShiftedTest_instance_()
   , Binary3RegisterImmedShiftedOp_instance_()
+  , Binary3RegisterImmedShiftedOpRnNotSp_instance_()
   , Binary3RegisterOp_instance_()
   , Binary3RegisterShiftedTest_instance_()
   , Binary4RegisterShiftedOp_instance_()
@@ -259,6 +260,26 @@
      const Instruction insn) const
 {
   UNREFERENCED_PARAMETER(insn);
+  if ((insn & 0x01E00000) == 0x00400000 /* op1(24:20) == 0010x */ &&
+      true &&
+      true)
+    return Binary3RegisterImmedShiftedOpRnNotSp_instance_;
+
+  if ((insn & 0x01E00000) == 0x00800000 /* op1(24:20) == 0100x */ &&
+      true &&
+      true)
+    return Binary3RegisterImmedShiftedOpRnNotSp_instance_;
+
+  if ((insn & 0x01E00000) == 0x00A00000 /* op1(24:20) == 0101x */ &&
+      true &&
+      true)
+    return Binary3RegisterImmedShiftedOp_instance_;
+
+  if ((insn & 0x01E00000) == 0x01800000 /* op1(24:20) == 1100x */ &&
+      true &&
+      true)
+    return Binary3RegisterImmedShiftedOp_instance_;
+
   if ((insn & 0x01E00000) == 0x01A00000 /* op1(24:20) == 1101x */ &&
       (insn & 0x00000F80) != 0x00000000 /* op2(11:7) == ~00000 */ &&
       (insn & 0x00000060) == 0x00000000 /* op3(6:5) == 00 */)
@@ -294,19 +315,24 @@
       true)
     return Unary2RegisterImmedShiftedOp_instance_;
 
-  if ((insn & 0x01900000) == 0x01100000 /* op1(24:20) == 10xx1 */ &&
+  if ((insn & 0x00E00000) == 0x00C00000 /* op1(24:20) == x110x */ &&
       true &&
       true)
-    return Binary2RegisterImmedShiftedTest_instance_;
+    return Binary3RegisterImmedShiftedOp_instance_;
 
-  if ((insn & 0x01A00000) == 0x01800000 /* op1(24:20) == 11x0x */ &&
+  if ((insn & 0x01600000) == 0x00600000 /* op1(24:20) == 0x11x */ &&
       true &&
       true)
     return Binary3RegisterImmedShiftedOp_instance_;
 
-  if ((insn & 0x01000000) == 0x00000000 /* op1(24:20) == 0xxxx */ &&
+  if ((insn & 0x01900000) == 0x01100000 /* op1(24:20) == 10xx1 */ &&
       true &&
       true)
+    return Binary2RegisterImmedShiftedTest_instance_;
+
+  if ((insn & 0x01C00000) == 0x00000000 /* op1(24:20) == 000xx */ &&
+      true &&
+      true)
     return Binary3RegisterImmedShiftedOp_instance_;
 
   // Catch any attempt to fall though ...