src/trusted/validator_arm/gen/arm32_decode_named_decoder.h - Issue 10381030: Clean up testing of instructions. Allow testing to quit if test pattern tests

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Unified Diff: src/trusted/validator_arm/gen/arm32_decode_named_decoder.h

Issue 10381030: Clean up testing of instructions. Allow testing to quit if test pattern tests (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/

Patch Set: Created 8 years, 7 months ago

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« src/trusted/validator_arm/actual_classes.h ('K') | « src/trusted/validator_arm/gen/arm32_decode_named_classes.h ('k') | src/trusted/validator_arm/gen/arm32_decode_tests.cc » ('j') | no next file with comments »
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Index: src/trusted/validator_arm/gen/arm32_decode_named_decoder.h

===================================================================

--- src/trusted/validator_arm/gen/arm32_decode_named_decoder.h (revision 8506)

+++ src/trusted/validator_arm/gen/arm32_decode_named_decoder.h (working copy)

@@ -47,7 +47,6 @@

const NamedBinary2RegisterImmedShiftedTest_Teq_Rule_228_A1_P450 Binary2RegisterImmedShiftedTest_Teq_Rule_228_A1_P450_instance_;

const NamedBinary2RegisterImmedShiftedTest_Tst_Rule_231_A1_P456 Binary2RegisterImmedShiftedTest_Tst_Rule_231_A1_P456_instance_;

const NamedBinary3RegisterImmedShiftedOp_Adc_Rule_2_A1_P16 Binary3RegisterImmedShiftedOp_Adc_Rule_2_A1_P16_instance_;

- const NamedBinary3RegisterImmedShiftedOp_Add_Rule_6_A1_P24 Binary3RegisterImmedShiftedOp_Add_Rule_6_A1_P24_instance_;

const NamedBinary3RegisterImmedShiftedOp_And_Rule_7_A1_P36 Binary3RegisterImmedShiftedOp_And_Rule_7_A1_P36_instance_;

const NamedBinary3RegisterImmedShiftedOp_Bic_Rule_20_A1_P52 Binary3RegisterImmedShiftedOp_Bic_Rule_20_A1_P52_instance_;

const NamedBinary3RegisterImmedShiftedOp_Eor_Rule_45_A1_P96 Binary3RegisterImmedShiftedOp_Eor_Rule_45_A1_P96_instance_;

@@ -55,7 +54,8 @@

const NamedBinary3RegisterImmedShiftedOp_Rsb_Rule_143_P286 Binary3RegisterImmedShiftedOp_Rsb_Rule_143_P286_instance_;

const NamedBinary3RegisterImmedShiftedOp_Rsc_Rule_146_A1_P292 Binary3RegisterImmedShiftedOp_Rsc_Rule_146_A1_P292_instance_;

const NamedBinary3RegisterImmedShiftedOp_Sbc_Rule_152_A1_P304 Binary3RegisterImmedShiftedOp_Sbc_Rule_152_A1_P304_instance_;

- const NamedBinary3RegisterImmedShiftedOp_SubRule_213_A1_P422 Binary3RegisterImmedShiftedOp_SubRule_213_A1_P422_instance_;

+ const NamedBinary3RegisterImmedShiftedOpRnNotSp_Add_Rule_6_A1_P24 Binary3RegisterImmedShiftedOpRnNotSp_Add_Rule_6_A1_P24_instance_;

+ const NamedBinary3RegisterImmedShiftedOpRnNotSp_SubRule_213_A1_P422 Binary3RegisterImmedShiftedOpRnNotSp_SubRule_213_A1_P422_instance_;

const NamedBinary3RegisterOp_Asr_Rule_15_A1_P42 Binary3RegisterOp_Asr_Rule_15_A1_P42_instance_;

const NamedBinary3RegisterOp_Lsl_Rule_89_A1_P180 Binary3RegisterOp_Lsl_Rule_89_A1_P180_instance_;

const NamedBinary3RegisterOp_Lsr_Rule_91_A1_P184 Binary3RegisterOp_Lsr_Rule_91_A1_P184_instance_;