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| 1 /* | 1 /* |
| 2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. | 2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. |
| 3 * Use of this source code is governed by a BSD-style license that can be | 3 * Use of this source code is governed by a BSD-style license that can be |
| 4 * found in the LICENSE file. | 4 * found in the LICENSE file. |
| 5 */ | 5 */ |
| 6 | 6 |
| 7 #include "native_client/src/trusted/validator_arm/actual_classes.h" | 7 #include "native_client/src/trusted/validator_arm/actual_classes.h" |
| 8 | 8 |
| 9 #include <assert.h> | 9 #include <assert.h> |
| 10 #include <string.h> | 10 #include <string.h> |
| 11 | 11 |
| 12 // Implementations of instruction classes, for those not completely defined in | 12 // Implementations of instruction classes, for those not completely defined in |
| 13 // in the header. | 13 // in the header. |
| 14 | 14 |
| 15 namespace nacl_arm_dec { | 15 namespace nacl_arm_dec { |
| 16 | 16 |
| 17 // ************************************************************** | 17 // ************************************************************** |
| 18 // N E W C L A S S D E C O D E R S | 18 // N E W C L A S S D E C O D E R S |
| 19 // ************************************************************** | 19 // ************************************************************** |
| 20 | 20 |
| 21 // Data processing and arithmetic | 21 // Defs12To15 |
| 22 SafetyLevel Defs12To15::safety(const Instruction i) const { | 22 SafetyLevel Defs12To15::safety(const Instruction i) const { |
| 23 if (defs(i)[kRegisterPc]) { | 23 if (defs(i)[kRegisterPc]) { |
| 24 return FORBIDDEN_OPERANDS; | 24 return FORBIDDEN_OPERANDS; |
| 25 } | 25 } |
| 26 return MAY_BE_SAFE; | 26 return MAY_BE_SAFE; |
| 27 } | 27 } |
| 28 | 28 |
| 29 RegisterList Defs12To15::defs(const Instruction i) const { | 29 RegisterList Defs12To15::defs(const Instruction i) const { |
| 30 return d.reg(i) + flags.reg_if_updated(i); | 30 return d.reg(i) + conditions.conds_if_updated(i); |
| 31 } | 31 } |
| 32 | 32 |
| 33 SafetyLevel Defs12To15RdRnRsRmNotPc::safety(const Instruction i) const { | 33 SafetyLevel Defs12To15RdRnRsRmNotPc::safety(const Instruction i) const { |
| 34 if ((d.reg(i) + n.reg(i) + s.reg(i) + m.reg(i))[kRegisterPc]) | 34 if ((d.reg(i) + n.reg(i) + s.reg(i) + m.reg(i))[kRegisterPc]) |
| 35 return UNPREDICTABLE; | 35 return UNPREDICTABLE; |
| 36 | 36 |
| 37 // Note: We would restrict out PC as well for Rd in NaCl, but no need | 37 // Note: We would restrict out PC as well for Rd in NaCl, but no need |
| 38 // since the ARM restriction doesn't allow it anyway. | 38 // since the ARM restriction doesn't allow it anyway. |
| 39 return MAY_BE_SAFE; | 39 return MAY_BE_SAFE; |
| 40 } | 40 } |
| (...skipping 12 matching lines...) Expand all Loading... |
| 53 | 53 |
| 54 // Data processing and arithmetic | 54 // Data processing and arithmetic |
| 55 SafetyLevel DataProc::safety(const Instruction i) const { | 55 SafetyLevel DataProc::safety(const Instruction i) const { |
| 56 if (defs(i)[kRegisterPc]) { | 56 if (defs(i)[kRegisterPc]) { |
| 57 return FORBIDDEN_OPERANDS; | 57 return FORBIDDEN_OPERANDS; |
| 58 } | 58 } |
| 59 return MAY_BE_SAFE; | 59 return MAY_BE_SAFE; |
| 60 } | 60 } |
| 61 | 61 |
| 62 RegisterList DataProc::defs(const Instruction i) const { | 62 RegisterList DataProc::defs(const Instruction i) const { |
| 63 return Rd(i) + (UpdatesFlagsRegister(i) ? kRegisterFlags : kRegisterNone); | 63 return Rd(i) + (UpdatesConditions(i) ? kConditions : kRegisterNone); |
| 64 } | 64 } |
| 65 | 65 |
| 66 RegisterList Test::defs(const Instruction i) const { | 66 RegisterList Test::defs(const Instruction i) const { |
| 67 return (UpdatesFlagsRegister(i) ? kRegisterFlags : kRegisterNone); | 67 return (UpdatesConditions(i) ? kConditions : kRegisterNone); |
| 68 } | 68 } |
| 69 | 69 |
| 70 | 70 |
| 71 bool TestImmediate::sets_Z_if_bits_clear(Instruction i, | 71 bool TestImmediate::sets_Z_if_bits_clear(Instruction i, |
| 72 Register r, | 72 Register r, |
| 73 uint32_t mask) const { | 73 uint32_t mask) const { |
| 74 // Rn = 19:16 for TST(immediate) - section A8.6.230 | 74 // Rn = 19:16 for TST(immediate) - section A8.6.230 |
| 75 return Rn(i) == r | 75 return Rn(i) == r |
| 76 && (imm12.get_modified_immediate(i) & mask) == mask | 76 && (imm12.get_modified_immediate(i) & mask) == mask |
| 77 && defs(i)[kRegisterFlags]; | 77 && defs(i)[kConditions]; |
| 78 } | 78 } |
| 79 | 79 |
| 80 | 80 |
| 81 bool ImmediateBic::clears_bits(const Instruction i, uint32_t mask) const { | 81 bool ImmediateBic::clears_bits(const Instruction i, uint32_t mask) const { |
| 82 return (imm12.get_modified_immediate(i) & mask) == mask; | 82 return (imm12.get_modified_immediate(i) & mask) == mask; |
| 83 } | 83 } |
| 84 | 84 |
| 85 | 85 |
| 86 SafetyLevel PackSatRev::safety(const Instruction i) const { | 86 SafetyLevel PackSatRev::safety(const Instruction i) const { |
| 87 if (defs(i)[kRegisterPc]) { | 87 if (defs(i)[kRegisterPc]) { |
| 88 return FORBIDDEN_OPERANDS; | 88 return FORBIDDEN_OPERANDS; |
| 89 } | 89 } |
| 90 return MAY_BE_SAFE; | 90 return MAY_BE_SAFE; |
| 91 } | 91 } |
| 92 | 92 |
| 93 RegisterList PackSatRev::defs(const Instruction i) const { | 93 RegisterList PackSatRev::defs(const Instruction i) const { |
| 94 return Rd(i) + kRegisterFlags; | 94 return Rd(i) + kConditions; |
| 95 } | 95 } |
| 96 | 96 |
| 97 | 97 |
| 98 SafetyLevel Multiply::safety(const Instruction i) const { | 98 SafetyLevel Multiply::safety(const Instruction i) const { |
| 99 if (defs(i)[kRegisterPc]) { | 99 if (defs(i)[kRegisterPc]) { |
| 100 return FORBIDDEN_OPERANDS; | 100 return FORBIDDEN_OPERANDS; |
| 101 } | 101 } |
| 102 return MAY_BE_SAFE; | 102 return MAY_BE_SAFE; |
| 103 } | 103 } |
| 104 | 104 |
| 105 RegisterList Multiply::defs(const Instruction i) const { | 105 RegisterList Multiply::defs(const Instruction i) const { |
| 106 return kRegisterFlags + Rd(i); | 106 return kConditions + Rd(i); |
| 107 } | 107 } |
| 108 | 108 |
| 109 | 109 |
| 110 RegisterList LongMultiply::defs(const Instruction i) const { | 110 RegisterList LongMultiply::defs(const Instruction i) const { |
| 111 return RdHi(i) + RdLo(i); | 111 return RdHi(i) + RdLo(i); |
| 112 } | 112 } |
| 113 | 113 |
| 114 | 114 |
| 115 RegisterList SatAddSub::defs(const Instruction i) const { | 115 RegisterList SatAddSub::defs(const Instruction i) const { |
| 116 return DataProc::defs(i) + kRegisterFlags; | 116 return DataProc::defs(i) + kConditions; |
| 117 } | 117 } |
| 118 | 118 |
| 119 | 119 |
| 120 // MSR | 120 // MSR |
| 121 | 121 |
| 122 RegisterList MoveToStatusRegister::defs(const Instruction i) const { | 122 RegisterList MoveToStatusRegister::defs(const Instruction i) const { |
| 123 UNREFERENCED_PARAMETER(i); | 123 UNREFERENCED_PARAMETER(i); |
| 124 return kRegisterFlags; | 124 return kConditions; |
| 125 } | 125 } |
| 126 | 126 |
| 127 | 127 |
| 128 // Stores | 128 // Stores |
| 129 | 129 |
| 130 SafetyLevel StoreImmediate::safety(const Instruction i) const { | 130 SafetyLevel StoreImmediate::safety(const Instruction i) const { |
| 131 // Don't let addressing writeback alter PC. | 131 // Don't let addressing writeback alter PC. |
| 132 if (defs(i)[kRegisterPc]) return FORBIDDEN_OPERANDS; | 132 if (defs(i)[kRegisterPc]) return FORBIDDEN_OPERANDS; |
| 133 | 133 |
| 134 return MAY_BE_SAFE; | 134 return MAY_BE_SAFE; |
| (...skipping 326 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 461 return kRegisterPc + (PreindexingFlag(i) ? kRegisterLink : kRegisterNone); | 461 return kRegisterPc + (PreindexingFlag(i) ? kRegisterLink : kRegisterNone); |
| 462 } | 462 } |
| 463 | 463 |
| 464 int32_t Branch::branch_target_offset(const Instruction i) const { | 464 int32_t Branch::branch_target_offset(const Instruction i) const { |
| 465 // Sign extend and shift left 2: | 465 // Sign extend and shift left 2: |
| 466 int32_t offset = (int32_t)(i.bits(23, 0) << 8) >> 6; | 466 int32_t offset = (int32_t)(i.bits(23, 0) << 8) >> 6; |
| 467 return offset + 8; // because r15 reads as 8 bytes ahead | 467 return offset + 8; // because r15 reads as 8 bytes ahead |
| 468 } | 468 } |
| 469 | 469 |
| 470 } // namespace | 470 } // namespace |
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