Index: src/mips/code-stubs-mips.cc |
diff --git a/src/mips/code-stubs-mips.cc b/src/mips/code-stubs-mips.cc |
index bd353d98c8728aa046b5089d27dab407167b8e65..f3dd95b851453cff69a738b4d7fc52cf0ff89461 100644 |
--- a/src/mips/code-stubs-mips.cc |
+++ b/src/mips/code-stubs-mips.cc |
@@ -2754,7 +2754,6 @@ void BinaryOpStub::GenerateSmiCode( |
Register left = a1; |
Register right = a0; |
Register scratch1 = t3; |
- Register scratch2 = t5; |
// Perform combined smi check on both operands. |
__ Or(scratch1, left, Operand(right)); |
@@ -3459,7 +3458,6 @@ void TranscendentalCacheStub::Generate(MacroAssembler* masm) { |
Label no_update; |
Label skip_cache; |
- const Register heap_number_map = t2; |
// Call C function to calculate the result and update the cache. |
// Register a0 holds precalculated cache entry address; preserve |