Chromium Code Reviews| Index: src/mips/assembler-mips.cc |
| =================================================================== |
| --- src/mips/assembler-mips.cc (revision 11280) |
| +++ src/mips/assembler-mips.cc (working copy) |
| @@ -2137,6 +2137,21 @@ |
| } |
| +#define MIPS_QNAN_HI 0x7ff7ffff |
| +#define MIPS_QNAN_LO 0xffffffff |
| + |
| + |
| +void Assembler::QuietNaN(HeapObject* object) { |
| + // Mips has a different encoding of qNaN than ia32, so any heap NaN built |
| + // with simulator must be re-encoded for the snapshot. Performance hit not |
| + // critical at mksnapshot/build time. |
| + uint64_t mips_qnan_bits = |
| + (static_cast<uint64_t>(MIPS_QNAN_HI) << 32) | MIPS_QNAN_LO; |
| + Address value_ptr = object->address() + HeapNumber::kValueOffset; |
|
Vyacheslav Egorov (Chromium)
2012/04/12 09:22:05
please comment why accessors do not work.
|
| + memcpy(value_ptr, &mips_qnan_bits, sizeof(mips_qnan_bits)); |
| +} |
| + |
| + |
| // On Mips, a target address is stored in a lui/ori instruction pair, each |
| // of which load 16 bits of the 32-bit address to a register. |
| // Patching the address must replace both instr, and flush the i-cache. |