MIPS: NaNs in the snapshot should be quiet according

src/mips/assembler-mips.cc

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 2119 matching lines @@
     return reinterpret_cast<Address>(
         (GetImmediate16(instr1) << 16) | GetImmediate16(instr2));
   }
 
   // We should never get here, force a bad address if we do.
   UNREACHABLE();
   return (Address)0x0;
 }
 
 
+#define MIPS_QNAN_HI 0x7ff7ffff
+#define MIPS_QNAN_LO 0xffffffff
+
+
+void Assembler::QuietNaN(HeapObject* object) {
+  // Mips has a different encoding of qNaN than ia32, so any heap NaN built
+  // with simulator must be re-encoded for the snapshot. Performance hit not
+  // critical at mksnapshot/build time.
+  uint64_t mips_qnan_bits =
+      (static_cast<uint64_t>(MIPS_QNAN_HI) << 32) | MIPS_QNAN_LO;
+  Address value_ptr = object->address() + HeapNumber::kValueOffset;

[Vyacheslav Egorov (Chromium), 2012/04/12 09:22:05]

please comment why accessors do not work.

+  memcpy(value_ptr, &mips_qnan_bits, sizeof(mips_qnan_bits));
+}
+
+
 // On Mips, a target address is stored in a lui/ori instruction pair, each
 // of which load 16 bits of the 32-bit address to a register.
 // Patching the address must replace both instr, and flush the i-cache.
 //
 // There is an optimization below, which emits a nop when the address
 // fits in just 16 bits. This is unlikely to help, and should be benchmarked,
 // and possibly removed.
 void Assembler::set_target_address_at(Address pc, Address target) {
   Instr instr2 = instr_at(pc + kInstrSize);
   uint32_t rt_code = GetRtField(instr2);
@@ skipping 120 matching lines @@
   }
 
   if (patched) {
       CPU::FlushICache(pc+2, sizeof(Address));
   }
 }
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS