Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(648)

Side by Side Diff: src/trusted/validator_ragel/unreviewed/decoder.h

Issue 10031039: Add ragel validator to SCONS (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/
Patch Set: Created 8 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
OLDNEW
1 /* 1 /*
2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. 2 * Copyright (c) 2012 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be 3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file. 4 * found in the LICENSE file.
5 */ 5 */
6 6
7 #ifndef _DECODER_X86_64_H_ 7 #ifndef _DECODER_X86_64_H_
8 #define _DECODER_X86_64_H_ 8 #define _DECODER_X86_64_H_
9 9
10 #include <inttypes.h> 10 #include "native_client/src/shared/utils/types.h"
11 #include "native_client/src/include/portability.h"
11 12
12 #ifdef __cplusplus 13 #ifdef __cplusplus
13 extern "C" { 14 extern "C" {
14 #endif 15 #endif
15 16
16 enum operand_type { 17 enum operand_type {
17 OperandSize2bit, /* See VPERMIL2Px instruction for description. */ 18 OperandSize2bit, /* See VPERMIL2Px instruction for description. */
18 OperandSize8bit, 19 OperandSize8bit,
19 OperandSize16bit, 20 OperandSize16bit,
20 OperandSize32bit, 21 OperandSize32bit,
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after
62 REG_R15, 63 REG_R15,
63 REG_RM, /* Address in memory via rm field. */ 64 REG_RM, /* Address in memory via rm field. */
64 REG_RIP, /* RIP - used as base in x86-64 mode. */ 65 REG_RIP, /* RIP - used as base in x86-64 mode. */
65 REG_RIZ, /* EIZ/RIZ - used as "always zero index" register. */ 66 REG_RIZ, /* EIZ/RIZ - used as "always zero index" register. */
66 REG_IMM, /* Fixed value in imm field. */ 67 REG_IMM, /* Fixed value in imm field. */
67 REG_IMM2, /* Fixed value in second imm field. */ 68 REG_IMM2, /* Fixed value in second imm field. */
68 REG_DS_RBX, /* Fox xlat: %ds(%rbx). */ 69 REG_DS_RBX, /* Fox xlat: %ds(%rbx). */
69 REG_ES_RDI, /* For string instructions: %es:(%rsi). */ 70 REG_ES_RDI, /* For string instructions: %es:(%rsi). */
70 REG_DS_RSI, /* For string instructions: %ds:(%rdi). */ 71 REG_DS_RSI, /* For string instructions: %ds:(%rdi). */
71 REG_PORT_DX, /* 16-bit DX: for in/out instructions. */ 72 REG_PORT_DX, /* 16-bit DX: for in/out instructions. */
72 REG_NONE, /* For modrm: both index and base can be absent. */ 73 NO_REG, /* For modrm: both index and base can be absent. */
73 REG_ST, /* For x87 instructions: implicit %st. */ 74 REG_ST, /* For x87 instructions: implicit %st. */
74 JMP_TO /* Operand is jump target address: usually %rip+offset. */ 75 JMP_TO /* Operand is jump target address: usually %rip+offset. */
75 }; 76 };
76 77
77 struct instruction { 78 struct instruction {
78 const char *name; 79 const char *name;
79 unsigned char operands_count; 80 unsigned char operands_count;
80 struct { 81 struct {
81 unsigned char rex; /* Mostly to distingush cases like %ah vs %spl. */ 82 unsigned char rex; /* Mostly to distingush cases like %ah vs %spl. */
83 #ifdef _MSC_VER
84 Bool data16:1; /* "Normal", non-rex prefixes. */
85 Bool lock:1;
86 Bool repnz:1;
87 Bool repz:1;
88 Bool branch_not_taken:1;
89 Bool branch_taken:1;
90 #else
82 _Bool data16:1; /* "Normal", non-rex prefixes. */ 91 _Bool data16:1; /* "Normal", non-rex prefixes. */
83 _Bool lock:1; 92 _Bool lock:1;
84 _Bool repnz:1; 93 _Bool repnz:1;
85 _Bool repz:1; 94 _Bool repz:1;
86 _Bool branch_not_taken:1; 95 _Bool branch_not_taken:1;
87 _Bool branch_taken:1; 96 _Bool branch_taken:1;
97 #endif
88 } prefix; 98 } prefix;
89 struct { 99 struct {
90 enum register_name name; 100 enum register_name name;
91 enum operand_type type; 101 enum operand_type type;
92 } operands[5]; 102 } operands[5];
93 struct { 103 struct {
94 enum register_name base; 104 enum register_name base;
95 enum register_name index; 105 enum register_name index;
96 int scale; 106 int scale;
97 uint64_t offset; 107 uint64_t offset;
(...skipping 14 matching lines...) Expand all
112 122
113 int DecodeChunkIA32(const uint8_t *data, size_t size, 123 int DecodeChunkIA32(const uint8_t *data, size_t size,
114 process_instruction_func process_instruction, 124 process_instruction_func process_instruction,
115 process_error_func process_error, void *userdata); 125 process_error_func process_error, void *userdata);
116 126
117 #ifdef __cplusplus 127 #ifdef __cplusplus
118 } 128 }
119 #endif 129 #endif
120 130
121 #endif 131 #endif
OLDNEW
« no previous file with comments | « src/trusted/validator_ragel/unreviewed/Makefile ('k') | src/trusted/validator_ragel/unreviewed/decoder-test.c » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698