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Side by Side Diff: src/trusted/validator_ragel/unreviewed/decoder.h

Issue 9968039: Add ragel machine generators to SCONS (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/
Patch Set: Created 8 years, 8 months ago
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1 /* 1 /*
2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. 2 * Copyright (c) 2011 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be 3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file. 4 * found in the LICENSE file.
5 */ 5 */
6 6
7 #ifndef _DECODER_X86_64_H_ 7 #ifndef _DECODER_X86_64_H_
8 #define _DECODER_X86_64_H_ 8 #define _DECODER_X86_64_H_
9 9
10 #include <inttypes.h> 10 #include "native_client/src/include/portability.h"
11
12 /*
13 * Microsoft C/C++ version 14.00.50727.762, which comes with Visual C++ 2005,
14 * and version 15.00.30729.01, which comes with Visual C++ 2008, do not.
15 * define _Bool.
16 */
17 #if defined(_MSC_VER) && _MSC_VER <= 1500
18 typedef int _Bool;
pasko-google - do not use 2012/04/05 14:16:38 The convention in other validator sources seems to
khim 2012/04/05 16:38:43 Oh yeah. I especially love how Bool is unusable on
19 #endif
11 20
12 #ifdef __cplusplus 21 #ifdef __cplusplus
13 extern "C" { 22 extern "C" {
14 #endif 23 #endif
15 24
16 enum operand_type { 25 enum operand_type {
17 OperandSize2bit, /* See VPERMIL2Px instruction for description. */ 26 OperandSize2bit, /* See VPERMIL2Px instruction for description. */
18 OperandSize8bit, 27 OperandSize8bit,
19 OperandSize16bit, 28 OperandSize16bit,
20 OperandSize32bit, 29 OperandSize32bit,
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after
62 REG_R15, 71 REG_R15,
63 REG_RM, /* Address in memory via rm field. */ 72 REG_RM, /* Address in memory via rm field. */
64 REG_RIP, /* RIP - used as base in x86-64 mode. */ 73 REG_RIP, /* RIP - used as base in x86-64 mode. */
65 REG_RIZ, /* EIZ/RIZ - used as "always zero index" register. */ 74 REG_RIZ, /* EIZ/RIZ - used as "always zero index" register. */
66 REG_IMM, /* Fixed value in imm field. */ 75 REG_IMM, /* Fixed value in imm field. */
67 REG_IMM2, /* Fixed value in second imm field. */ 76 REG_IMM2, /* Fixed value in second imm field. */
68 REG_DS_RBX, /* Fox xlat: %ds(%rbx). */ 77 REG_DS_RBX, /* Fox xlat: %ds(%rbx). */
69 REG_ES_RDI, /* For string instructions: %es:(%rsi). */ 78 REG_ES_RDI, /* For string instructions: %es:(%rsi). */
70 REG_DS_RSI, /* For string instructions: %ds:(%rdi). */ 79 REG_DS_RSI, /* For string instructions: %ds:(%rdi). */
71 REG_PORT_DX, /* 16-bit DX: for in/out instructions. */ 80 REG_PORT_DX, /* 16-bit DX: for in/out instructions. */
72 REG_NONE, /* For modrm: both index and base can be absent. */ 81 NO_REG, /* For modrm: both index and base can be absent. */
73 REG_ST, /* For x87 instructions: implicit %st. */ 82 REG_ST, /* For x87 instructions: implicit %st. */
74 JMP_TO /* Operand is jump target address: usually %rip+offset. */ 83 JMP_TO /* Operand is jump target address: usually %rip+offset. */
75 }; 84 };
76 85
77 struct instruction { 86 struct instruction {
78 const char *name; 87 const char *name;
79 unsigned char operands_count; 88 unsigned char operands_count;
80 struct { 89 struct {
81 unsigned char rex; /* Mostly to distingush cases like %ah vs %spl. */ 90 unsigned char rex; /* Mostly to distingush cases like %ah vs %spl. */
82 _Bool data16:1; /* "Normal", non-rex prefixes. */ 91 _Bool data16:1; /* "Normal", non-rex prefixes. */
(...skipping 29 matching lines...) Expand all
112 121
113 int DecodeChunkIA32(const uint8_t *data, size_t size, 122 int DecodeChunkIA32(const uint8_t *data, size_t size,
114 process_instruction_func process_instruction, 123 process_instruction_func process_instruction,
115 process_error_func process_error, void *userdata); 124 process_error_func process_error, void *userdata);
116 125
117 #ifdef __cplusplus 126 #ifdef __cplusplus
118 } 127 }
119 #endif 128 #endif
120 129
121 #endif 130 #endif
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