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Side by Side Diff: src/trusted/validator_arm/gen/arm32_decode_named.cc

Issue 9960043: Finish separation of testing from sel_ldr validation. Also, automate (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/
Patch Set: Created 8 years, 8 months ago
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1 /* 1 /*
2 * Copyright 2012 The Native Client Authors. All rights reserved. 2 * Copyright 2012 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can 3 * Use of this source code is governed by a BSD-style license that can
4 * be found in the LICENSE file. 4 * be found in the LICENSE file.
5 */ 5 */
6 6
7 /* 7 /*
8 * DO NOT EDIT: GENERATED CODE 8 * DO NOT EDIT: GENERATED CODE
9 */ 9 */
10 10
11 #ifndef NACL_TRUSTED_BUT_NOT_TCB
12 #error("This file is not meant for use in the TCB")
13 #endif
14
11 #include "native_client/src/trusted/validator_arm/gen/arm32_decode_named.h" 15 #include "native_client/src/trusted/validator_arm/gen/arm32_decode_named.h"
12 16
13 #include <stdio.h> 17 #include <stdio.h>
14 18
15 namespace nacl_arm_dec { 19 using nacl_arm_dec::ClassDecoder;
16 20 using nacl_arm_dec::Instruction;
17 const char* NamedCoprocessorOp::name() const { 21
18 return "CoprocessorOp"; 22 namespace nacl_arm_test {
19 } 23
20 24 NamedCoprocessorOp::NamedCoprocessorOp() :
21 const char* NamedImmediateBic::name() const { 25 NamedClassDecoder(named_decoder_, "CoprocessorOp")
22 return "ImmediateBic"; 26 {
23 } 27 }
24 28
25 const char* NamedLoadMultiple::name() const { 29 NamedMoveToStatusRegister::NamedMoveToStatusRegister() :
26 return "LoadMultiple"; 30 NamedClassDecoder(named_decoder_, "MoveToStatusRegister")
27 } 31 {
28 32 }
29 const char* NamedLoadCoprocessor::name() const { 33
30 return "LoadCoprocessor"; 34 NamedImmediateBic::NamedImmediateBic() :
31 } 35 NamedClassDecoder(named_decoder_, "ImmediateBic")
32 36 {
33 const char* NamedLoadDoubleExclusive::name() const { 37 }
34 return "LoadDoubleExclusive"; 38
35 } 39 NamedLoadMultiple::NamedLoadMultiple() :
36 40 NamedClassDecoder(named_decoder_, "LoadMultiple")
37 const char* NamedBranch::name() const { 41 {
38 return "Branch"; 42 }
39 } 43
40 44 NamedLoadCoprocessor::NamedLoadCoprocessor() :
41 const char* NamedTest::name() const { 45 NamedClassDecoder(named_decoder_, "LoadCoprocessor")
42 return "Test"; 46 {
43 } 47 }
44 48
45 const char* NamedStoreRegister::name() const { 49 NamedLongMultiply::NamedLongMultiply() :
46 return "StoreRegister"; 50 NamedClassDecoder(named_decoder_, "LongMultiply")
47 } 51 {
48 52 }
49 const char* NamedMoveDoubleFromCoprocessor::name() const { 53
50 return "MoveDoubleFromCoprocessor"; 54 NamedBranch::NamedBranch() :
51 } 55 NamedClassDecoder(named_decoder_, "Branch")
52 56 {
53 const char* NamedTestImmediate::name() const { 57 }
54 return "TestImmediate"; 58
55 } 59 NamedTest::NamedTest() :
56 60 NamedClassDecoder(named_decoder_, "Test")
57 const char* NamedBxBlx::name() const { 61 {
58 return "BxBlx"; 62 }
59 } 63
60 64 NamedStoreRegister::NamedStoreRegister() :
61 const char* NamedEffectiveNoOp::name() const { 65 NamedClassDecoder(named_decoder_, "StoreRegister")
62 return "EffectiveNoOp"; 66 {
63 } 67 }
64 68
65 const char* NamedLongMultiply::name() const { 69 NamedLoadRegister::NamedLoadRegister() :
66 return "LongMultiply"; 70 NamedClassDecoder(named_decoder_, "LoadRegister")
67 } 71 {
68 72 }
69 const char* NamedBinary4RegisterShiftedOp::name() const { 73
70 return "Binary4RegisterShiftedOp"; 74 NamedTestImmediate::NamedTestImmediate() :
71 } 75 NamedClassDecoder(named_decoder_, "TestImmediate")
72 76 {
73 const char* NamedBreakpoint::name() const { 77 }
74 return "Breakpoint"; 78
75 } 79 NamedVectorLoad::NamedVectorLoad() :
76 80 NamedClassDecoder(named_decoder_, "VectorLoad")
77 const char* NamedMultiply::name() const { 81 {
78 return "Multiply"; 82 }
79 } 83
80 84 NamedEffectiveNoOp::NamedEffectiveNoOp() :
81 const char* NamedPackSatRev::name() const { 85 NamedClassDecoder(named_decoder_, "EffectiveNoOp")
82 return "PackSatRev"; 86 {
83 } 87 }
84 88
85 const char* NamedLoadExclusive::name() const { 89 NamedLoadDoubleExclusive::NamedLoadDoubleExclusive() :
86 return "LoadExclusive"; 90 NamedClassDecoder(named_decoder_, "LoadDoubleExclusive")
87 } 91 {
88 92 }
89 const char* NamedVectorStore::name() const { 93
90 return "VectorStore"; 94 NamedBinary4RegisterShiftedOp::NamedBinary4RegisterShiftedOp() :
91 } 95 NamedClassDecoder(named_decoder_, "Binary4RegisterShiftedOp")
92 96 {
93 const char* NamedUnary3RegisterShiftedOp::name() const { 97 }
94 return "Unary3RegisterShiftedOp"; 98
95 } 99 NamedBreakpoint::NamedBreakpoint() :
96 100 NamedClassDecoder(named_decoder_, "Breakpoint")
97 const char* NamedUndefined::name() const { 101 {
98 return "Undefined"; 102 }
99 } 103
100 104 NamedMultiply::NamedMultiply() :
101 const char* NamedDataProc::name() const { 105 NamedClassDecoder(named_decoder_, "Multiply")
102 return "DataProc"; 106 {
103 } 107 }
104 108
105 const char* NamedDeprecated::name() const { 109 NamedAdd_Rule_7_A1_P26::NamedAdd_Rule_7_A1_P26() :
106 return "Deprecated"; 110 NamedClassDecoder(named_decoder_, "Add_Rule_7_A1_P26")
107 } 111 {
108 112 }
109 const char* NamedLoadImmediate::name() const { 113
110 return "LoadImmediate"; 114 NamedPackSatRev::NamedPackSatRev() :
111 } 115 NamedClassDecoder(named_decoder_, "PackSatRev")
112 116 {
113 const char* NamedStoreCoprocessor::name() const { 117 }
114 return "StoreCoprocessor"; 118
115 } 119 NamedLoadExclusive::NamedLoadExclusive() :
116 120 NamedClassDecoder(named_decoder_, "LoadExclusive")
117 const char* NamedRoadblock::name() const { 121 {
118 return "Roadblock"; 122 }
119 } 123
120 124 NamedVectorStore::NamedVectorStore() :
121 const char* NamedLoadDoubleR::name() const { 125 NamedClassDecoder(named_decoder_, "VectorStore")
122 return "LoadDoubleR"; 126 {
123 } 127 }
124 128
125 const char* NamedStoreExclusive::name() const { 129 NamedUnary3RegisterShiftedOp::NamedUnary3RegisterShiftedOp() :
126 return "StoreExclusive"; 130 NamedClassDecoder(named_decoder_, "Unary3RegisterShiftedOp")
127 } 131 {
128 132 }
129 const char* NamedStoreImmediate::name() const { 133
130 return "StoreImmediate"; 134 NamedUndefined::NamedUndefined() :
131 } 135 NamedClassDecoder(named_decoder_, "Undefined")
132 136 {
133 const char* NamedMoveFromCoprocessor::name() const { 137 }
134 return "MoveFromCoprocessor"; 138
135 } 139 NamedDataProc::NamedDataProc() :
136 140 NamedClassDecoder(named_decoder_, "DataProc")
137 const char* NamedLoadRegister::name() const { 141 {
138 return "LoadRegister"; 142 }
139 } 143
140 144 NamedDeprecated::NamedDeprecated() :
141 const char* NamedLoadDoubleI::name() const { 145 NamedClassDecoder(named_decoder_, "Deprecated")
142 return "LoadDoubleI"; 146 {
143 } 147 }
144 148
145 const char* NamedBinary3RegisterShiftedTest::name() const { 149 NamedLoadImmediate::NamedLoadImmediate() :
146 return "Binary3RegisterShiftedTest"; 150 NamedClassDecoder(named_decoder_, "LoadImmediate")
147 } 151 {
148 152 }
149 const char* NamedUnpredictable::name() const { 153
150 return "Unpredictable"; 154 NamedStoreCoprocessor::NamedStoreCoprocessor() :
151 } 155 NamedClassDecoder(named_decoder_, "StoreCoprocessor")
152 156 {
153 const char* NamedForbidden::name() const { 157 }
154 return "Forbidden"; 158
155 } 159 NamedRoadblock::NamedRoadblock() :
156 160 NamedClassDecoder(named_decoder_, "Roadblock")
157 const char* NamedVectorLoad::name() const { 161 {
158 return "VectorLoad"; 162 }
159 } 163
160 164 NamedMoveFromCoprocessor::NamedMoveFromCoprocessor() :
161 const char* NamedMoveToStatusRegister::name() const { 165 NamedClassDecoder(named_decoder_, "MoveFromCoprocessor")
162 return "MoveToStatusRegister"; 166 {
163 } 167 }
164 168
165 const char* NamedSatAddSub::name() const { 169 NamedStoreExclusive::NamedStoreExclusive() :
166 return "SatAddSub"; 170 NamedClassDecoder(named_decoder_, "StoreExclusive")
167 } 171 {
168 172 }
169 /* 173
170 * Prototypes for static table-matching functions. 174 NamedStoreImmediate::NamedStoreImmediate() :
171 */ 175 NamedClassDecoder(named_decoder_, "StoreImmediate")
172 static inline const ClassDecoder &decode_ARMv7( 176 {
173 const Instruction insn, const NamedArm32DecoderState *state); 177 }
174 178
175 static inline const ClassDecoder &decode_dp_misc( 179 NamedMoveDoubleFromCoprocessor::NamedMoveDoubleFromCoprocessor() :
176 const Instruction insn, const NamedArm32DecoderState *state); 180 NamedClassDecoder(named_decoder_, "MoveDoubleFromCoprocessor")
177 181 {
178 static inline const ClassDecoder &decode_dp_reg( 182 }
179 const Instruction insn, const NamedArm32DecoderState *state); 183
180 184 NamedSatAddSub::NamedSatAddSub() :
181 static inline const ClassDecoder &decode_dp_reg_shifted( 185 NamedClassDecoder(named_decoder_, "SatAddSub")
182 const Instruction insn, const NamedArm32DecoderState *state); 186 {
183 187 }
184 static inline const ClassDecoder &decode_dp_immed( 188
185 const Instruction insn, const NamedArm32DecoderState *state); 189 NamedLoadDoubleI::NamedLoadDoubleI() :
186 190 NamedClassDecoder(named_decoder_, "LoadDoubleI")
187 static inline const ClassDecoder &decode_mult( 191 {
188 const Instruction insn, const NamedArm32DecoderState *state); 192 }
189 193
190 static inline const ClassDecoder &decode_sat_add_sub( 194 NamedBinary3RegisterShiftedTest::NamedBinary3RegisterShiftedTest() :
191 const Instruction insn, const NamedArm32DecoderState *state); 195 NamedClassDecoder(named_decoder_, "Binary3RegisterShiftedTest")
192 196 {
193 static inline const ClassDecoder &decode_half_mult( 197 }
194 const Instruction insn, const NamedArm32DecoderState *state); 198
195 199 NamedUnpredictable::NamedUnpredictable() :
196 static inline const ClassDecoder &decode_extra_load_store( 200 NamedClassDecoder(named_decoder_, "Unpredictable")
197 const Instruction insn, const NamedArm32DecoderState *state); 201 {
198 202 }
199 static inline const ClassDecoder &decode_sync( 203
200 const Instruction insn, const NamedArm32DecoderState *state); 204 NamedForbidden::NamedForbidden() :
201 205 NamedClassDecoder(named_decoder_, "Forbidden")
202 static inline const ClassDecoder &decode_msr_and_hints( 206 {
203 const Instruction insn, const NamedArm32DecoderState *state); 207 }
204 208
205 static inline const ClassDecoder &decode_misc( 209 NamedBxBlx::NamedBxBlx() :
206 const Instruction insn, const NamedArm32DecoderState *state); 210 NamedClassDecoder(named_decoder_, "BxBlx")
207 211 {
208 static inline const ClassDecoder &decode_load_store_word_byte( 212 }
209 const Instruction insn, const NamedArm32DecoderState *state); 213
210 214 NamedLoadDoubleR::NamedLoadDoubleR() :
211 static inline const ClassDecoder &decode_media( 215 NamedClassDecoder(named_decoder_, "LoadDoubleR")
212 const Instruction insn, const NamedArm32DecoderState *state); 216 {
213 217 }
214 static inline const ClassDecoder &decode_parallel_add_sub(
215 const Instruction insn, const NamedArm32DecoderState *state);
216
217 static inline const ClassDecoder &decode_pack_sat_rev(
218 const Instruction insn, const NamedArm32DecoderState *state);
219
220 static inline const ClassDecoder &decode_signed_mult(
221 const Instruction insn, const NamedArm32DecoderState *state);
222
223 static inline const ClassDecoder &decode_branch_block_xfer(
224 const Instruction insn, const NamedArm32DecoderState *state);
225
226 static inline const ClassDecoder &decode_super_cop(
227 const Instruction insn, const NamedArm32DecoderState *state);
228
229 static inline const ClassDecoder &decode_unconditional(
230 const Instruction insn, const NamedArm32DecoderState *state);
231
232 static inline const ClassDecoder &decode_misc_hints_simd(
233 const Instruction insn, const NamedArm32DecoderState *state);
234
235 static inline const ClassDecoder &decode_simd_dp(
236 const Instruction insn, const NamedArm32DecoderState *state);
237
238 static inline const ClassDecoder &decode_simd_dp_3same(
239 const Instruction insn, const NamedArm32DecoderState *state);
240
241 static inline const ClassDecoder &decode_simd_dp_3diff(
242 const Instruction insn, const NamedArm32DecoderState *state);
243
244 static inline const ClassDecoder &decode_simd_dp_2scalar(
245 const Instruction insn, const NamedArm32DecoderState *state);
246
247 static inline const ClassDecoder &decode_simd_dp_2shift(
248 const Instruction insn, const NamedArm32DecoderState *state);
249
250 static inline const ClassDecoder &decode_simd_dp_2misc(
251 const Instruction insn, const NamedArm32DecoderState *state);
252
253 static inline const ClassDecoder &decode_simd_dp_1imm(
254 const Instruction insn, const NamedArm32DecoderState *state);
255
256 static inline const ClassDecoder &decode_simd_load_store(
257 const Instruction insn, const NamedArm32DecoderState *state);
258
259 static inline const ClassDecoder &decode_simd_load_store_l0(
260 const Instruction insn, const NamedArm32DecoderState *state);
261
262 static inline const ClassDecoder &decode_simd_load_store_l1(
263 const Instruction insn, const NamedArm32DecoderState *state);
264 218
265 /* 219 /*
266 * Table-matching function implementations. 220 * Table-matching function implementations.
267 */ 221 */
268 222
269 /* 223 /*
270 * Implementation of table ARMv7. 224 * Implementation of table ARMv7.
271 * Specified by: See Section A5.1. 225 * Specified by: See Section A5.1.
272 */ 226 */
273 static inline const ClassDecoder &decode_ARMv7( 227 const NamedClassDecoder &NamedArm32DecoderState::decode_ARMv7(const Instruction insn) const {
274 const Instruction insn, const NamedArm32DecoderState *state) {
275 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0E000000) == 0x04000000) && (true)) { 228 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0E000000) == 0x04000000) && (true)) {
276 return decode_load_store_word_byte(insn, state); 229 return decode_load_store_word_byte(insn);
277 } 230 }
278 231
279 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0E000000) == 0x06000000) && ((insn & 0x00000010) == 0x00000000)) { 232 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0E000000) == 0x06000000) && ((insn & 0x00000010) == 0x00000000)) {
280 return decode_load_store_word_byte(insn, state); 233 return decode_load_store_word_byte(insn);
281 } 234 }
282 235
283 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0E000000) == 0x06000000) && ((insn & 0x00000010) == 0x00000010)) { 236 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0E000000) == 0x06000000) && ((insn & 0x00000010) == 0x00000010)) {
284 return decode_media(insn, state); 237 return decode_media(insn);
285 } 238 }
286 239
287 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0C000000) == 0x00000000) && (true)) { 240 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0C000000) == 0x00000000) && (true)) {
288 return decode_dp_misc(insn, state); 241 return decode_dp_misc(insn);
289 } 242 }
290 243
291 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0C000000) == 0x08000000) && (true)) { 244 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0C000000) == 0x08000000) && (true)) {
292 return decode_branch_block_xfer(insn, state); 245 return decode_branch_block_xfer(insn);
293 } 246 }
294 247
295 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0C000000) == 0x0C000000) && (true)) { 248 if (((insn & 0xF0000000) != 0xF0000000) && ((insn & 0x0C000000) == 0x0C000000) && (true)) {
296 return decode_super_cop(insn, state); 249 return decode_super_cop(insn);
297 } 250 }
298 251
299 if (((insn & 0xF0000000) == 0xF0000000) && (true) && (true)) { 252 if (((insn & 0xF0000000) == 0xF0000000) && (true) && (true)) {
300 return decode_unconditional(insn, state); 253 return decode_unconditional(insn);
301 } 254 }
302 255
303 // Catch any attempt to fall through... 256 // Catch any attempt to fall through...
304 fprintf(stderr, "TABLE IS INCOMPLETE: ARMv7 could not parse %08X",insn.bits(31 ,0)); 257 fprintf(stderr, "TABLE IS INCOMPLETE: ARMv7 could not parse %08X",insn.bits(31 ,0));
305 return state->Forbidden_instance_; 258 return Forbidden_instance_;
306 } 259 }
260
307 261
308 /* 262 /*
309 * Implementation of table dp_misc. 263 * Implementation of table dp_misc.
310 * Specified by: See Section A5.2. 264 * Specified by: See Section A5.2.
311 */ 265 */
312 static inline const ClassDecoder &decode_dp_misc( 266 const NamedClassDecoder &NamedArm32DecoderState::decode_dp_misc(const Instructio n insn) const {
313 const Instruction insn, const NamedArm32DecoderState *state) {
314 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01900000) != 0x01000000) && ((insn & 0x00000090) == 0x00000010)) { 267 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01900000) != 0x01000000) && ((insn & 0x00000090) == 0x00000010)) {
315 return decode_dp_reg_shifted(insn, state); 268 return decode_dp_reg_shifted(insn);
316 } 269 }
317 270
318 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01900000) != 0x01000000) && ((insn & 0x00000010) == 0x00000000)) { 271 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01900000) != 0x01000000) && ((insn & 0x00000010) == 0x00000000)) {
319 return decode_dp_reg(insn, state); 272 return decode_dp_reg(insn);
320 } 273 }
321 274
322 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01900000) == 0x01000000) && ((insn & 0x00000090) == 0x00000080)) { 275 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01900000) == 0x01000000) && ((insn & 0x00000090) == 0x00000080)) {
323 return decode_half_mult(insn, state); 276 return decode_half_mult(insn);
324 } 277 }
325 278
326 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01900000) == 0x01000000) && ((insn & 0x00000080) == 0x00000000)) { 279 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01900000) == 0x01000000) && ((insn & 0x00000080) == 0x00000000)) {
327 return decode_misc(insn, state); 280 return decode_misc(insn);
328 } 281 }
329 282
330 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) != 0x00200000) && ((insn & 0x000000F0) == 0x000000B0)) { 283 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) != 0x00200000) && ((insn & 0x000000F0) == 0x000000B0)) {
331 return decode_extra_load_store(insn, state); 284 return decode_extra_load_store(insn);
332 } 285 }
333 286
334 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) != 0x00200000) && ((insn & 0x000000D0) == 0x000000D0)) { 287 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) != 0x00200000) && ((insn & 0x000000D0) == 0x000000D0)) {
335 return decode_extra_load_store(insn, state); 288 return decode_extra_load_store(insn);
336 } 289 }
337 290
338 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) == 0x00200000) && ((insn & 0x000000F0) == 0x000000B0)) { 291 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) == 0x00200000) && ((insn & 0x000000F0) == 0x000000B0)) {
339 return state->Forbidden_instance_; 292 return Forbidden_instance_;
340 } 293 }
341 294
342 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) == 0x00200000) && ((insn & 0x000000D0) == 0x000000D0)) { 295 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) == 0x00200000) && ((insn & 0x000000D0) == 0x000000D0)) {
343 return state->Forbidden_instance_; 296 return Forbidden_instance_;
344 } 297 }
345 298
346 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01000000) == 0x00000000) && ((insn & 0x000000F0) == 0x00000090)) { 299 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01000000) == 0x00000000) && ((insn & 0x000000F0) == 0x00000090)) {
347 return decode_mult(insn, state); 300 return decode_mult(insn);
348 } 301 }
349 302
350 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01000000) == 0x01000000) && ((insn & 0x000000F0) == 0x00000090)) { 303 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01000000) == 0x01000000) && ((insn & 0x000000F0) == 0x00000090)) {
351 return decode_sync(insn, state); 304 return decode_sync(insn);
352 } 305 }
353 306
354 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x01B00000) == 0x01000000) && (true)) { 307 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x01B00000) == 0x01000000) && (true)) {
355 return state->DataProc_instance_; 308 return DataProc_instance_;
356 } 309 }
357 310
358 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x01B00000) == 0x01200000) && (true)) { 311 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x01B00000) == 0x01200000) && (true)) {
359 return decode_msr_and_hints(insn, state); 312 return decode_msr_and_hints(insn);
360 } 313 }
361 314
362 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x01900000) != 0x01000000) && (true)) { 315 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x01900000) != 0x01000000) && (true)) {
363 return decode_dp_immed(insn, state); 316 return decode_dp_immed(insn);
364 } 317 }
365 318
366 // Catch any attempt to fall through... 319 // Catch any attempt to fall through...
367 fprintf(stderr, "TABLE IS INCOMPLETE: dp_misc could not parse %08X",insn.bits( 31,0)); 320 fprintf(stderr, "TABLE IS INCOMPLETE: dp_misc could not parse %08X",insn.bits( 31,0));
368 return state->Forbidden_instance_; 321 return Forbidden_instance_;
369 } 322 }
323
370 324
371 /* 325 /*
372 * Implementation of table dp_reg. 326 * Implementation of table dp_reg.
373 * Specified by: See Section A5.2.1. 327 * Specified by: See Section A5.2.1.
374 */ 328 */
375 static inline const ClassDecoder &decode_dp_reg( 329 const NamedClassDecoder &NamedArm32DecoderState::decode_dp_reg(const Instruction insn) const {
376 const Instruction insn, const NamedArm32DecoderState *state) {
377 if (((insn & 0x01900000) == 0x01100000)) { 330 if (((insn & 0x01900000) == 0x01100000)) {
378 return state->Test_instance_; 331 return Test_instance_;
379 } 332 }
380 333
381 if (((insn & 0x01800000) == 0x01800000)) { 334 if (((insn & 0x01800000) == 0x01800000)) {
382 return state->DataProc_instance_; 335 return DataProc_instance_;
383 } 336 }
384 337
385 if (((insn & 0x01000000) == 0x00000000)) { 338 if (((insn & 0x01000000) == 0x00000000)) {
386 return state->DataProc_instance_; 339 return DataProc_instance_;
387 } 340 }
388 341
389 // Catch any attempt to fall through... 342 // Catch any attempt to fall through...
390 fprintf(stderr, "TABLE IS INCOMPLETE: dp_reg could not parse %08X",insn.bits(3 1,0)); 343 fprintf(stderr, "TABLE IS INCOMPLETE: dp_reg could not parse %08X",insn.bits(3 1,0));
391 return state->Forbidden_instance_; 344 return Forbidden_instance_;
392 } 345 }
346
393 347
394 /* 348 /*
395 * Implementation of table dp_reg_shifted. 349 * Implementation of table dp_reg_shifted.
396 * Specified by: See Section A5.2.2. 350 * Specified by: See Section A5.2.2.
397 */ 351 */
398 static inline const ClassDecoder &decode_dp_reg_shifted( 352 const NamedClassDecoder &NamedArm32DecoderState::decode_dp_reg_shifted(const Ins truction insn) const {
399 const Instruction insn, const NamedArm32DecoderState *state) { 353 if (((insn & 0x01E00000) == 0x00800000)) {
354 return Add_Rule_7_A1_P26_instance_;
355 }
356
357 if (((insn & 0x01E00000) == 0x01800000)) {
358 return Binary4RegisterShiftedOp_instance_;
359 }
360
400 if (((insn & 0x01E00000) == 0x01A00000)) { 361 if (((insn & 0x01E00000) == 0x01A00000)) {
401 return state->DataProc_instance_; 362 return DataProc_instance_;
402 } 363 }
403 364
404 if (((insn & 0x01E00000) == 0x01E00000)) { 365 if (((insn & 0x01E00000) == 0x01E00000)) {
405 return state->Unary3RegisterShiftedOp_instance_; 366 return Unary3RegisterShiftedOp_instance_;
367 }
368
369 if (((insn & 0x00E00000) == 0x00C00000)) {
370 return Binary4RegisterShiftedOp_instance_;
406 } 371 }
407 372
408 if (((insn & 0x01900000) == 0x01100000)) { 373 if (((insn & 0x01900000) == 0x01100000)) {
409 return state->Binary3RegisterShiftedTest_instance_; 374 return Binary3RegisterShiftedTest_instance_;
410 } 375 }
411 376
412 if (((insn & 0x01A00000) == 0x01800000)) { 377 if (((insn & 0x01A00000) == 0x00A00000)) {
413 return state->Binary4RegisterShiftedOp_instance_; 378 return Binary4RegisterShiftedOp_instance_;
414 } 379 }
415 380
416 if (((insn & 0x01000000) == 0x00000000)) { 381 if (((insn & 0x01800000) == 0x00000000)) {
417 return state->Binary4RegisterShiftedOp_instance_; 382 return Binary4RegisterShiftedOp_instance_;
418 } 383 }
419 384
420 // Catch any attempt to fall through... 385 // Catch any attempt to fall through...
421 fprintf(stderr, "TABLE IS INCOMPLETE: dp_reg_shifted could not parse %08X",ins n.bits(31,0)); 386 fprintf(stderr, "TABLE IS INCOMPLETE: dp_reg_shifted could not parse %08X",ins n.bits(31,0));
422 return state->Forbidden_instance_; 387 return Forbidden_instance_;
423 } 388 }
389
424 390
425 /* 391 /*
426 * Implementation of table dp_immed. 392 * Implementation of table dp_immed.
427 * Specified by: See Section A5.2.3. 393 * Specified by: See Section A5.2.3.
428 */ 394 */
429 static inline const ClassDecoder &decode_dp_immed( 395 const NamedClassDecoder &NamedArm32DecoderState::decode_dp_immed(const Instructi on insn) const {
430 const Instruction insn, const NamedArm32DecoderState *state) {
431 if (((insn & 0x01F00000) == 0x01100000)) { 396 if (((insn & 0x01F00000) == 0x01100000)) {
432 return state->TestImmediate_instance_; 397 return TestImmediate_instance_;
433 } 398 }
434 399
435 if (((insn & 0x01F00000) == 0x01500000)) { 400 if (((insn & 0x01F00000) == 0x01500000)) {
436 return state->Test_instance_; 401 return Test_instance_;
437 } 402 }
438 403
439 if (((insn & 0x01B00000) == 0x01300000)) { 404 if (((insn & 0x01B00000) == 0x01300000)) {
440 return state->Test_instance_; 405 return Test_instance_;
441 } 406 }
442 407
443 if (((insn & 0x01E00000) == 0x01C00000)) { 408 if (((insn & 0x01E00000) == 0x01C00000)) {
444 return state->ImmediateBic_instance_; 409 return ImmediateBic_instance_;
445 } 410 }
446 411
447 if (((insn & 0x01E00000) == 0x01E00000)) { 412 if (((insn & 0x01E00000) == 0x01E00000)) {
448 return state->DataProc_instance_; 413 return DataProc_instance_;
449 } 414 }
450 415
451 if (((insn & 0x01C00000) == 0x00000000)) { 416 if (((insn & 0x01C00000) == 0x00000000)) {
452 return state->DataProc_instance_; 417 return DataProc_instance_;
453 } 418 }
454 419
455 if (((insn & 0x00C00000) == 0x00800000)) { 420 if (((insn & 0x00C00000) == 0x00800000)) {
456 return state->DataProc_instance_; 421 return DataProc_instance_;
457 } 422 }
458 423
459 if (((insn & 0x01400000) == 0x00400000)) { 424 if (((insn & 0x01400000) == 0x00400000)) {
460 return state->DataProc_instance_; 425 return DataProc_instance_;
461 } 426 }
462 427
463 // Catch any attempt to fall through... 428 // Catch any attempt to fall through...
464 fprintf(stderr, "TABLE IS INCOMPLETE: dp_immed could not parse %08X",insn.bits (31,0)); 429 fprintf(stderr, "TABLE IS INCOMPLETE: dp_immed could not parse %08X",insn.bits (31,0));
465 return state->Forbidden_instance_; 430 return Forbidden_instance_;
466 } 431 }
432
467 433
468 /* 434 /*
469 * Implementation of table mult. 435 * Implementation of table mult.
470 * Specified by: See Section A5.2.5. 436 * Specified by: See Section A5.2.5.
471 */ 437 */
472 static inline const ClassDecoder &decode_mult( 438 const NamedClassDecoder &NamedArm32DecoderState::decode_mult(const Instruction i nsn) const {
473 const Instruction insn, const NamedArm32DecoderState *state) {
474 if (((insn & 0x00F00000) == 0x00400000)) { 439 if (((insn & 0x00F00000) == 0x00400000)) {
475 return state->LongMultiply_instance_; 440 return LongMultiply_instance_;
476 } 441 }
477 442
478 if (((insn & 0x00F00000) == 0x00600000)) { 443 if (((insn & 0x00F00000) == 0x00600000)) {
479 return state->Multiply_instance_; 444 return Multiply_instance_;
480 } 445 }
481 446
482 if (((insn & 0x00D00000) == 0x00500000)) { 447 if (((insn & 0x00D00000) == 0x00500000)) {
483 return state->Undefined_instance_; 448 return Undefined_instance_;
484 } 449 }
485 450
486 if (((insn & 0x00C00000) == 0x00000000)) { 451 if (((insn & 0x00C00000) == 0x00000000)) {
487 return state->Multiply_instance_; 452 return Multiply_instance_;
488 } 453 }
489 454
490 if (((insn & 0x00800000) == 0x00800000)) { 455 if (((insn & 0x00800000) == 0x00800000)) {
491 return state->LongMultiply_instance_; 456 return LongMultiply_instance_;
492 } 457 }
493 458
494 // Catch any attempt to fall through... 459 // Catch any attempt to fall through...
495 fprintf(stderr, "TABLE IS INCOMPLETE: mult could not parse %08X",insn.bits(31, 0)); 460 fprintf(stderr, "TABLE IS INCOMPLETE: mult could not parse %08X",insn.bits(31, 0));
496 return state->Forbidden_instance_; 461 return Forbidden_instance_;
497 } 462 }
463
498 464
499 /* 465 /*
500 * Implementation of table sat_add_sub. 466 * Implementation of table sat_add_sub.
501 * Specified by: See Section A5.2.6. 467 * Specified by: See Section A5.2.6.
502 */ 468 */
503 static inline const ClassDecoder &decode_sat_add_sub( 469 const NamedClassDecoder &NamedArm32DecoderState::decode_sat_add_sub(const Instru ction insn) const {
504 const Instruction insn, const NamedArm32DecoderState *state) {
505 if ((true)) { 470 if ((true)) {
506 return state->SatAddSub_instance_; 471 return SatAddSub_instance_;
507 } 472 }
508 473
509 // Catch any attempt to fall through... 474 // Catch any attempt to fall through...
510 fprintf(stderr, "TABLE IS INCOMPLETE: sat_add_sub could not parse %08X",insn.b its(31,0)); 475 fprintf(stderr, "TABLE IS INCOMPLETE: sat_add_sub could not parse %08X",insn.b its(31,0));
511 return state->Forbidden_instance_; 476 return Forbidden_instance_;
512 } 477 }
478
513 479
514 /* 480 /*
515 * Implementation of table half_mult. 481 * Implementation of table half_mult.
516 * Specified by: See Section A5.2.7. 482 * Specified by: See Section A5.2.7.
517 */ 483 */
518 static inline const ClassDecoder &decode_half_mult( 484 const NamedClassDecoder &NamedArm32DecoderState::decode_half_mult(const Instruct ion insn) const {
519 const Instruction insn, const NamedArm32DecoderState *state) {
520 if (((insn & 0x00600000) == 0x00400000)) { 485 if (((insn & 0x00600000) == 0x00400000)) {
521 return state->LongMultiply_instance_; 486 return LongMultiply_instance_;
522 } 487 }
523 488
524 if (((insn & 0x00600000) == 0x00600000)) { 489 if (((insn & 0x00600000) == 0x00600000)) {
525 return state->Multiply_instance_; 490 return Multiply_instance_;
526 } 491 }
527 492
528 if (((insn & 0x00400000) == 0x00000000)) { 493 if (((insn & 0x00400000) == 0x00000000)) {
529 return state->Multiply_instance_; 494 return Multiply_instance_;
530 } 495 }
531 496
532 // Catch any attempt to fall through... 497 // Catch any attempt to fall through...
533 fprintf(stderr, "TABLE IS INCOMPLETE: half_mult could not parse %08X",insn.bit s(31,0)); 498 fprintf(stderr, "TABLE IS INCOMPLETE: half_mult could not parse %08X",insn.bit s(31,0));
534 return state->Forbidden_instance_; 499 return Forbidden_instance_;
535 } 500 }
501
536 502
537 /* 503 /*
538 * Implementation of table extra_load_store. 504 * Implementation of table extra_load_store.
539 * Specified by: See Section A5.2.8. 505 * Specified by: See Section A5.2.8.
540 */ 506 */
541 static inline const ClassDecoder &decode_extra_load_store( 507 const NamedClassDecoder &NamedArm32DecoderState::decode_extra_load_store(const I nstruction insn) const {
542 const Instruction insn, const NamedArm32DecoderState *state) {
543 if (((insn & 0x00000060) == 0x00000040) && ((insn & 0x00500000) == 0x00000000) ) { 508 if (((insn & 0x00000060) == 0x00000040) && ((insn & 0x00500000) == 0x00000000) ) {
544 return state->LoadDoubleR_instance_; 509 return LoadDoubleR_instance_;
545 } 510 }
546 511
547 if (((insn & 0x00000060) == 0x00000040) && ((insn & 0x00500000) == 0x00100000) ) { 512 if (((insn & 0x00000060) == 0x00000040) && ((insn & 0x00500000) == 0x00100000) ) {
548 return state->LoadRegister_instance_; 513 return LoadRegister_instance_;
549 } 514 }
550 515
551 if (((insn & 0x00000060) == 0x00000040) && ((insn & 0x00500000) == 0x00400000) ) { 516 if (((insn & 0x00000060) == 0x00000040) && ((insn & 0x00500000) == 0x00400000) ) {
552 return state->LoadDoubleI_instance_; 517 return LoadDoubleI_instance_;
553 } 518 }
554 519
555 if (((insn & 0x00000060) == 0x00000040) && ((insn & 0x00500000) == 0x00500000) ) { 520 if (((insn & 0x00000060) == 0x00000040) && ((insn & 0x00500000) == 0x00500000) ) {
556 return state->LoadImmediate_instance_; 521 return LoadImmediate_instance_;
557 } 522 }
558 523
559 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00500000) == 0x00000000) ) { 524 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00500000) == 0x00000000) ) {
560 return state->StoreRegister_instance_; 525 return StoreRegister_instance_;
561 } 526 }
562 527
563 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00500000) == 0x00100000) ) { 528 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00500000) == 0x00100000) ) {
564 return state->LoadRegister_instance_; 529 return LoadRegister_instance_;
565 } 530 }
566 531
567 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00500000) == 0x00400000) ) { 532 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00500000) == 0x00400000) ) {
568 return state->StoreImmediate_instance_; 533 return StoreImmediate_instance_;
569 } 534 }
570 535
571 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00500000) == 0x00500000) ) { 536 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00500000) == 0x00500000) ) {
572 return state->LoadImmediate_instance_; 537 return LoadImmediate_instance_;
573 } 538 }
574 539
575 // Catch any attempt to fall through... 540 // Catch any attempt to fall through...
576 fprintf(stderr, "TABLE IS INCOMPLETE: extra_load_store could not parse %08X",i nsn.bits(31,0)); 541 fprintf(stderr, "TABLE IS INCOMPLETE: extra_load_store could not parse %08X",i nsn.bits(31,0));
577 return state->Forbidden_instance_; 542 return Forbidden_instance_;
578 } 543 }
544
579 545
580 /* 546 /*
581 * Implementation of table sync. 547 * Implementation of table sync.
582 * Specified by: See Section A5.2.10. 548 * Specified by: See Section A5.2.10.
583 */ 549 */
584 static inline const ClassDecoder &decode_sync( 550 const NamedClassDecoder &NamedArm32DecoderState::decode_sync(const Instruction i nsn) const {
585 const Instruction insn, const NamedArm32DecoderState *state) {
586 if (((insn & 0x00F00000) == 0x00800000)) { 551 if (((insn & 0x00F00000) == 0x00800000)) {
587 return state->StoreExclusive_instance_; 552 return StoreExclusive_instance_;
588 } 553 }
589 554
590 if (((insn & 0x00F00000) == 0x00900000)) { 555 if (((insn & 0x00F00000) == 0x00900000)) {
591 return state->LoadExclusive_instance_; 556 return LoadExclusive_instance_;
592 } 557 }
593 558
594 if (((insn & 0x00F00000) == 0x00B00000)) { 559 if (((insn & 0x00F00000) == 0x00B00000)) {
595 return state->LoadDoubleExclusive_instance_; 560 return LoadDoubleExclusive_instance_;
596 } 561 }
597 562
598 if (((insn & 0x00F00000) == 0x00C00000)) { 563 if (((insn & 0x00F00000) == 0x00C00000)) {
599 return state->StoreExclusive_instance_; 564 return StoreExclusive_instance_;
600 } 565 }
601 566
602 if (((insn & 0x00B00000) == 0x00000000)) { 567 if (((insn & 0x00B00000) == 0x00000000)) {
603 return state->Deprecated_instance_; 568 return Deprecated_instance_;
604 } 569 }
605 570
606 if (((insn & 0x00B00000) == 0x00A00000)) { 571 if (((insn & 0x00B00000) == 0x00A00000)) {
607 return state->StoreExclusive_instance_; 572 return StoreExclusive_instance_;
608 } 573 }
609 574
610 if (((insn & 0x00D00000) == 0x00D00000)) { 575 if (((insn & 0x00D00000) == 0x00D00000)) {
611 return state->LoadExclusive_instance_; 576 return LoadExclusive_instance_;
612 } 577 }
613 578
614 if ((true)) { 579 if ((true)) {
615 return state->Undefined_instance_; 580 return Undefined_instance_;
616 } 581 }
617 582
618 // Catch any attempt to fall through... 583 // Catch any attempt to fall through...
619 fprintf(stderr, "TABLE IS INCOMPLETE: sync could not parse %08X",insn.bits(31, 0)); 584 fprintf(stderr, "TABLE IS INCOMPLETE: sync could not parse %08X",insn.bits(31, 0));
620 return state->Forbidden_instance_; 585 return Forbidden_instance_;
621 } 586 }
587
622 588
623 /* 589 /*
624 * Implementation of table msr_and_hints. 590 * Implementation of table msr_and_hints.
625 * Specified by: See Section A5.2.11. 591 * Specified by: See Section A5.2.11.
626 */ 592 */
627 static inline const ClassDecoder &decode_msr_and_hints( 593 const NamedClassDecoder &NamedArm32DecoderState::decode_msr_and_hints(const Inst ruction insn) const {
628 const Instruction insn, const NamedArm32DecoderState *state) {
629 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000FF) == 0x00000000)) { 594 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000FF) == 0x00000000)) {
630 return state->EffectiveNoOp_instance_; 595 return EffectiveNoOp_instance_;
631 } 596 }
632 597
633 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000FF) == 0x00000002)) { 598 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000FF) == 0x00000002)) {
634 return state->EffectiveNoOp_instance_; 599 return EffectiveNoOp_instance_;
635 } 600 }
636 601
637 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000FF) == 0x00000004)) { 602 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000FF) == 0x00000004)) {
638 return state->EffectiveNoOp_instance_; 603 return EffectiveNoOp_instance_;
639 } 604 }
640 605
641 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000FD) == 0x00000001)) { 606 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000FD) == 0x00000001)) {
642 return state->EffectiveNoOp_instance_; 607 return EffectiveNoOp_instance_;
643 } 608 }
644 609
645 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000F0) == 0x000000F0)) { 610 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00000000) && ((insn & 0x000000F0) == 0x000000F0)) {
646 return state->EffectiveNoOp_instance_; 611 return EffectiveNoOp_instance_;
647 } 612 }
648 613
649 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00040000) && (true)) { 614 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000F0000) == 0x00040000) && (true)) {
650 return state->MoveToStatusRegister_instance_; 615 return MoveToStatusRegister_instance_;
651 } 616 }
652 617
653 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000B0000) == 0x00080000) && (true)) { 618 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x000B0000) == 0x00080000) && (true)) {
654 return state->MoveToStatusRegister_instance_; 619 return MoveToStatusRegister_instance_;
655 } 620 }
656 621
657 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x00030000) == 0x00010000) && (true)) { 622 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x00030000) == 0x00010000) && (true)) {
658 return state->Forbidden_instance_; 623 return Forbidden_instance_;
659 } 624 }
660 625
661 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x00020000) == 0x00020000) && (true)) { 626 if (((insn & 0x00400000) == 0x00000000) && ((insn & 0x00020000) == 0x00020000) && (true)) {
662 return state->Forbidden_instance_; 627 return Forbidden_instance_;
663 } 628 }
664 629
665 if (((insn & 0x00400000) == 0x00400000) && (true) && (true)) { 630 if (((insn & 0x00400000) == 0x00400000) && (true) && (true)) {
666 return state->Forbidden_instance_; 631 return Forbidden_instance_;
667 } 632 }
668 633
669 if ((true) && (true) && (true)) { 634 if ((true) && (true) && (true)) {
670 return state->Forbidden_instance_; 635 return Forbidden_instance_;
671 } 636 }
672 637
673 // Catch any attempt to fall through... 638 // Catch any attempt to fall through...
674 fprintf(stderr, "TABLE IS INCOMPLETE: msr_and_hints could not parse %08X",insn .bits(31,0)); 639 fprintf(stderr, "TABLE IS INCOMPLETE: msr_and_hints could not parse %08X",insn .bits(31,0));
675 return state->Forbidden_instance_; 640 return Forbidden_instance_;
676 } 641 }
642
677 643
678 /* 644 /*
679 * Implementation of table misc. 645 * Implementation of table misc.
680 * Specified by: See Section A5.2.12. 646 * Specified by: See Section A5.2.12.
681 */ 647 */
682 static inline const ClassDecoder &decode_misc( 648 const NamedClassDecoder &NamedArm32DecoderState::decode_misc(const Instruction i nsn) const {
683 const Instruction insn, const NamedArm32DecoderState *state) {
684 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00600000) == 0x00200000) && ((insn & 0x00030000) == 0x00000000)) { 649 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00600000) == 0x00200000) && ((insn & 0x00030000) == 0x00000000)) {
685 return state->MoveToStatusRegister_instance_; 650 return MoveToStatusRegister_instance_;
686 } 651 }
687 652
688 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00600000) == 0x00200000) && ((insn & 0x00030000) == 0x00010000)) { 653 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00600000) == 0x00200000) && ((insn & 0x00030000) == 0x00010000)) {
689 return state->Forbidden_instance_; 654 return Forbidden_instance_;
690 } 655 }
691 656
692 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00600000) == 0x00200000) && ((insn & 0x00020000) == 0x00020000)) { 657 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00600000) == 0x00200000) && ((insn & 0x00020000) == 0x00020000)) {
693 return state->Forbidden_instance_; 658 return Forbidden_instance_;
694 } 659 }
695 660
696 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00600000) == 0x00600000) && (true)) { 661 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00600000) == 0x00600000) && (true)) {
697 return state->Forbidden_instance_; 662 return Forbidden_instance_;
698 } 663 }
699 664
700 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00200000) == 0x00000000) && (true)) { 665 if (((insn & 0x00000070) == 0x00000000) && ((insn & 0x00200000) == 0x00000000) && (true)) {
701 return state->DataProc_instance_; 666 return DataProc_instance_;
702 } 667 }
703 668
704 if (((insn & 0x00000070) == 0x00000010) && ((insn & 0x00600000) == 0x00200000) && (true)) { 669 if (((insn & 0x00000070) == 0x00000010) && ((insn & 0x00600000) == 0x00200000) && (true)) {
705 return state->BxBlx_instance_; 670 return BxBlx_instance_;
706 } 671 }
707 672
708 if (((insn & 0x00000070) == 0x00000010) && ((insn & 0x00600000) == 0x00600000) && (true)) { 673 if (((insn & 0x00000070) == 0x00000010) && ((insn & 0x00600000) == 0x00600000) && (true)) {
709 return state->DataProc_instance_; 674 return DataProc_instance_;
710 } 675 }
711 676
712 if (((insn & 0x00000070) == 0x00000020) && ((insn & 0x00600000) == 0x00200000) && (true)) { 677 if (((insn & 0x00000070) == 0x00000020) && ((insn & 0x00600000) == 0x00200000) && (true)) {
713 return state->Forbidden_instance_; 678 return Forbidden_instance_;
714 } 679 }
715 680
716 if (((insn & 0x00000070) == 0x00000030) && ((insn & 0x00600000) == 0x00200000) && (true)) { 681 if (((insn & 0x00000070) == 0x00000030) && ((insn & 0x00600000) == 0x00200000) && (true)) {
717 return state->BxBlx_instance_; 682 return BxBlx_instance_;
718 } 683 }
719 684
720 if (((insn & 0x00000070) == 0x00000050) && (true) && (true)) { 685 if (((insn & 0x00000070) == 0x00000050) && (true) && (true)) {
721 return decode_sat_add_sub(insn, state); 686 return decode_sat_add_sub(insn);
722 } 687 }
723 688
724 if (((insn & 0x00000070) == 0x00000070) && ((insn & 0x00600000) == 0x00200000) && (true)) { 689 if (((insn & 0x00000070) == 0x00000070) && ((insn & 0x00600000) == 0x00200000) && (true)) {
725 return state->Breakpoint_instance_; 690 return Breakpoint_instance_;
726 } 691 }
727 692
728 if (((insn & 0x00000070) == 0x00000070) && ((insn & 0x00600000) == 0x00600000) && (true)) { 693 if (((insn & 0x00000070) == 0x00000070) && ((insn & 0x00600000) == 0x00600000) && (true)) {
729 return state->Forbidden_instance_; 694 return Forbidden_instance_;
730 } 695 }
731 696
732 if ((true) && (true) && (true)) { 697 if ((true) && (true) && (true)) {
733 return state->Undefined_instance_; 698 return Undefined_instance_;
734 } 699 }
735 700
736 // Catch any attempt to fall through... 701 // Catch any attempt to fall through...
737 fprintf(stderr, "TABLE IS INCOMPLETE: misc could not parse %08X",insn.bits(31, 0)); 702 fprintf(stderr, "TABLE IS INCOMPLETE: misc could not parse %08X",insn.bits(31, 0));
738 return state->Forbidden_instance_; 703 return Forbidden_instance_;
739 } 704 }
705
740 706
741 /* 707 /*
742 * Implementation of table load_store_word_byte. 708 * Implementation of table load_store_word_byte.
743 * Specified by: See Section A5.3. 709 * Specified by: See Section A5.3.
744 */ 710 */
745 static inline const ClassDecoder &decode_load_store_word_byte( 711 const NamedClassDecoder &NamedArm32DecoderState::decode_load_store_word_byte(con st Instruction insn) const {
746 const Instruction insn, const NamedArm32DecoderState *state) {
747 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) == 0x00200000) && (true)) { 712 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x01200000) == 0x00200000) && (true)) {
748 return state->Forbidden_instance_; 713 return Forbidden_instance_;
749 } 714 }
750 715
751 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x00100000) == 0x00000000) && (true)) { 716 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x00100000) == 0x00000000) && (true)) {
752 return state->StoreImmediate_instance_; 717 return StoreImmediate_instance_;
753 } 718 }
754 719
755 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x00100000) == 0x00100000) && (true)) { 720 if (((insn & 0x02000000) == 0x00000000) && ((insn & 0x00100000) == 0x00100000) && (true)) {
756 return state->LoadImmediate_instance_; 721 return LoadImmediate_instance_;
757 } 722 }
758 723
759 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x01200000) == 0x00200000) && ((insn & 0x00000010) == 0x00000000)) { 724 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x01200000) == 0x00200000) && ((insn & 0x00000010) == 0x00000000)) {
760 return state->Forbidden_instance_; 725 return Forbidden_instance_;
761 } 726 }
762 727
763 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x00100000) == 0x00000000) && ((insn & 0x00000010) == 0x00000000)) { 728 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x00100000) == 0x00000000) && ((insn & 0x00000010) == 0x00000000)) {
764 return state->StoreRegister_instance_; 729 return StoreRegister_instance_;
765 } 730 }
766 731
767 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x00100000) == 0x00100000) && ((insn & 0x00000010) == 0x00000000)) { 732 if (((insn & 0x02000000) == 0x02000000) && ((insn & 0x00100000) == 0x00100000) && ((insn & 0x00000010) == 0x00000000)) {
768 return state->LoadRegister_instance_; 733 return LoadRegister_instance_;
769 } 734 }
770 735
771 // Catch any attempt to fall through... 736 // Catch any attempt to fall through...
772 fprintf(stderr, "TABLE IS INCOMPLETE: load_store_word_byte could not parse %08 X",insn.bits(31,0)); 737 fprintf(stderr, "TABLE IS INCOMPLETE: load_store_word_byte could not parse %08 X",insn.bits(31,0));
773 return state->Forbidden_instance_; 738 return Forbidden_instance_;
774 } 739 }
740
775 741
776 /* 742 /*
777 * Implementation of table media. 743 * Implementation of table media.
778 * Specified by: See Section A5.4. 744 * Specified by: See Section A5.4.
779 */ 745 */
780 static inline const ClassDecoder &decode_media( 746 const NamedClassDecoder &NamedArm32DecoderState::decode_media(const Instruction insn) const {
781 const Instruction insn, const NamedArm32DecoderState *state) {
782 if (((insn & 0x01F00000) == 0x01800000) && ((insn & 0x000000E0) == 0x00000000) ) { 747 if (((insn & 0x01F00000) == 0x01800000) && ((insn & 0x000000E0) == 0x00000000) ) {
783 return state->Multiply_instance_; 748 return Multiply_instance_;
784 } 749 }
785 750
786 if (((insn & 0x01F00000) == 0x01F00000) && ((insn & 0x000000E0) == 0x000000E0) ) { 751 if (((insn & 0x01F00000) == 0x01F00000) && ((insn & 0x000000E0) == 0x000000E0) ) {
787 return state->Roadblock_instance_; 752 return Roadblock_instance_;
788 } 753 }
789 754
790 if (((insn & 0x01E00000) == 0x01C00000) && ((insn & 0x00000060) == 0x00000000) ) { 755 if (((insn & 0x01E00000) == 0x01C00000) && ((insn & 0x00000060) == 0x00000000) ) {
791 return state->DataProc_instance_; 756 return DataProc_instance_;
792 } 757 }
793 758
794 if (((insn & 0x01A00000) == 0x01A00000) && ((insn & 0x00000060) == 0x00000040) ) { 759 if (((insn & 0x01A00000) == 0x01A00000) && ((insn & 0x00000060) == 0x00000040) ) {
795 return state->DataProc_instance_; 760 return DataProc_instance_;
796 } 761 }
797 762
798 if (((insn & 0x01800000) == 0x00000000) && (true)) { 763 if (((insn & 0x01800000) == 0x00000000) && (true)) {
799 return decode_parallel_add_sub(insn, state); 764 return decode_parallel_add_sub(insn);
800 } 765 }
801 766
802 if (((insn & 0x01800000) == 0x00800000) && (true)) { 767 if (((insn & 0x01800000) == 0x00800000) && (true)) {
803 return decode_pack_sat_rev(insn, state); 768 return decode_pack_sat_rev(insn);
804 } 769 }
805 770
806 if (((insn & 0x01800000) == 0x01000000) && (true)) { 771 if (((insn & 0x01800000) == 0x01000000) && (true)) {
807 return decode_signed_mult(insn, state); 772 return decode_signed_mult(insn);
808 } 773 }
809 774
810 if ((true) && (true)) { 775 if ((true) && (true)) {
811 return state->Undefined_instance_; 776 return Undefined_instance_;
812 } 777 }
813 778
814 // Catch any attempt to fall through... 779 // Catch any attempt to fall through...
815 fprintf(stderr, "TABLE IS INCOMPLETE: media could not parse %08X",insn.bits(31 ,0)); 780 fprintf(stderr, "TABLE IS INCOMPLETE: media could not parse %08X",insn.bits(31 ,0));
816 return state->Forbidden_instance_; 781 return Forbidden_instance_;
817 } 782 }
783
818 784
819 /* 785 /*
820 * Implementation of table parallel_add_sub. 786 * Implementation of table parallel_add_sub.
821 * Specified by: See Sections A5.4.1, A5.4.2. 787 * Specified by: See Sections A5.4.1, A5.4.2.
822 */ 788 */
823 static inline const ClassDecoder &decode_parallel_add_sub( 789 const NamedClassDecoder &NamedArm32DecoderState::decode_parallel_add_sub(const I nstruction insn) const {
824 const Instruction insn, const NamedArm32DecoderState *state) {
825 if (((insn & 0x00300000) == 0x00200000) && ((insn & 0x000000E0) == 0x00000080) ) { 790 if (((insn & 0x00300000) == 0x00200000) && ((insn & 0x000000E0) == 0x00000080) ) {
826 return state->DataProc_instance_; 791 return DataProc_instance_;
827 } 792 }
828 793
829 if (((insn & 0x00300000) == 0x00200000) && ((insn & 0x000000E0) == 0x000000E0) ) { 794 if (((insn & 0x00300000) == 0x00200000) && ((insn & 0x000000E0) == 0x000000E0) ) {
830 return state->DataProc_instance_; 795 return DataProc_instance_;
831 } 796 }
832 797
833 if (((insn & 0x00300000) == 0x00200000) && ((insn & 0x00000080) == 0x00000000) ) { 798 if (((insn & 0x00300000) == 0x00200000) && ((insn & 0x00000080) == 0x00000000) ) {
834 return state->DataProc_instance_; 799 return DataProc_instance_;
835 } 800 }
836 801
837 if (((insn & 0x00100000) == 0x00100000) && ((insn & 0x000000E0) == 0x00000080) ) { 802 if (((insn & 0x00100000) == 0x00100000) && ((insn & 0x000000E0) == 0x00000080) ) {
838 return state->DataProc_instance_; 803 return DataProc_instance_;
839 } 804 }
840 805
841 if (((insn & 0x00100000) == 0x00100000) && ((insn & 0x000000E0) == 0x000000E0) ) { 806 if (((insn & 0x00100000) == 0x00100000) && ((insn & 0x000000E0) == 0x000000E0) ) {
842 return state->DataProc_instance_; 807 return DataProc_instance_;
843 } 808 }
844 809
845 if (((insn & 0x00100000) == 0x00100000) && ((insn & 0x00000080) == 0x00000000) ) { 810 if (((insn & 0x00100000) == 0x00100000) && ((insn & 0x00000080) == 0x00000000) ) {
846 return state->DataProc_instance_; 811 return DataProc_instance_;
847 } 812 }
848 813
849 if ((true) && (true)) { 814 if ((true) && (true)) {
850 return state->Undefined_instance_; 815 return Undefined_instance_;
851 } 816 }
852 817
853 // Catch any attempt to fall through... 818 // Catch any attempt to fall through...
854 fprintf(stderr, "TABLE IS INCOMPLETE: parallel_add_sub could not parse %08X",i nsn.bits(31,0)); 819 fprintf(stderr, "TABLE IS INCOMPLETE: parallel_add_sub could not parse %08X",i nsn.bits(31,0));
855 return state->Forbidden_instance_; 820 return Forbidden_instance_;
856 } 821 }
822
857 823
858 /* 824 /*
859 * Implementation of table pack_sat_rev. 825 * Implementation of table pack_sat_rev.
860 * Specified by: See Section A5.4.3. 826 * Specified by: See Section A5.4.3.
861 */ 827 */
862 static inline const ClassDecoder &decode_pack_sat_rev( 828 const NamedClassDecoder &NamedArm32DecoderState::decode_pack_sat_rev(const Instr uction insn) const {
863 const Instruction insn, const NamedArm32DecoderState *state) {
864 if (((insn & 0x00700000) == 0x00000000) && ((insn & 0x000000E0) == 0x000000A0) ) { 829 if (((insn & 0x00700000) == 0x00000000) && ((insn & 0x000000E0) == 0x000000A0) ) {
865 return state->PackSatRev_instance_; 830 return PackSatRev_instance_;
866 } 831 }
867 832
868 if (((insn & 0x00700000) == 0x00000000) && ((insn & 0x00000020) == 0x00000000) ) { 833 if (((insn & 0x00700000) == 0x00000000) && ((insn & 0x00000020) == 0x00000000) ) {
869 return state->PackSatRev_instance_; 834 return PackSatRev_instance_;
870 } 835 }
871 836
872 if (((insn & 0x00700000) == 0x00400000) && ((insn & 0x000000E0) == 0x00000060) ) { 837 if (((insn & 0x00700000) == 0x00400000) && ((insn & 0x000000E0) == 0x00000060) ) {
873 return state->PackSatRev_instance_; 838 return PackSatRev_instance_;
874 } 839 }
875 840
876 if (((insn & 0x00700000) == 0x00600000) && ((insn & 0x000000A0) == 0x00000020) ) { 841 if (((insn & 0x00700000) == 0x00600000) && ((insn & 0x000000A0) == 0x00000020) ) {
877 return state->PackSatRev_instance_; 842 return PackSatRev_instance_;
878 } 843 }
879 844
880 if (((insn & 0x00700000) == 0x00700000) && ((insn & 0x000000E0) == 0x00000020) ) { 845 if (((insn & 0x00700000) == 0x00700000) && ((insn & 0x000000E0) == 0x00000020) ) {
881 return state->PackSatRev_instance_; 846 return PackSatRev_instance_;
882 } 847 }
883 848
884 if (((insn & 0x00300000) == 0x00300000) && ((insn & 0x000000E0) == 0x00000060) ) { 849 if (((insn & 0x00300000) == 0x00300000) && ((insn & 0x000000E0) == 0x00000060) ) {
885 return state->PackSatRev_instance_; 850 return PackSatRev_instance_;
886 } 851 }
887 852
888 if (((insn & 0x00300000) == 0x00300000) && ((insn & 0x000000E0) == 0x000000A0) ) { 853 if (((insn & 0x00300000) == 0x00300000) && ((insn & 0x000000E0) == 0x000000A0) ) {
889 return state->PackSatRev_instance_; 854 return PackSatRev_instance_;
890 } 855 }
891 856
892 if (((insn & 0x00500000) == 0x00000000) && ((insn & 0x000000E0) == 0x00000060) ) { 857 if (((insn & 0x00500000) == 0x00000000) && ((insn & 0x000000E0) == 0x00000060) ) {
893 return state->PackSatRev_instance_; 858 return PackSatRev_instance_;
894 } 859 }
895 860
896 if (((insn & 0x00600000) == 0x00200000) && ((insn & 0x000000E0) == 0x00000020) ) { 861 if (((insn & 0x00600000) == 0x00200000) && ((insn & 0x000000E0) == 0x00000020) ) {
897 return state->PackSatRev_instance_; 862 return PackSatRev_instance_;
898 } 863 }
899 864
900 if (((insn & 0x00200000) == 0x00200000) && ((insn & 0x00000020) == 0x00000000) ) { 865 if (((insn & 0x00200000) == 0x00200000) && ((insn & 0x00000020) == 0x00000000) ) {
901 return state->PackSatRev_instance_; 866 return PackSatRev_instance_;
902 } 867 }
903 868
904 if ((true) && (true)) { 869 if ((true) && (true)) {
905 return state->Undefined_instance_; 870 return Undefined_instance_;
906 } 871 }
907 872
908 // Catch any attempt to fall through... 873 // Catch any attempt to fall through...
909 fprintf(stderr, "TABLE IS INCOMPLETE: pack_sat_rev could not parse %08X",insn. bits(31,0)); 874 fprintf(stderr, "TABLE IS INCOMPLETE: pack_sat_rev could not parse %08X",insn. bits(31,0));
910 return state->Forbidden_instance_; 875 return Forbidden_instance_;
911 } 876 }
877
912 878
913 /* 879 /*
914 * Implementation of table signed_mult. 880 * Implementation of table signed_mult.
915 * Specified by: See Section A5.4.4. 881 * Specified by: See Section A5.4.4.
916 */ 882 */
917 static inline const ClassDecoder &decode_signed_mult( 883 const NamedClassDecoder &NamedArm32DecoderState::decode_signed_mult(const Instru ction insn) const {
918 const Instruction insn, const NamedArm32DecoderState *state) {
919 if (((insn & 0x00700000) == 0x00000000) && ((insn & 0x000000C0) == 0x00000040) && ((insn & 0x0000F000) != 0x0000F000)) { 884 if (((insn & 0x00700000) == 0x00000000) && ((insn & 0x000000C0) == 0x00000040) && ((insn & 0x0000F000) != 0x0000F000)) {
920 return state->Multiply_instance_; 885 return Multiply_instance_;
921 } 886 }
922 887
923 if (((insn & 0x00700000) == 0x00000000) && ((insn & 0x00000080) == 0x00000000) && (true)) { 888 if (((insn & 0x00700000) == 0x00000000) && ((insn & 0x00000080) == 0x00000000) && (true)) {
924 return state->Multiply_instance_; 889 return Multiply_instance_;
925 } 890 }
926 891
927 if (((insn & 0x00700000) == 0x00400000) && ((insn & 0x00000080) == 0x00000000) && (true)) { 892 if (((insn & 0x00700000) == 0x00400000) && ((insn & 0x00000080) == 0x00000000) && (true)) {
928 return state->LongMultiply_instance_; 893 return LongMultiply_instance_;
929 } 894 }
930 895
931 if (((insn & 0x00700000) == 0x00500000) && ((insn & 0x000000C0) == 0x00000000) && (true)) { 896 if (((insn & 0x00700000) == 0x00500000) && ((insn & 0x000000C0) == 0x00000000) && (true)) {
932 return state->Multiply_instance_; 897 return Multiply_instance_;
933 } 898 }
934 899
935 if (((insn & 0x00700000) == 0x00500000) && ((insn & 0x000000C0) == 0x000000C0) && (true)) { 900 if (((insn & 0x00700000) == 0x00500000) && ((insn & 0x000000C0) == 0x000000C0) && (true)) {
936 return state->Multiply_instance_; 901 return Multiply_instance_;
937 } 902 }
938 903
939 if ((true) && (true) && (true)) { 904 if ((true) && (true) && (true)) {
940 return state->Undefined_instance_; 905 return Undefined_instance_;
941 } 906 }
942 907
943 // Catch any attempt to fall through... 908 // Catch any attempt to fall through...
944 fprintf(stderr, "TABLE IS INCOMPLETE: signed_mult could not parse %08X",insn.b its(31,0)); 909 fprintf(stderr, "TABLE IS INCOMPLETE: signed_mult could not parse %08X",insn.b its(31,0));
945 return state->Forbidden_instance_; 910 return Forbidden_instance_;
946 } 911 }
912
947 913
948 /* 914 /*
949 * Implementation of table branch_block_xfer. 915 * Implementation of table branch_block_xfer.
950 * Specified by: See Section A5.5. 916 * Specified by: See Section A5.5.
951 */ 917 */
952 static inline const ClassDecoder &decode_branch_block_xfer( 918 const NamedClassDecoder &NamedArm32DecoderState::decode_branch_block_xfer(const Instruction insn) const {
953 const Instruction insn, const NamedArm32DecoderState *state) {
954 if (((insn & 0x02500000) == 0x00000000)) { 919 if (((insn & 0x02500000) == 0x00000000)) {
955 return state->StoreImmediate_instance_; 920 return StoreImmediate_instance_;
956 } 921 }
957 922
958 if (((insn & 0x02500000) == 0x00100000)) { 923 if (((insn & 0x02500000) == 0x00100000)) {
959 return state->LoadMultiple_instance_; 924 return LoadMultiple_instance_;
960 } 925 }
961 926
962 if (((insn & 0x02400000) == 0x00400000)) { 927 if (((insn & 0x02400000) == 0x00400000)) {
963 return state->Forbidden_instance_; 928 return Forbidden_instance_;
964 } 929 }
965 930
966 if (((insn & 0x02000000) == 0x02000000)) { 931 if (((insn & 0x02000000) == 0x02000000)) {
967 return state->Branch_instance_; 932 return Branch_instance_;
968 } 933 }
969 934
970 // Catch any attempt to fall through... 935 // Catch any attempt to fall through...
971 fprintf(stderr, "TABLE IS INCOMPLETE: branch_block_xfer could not parse %08X", insn.bits(31,0)); 936 fprintf(stderr, "TABLE IS INCOMPLETE: branch_block_xfer could not parse %08X", insn.bits(31,0));
972 return state->Forbidden_instance_; 937 return Forbidden_instance_;
973 } 938 }
939
974 940
975 /* 941 /*
976 * Implementation of table super_cop. 942 * Implementation of table super_cop.
977 * Specified by: See Section A5.6. 943 * Specified by: See Section A5.6.
978 */ 944 */
979 static inline const ClassDecoder &decode_super_cop( 945 const NamedClassDecoder &NamedArm32DecoderState::decode_super_cop(const Instruct ion insn) const {
980 const Instruction insn, const NamedArm32DecoderState *state) {
981 if (((insn & 0x03F00000) == 0x00400000) && (true)) { 946 if (((insn & 0x03F00000) == 0x00400000) && (true)) {
982 return state->CoprocessorOp_instance_; 947 return CoprocessorOp_instance_;
983 } 948 }
984 949
985 if (((insn & 0x03F00000) == 0x00500000) && (true)) { 950 if (((insn & 0x03F00000) == 0x00500000) && (true)) {
986 return state->MoveDoubleFromCoprocessor_instance_; 951 return MoveDoubleFromCoprocessor_instance_;
987 } 952 }
988 953
989 if (((insn & 0x03E00000) == 0x00000000) && (true)) { 954 if (((insn & 0x03E00000) == 0x00000000) && (true)) {
990 return state->Undefined_instance_; 955 return Undefined_instance_;
991 } 956 }
992 957
993 if (((insn & 0x03100000) == 0x02000000) && ((insn & 0x00000010) == 0x00000010) ) { 958 if (((insn & 0x03100000) == 0x02000000) && ((insn & 0x00000010) == 0x00000010) ) {
994 return state->CoprocessorOp_instance_; 959 return CoprocessorOp_instance_;
995 } 960 }
996 961
997 if (((insn & 0x03100000) == 0x02100000) && ((insn & 0x00000010) == 0x00000010) ) { 962 if (((insn & 0x03100000) == 0x02100000) && ((insn & 0x00000010) == 0x00000010) ) {
998 return state->MoveFromCoprocessor_instance_; 963 return MoveFromCoprocessor_instance_;
999 } 964 }
1000 965
1001 if (((insn & 0x02100000) == 0x00000000) && (true)) { 966 if (((insn & 0x02100000) == 0x00000000) && (true)) {
1002 return state->StoreCoprocessor_instance_; 967 return StoreCoprocessor_instance_;
1003 } 968 }
1004 969
1005 if (((insn & 0x02100000) == 0x00100000) && (true)) { 970 if (((insn & 0x02100000) == 0x00100000) && (true)) {
1006 return state->LoadCoprocessor_instance_; 971 return LoadCoprocessor_instance_;
1007 } 972 }
1008 973
1009 if (((insn & 0x03000000) == 0x02000000) && ((insn & 0x00000010) == 0x00000000) ) { 974 if (((insn & 0x03000000) == 0x02000000) && ((insn & 0x00000010) == 0x00000000) ) {
1010 return state->CoprocessorOp_instance_; 975 return CoprocessorOp_instance_;
1011 } 976 }
1012 977
1013 if (((insn & 0x03000000) == 0x03000000) && (true)) { 978 if (((insn & 0x03000000) == 0x03000000) && (true)) {
1014 return state->Forbidden_instance_; 979 return Forbidden_instance_;
1015 } 980 }
1016 981
1017 // Catch any attempt to fall through... 982 // Catch any attempt to fall through...
1018 fprintf(stderr, "TABLE IS INCOMPLETE: super_cop could not parse %08X",insn.bit s(31,0)); 983 fprintf(stderr, "TABLE IS INCOMPLETE: super_cop could not parse %08X",insn.bit s(31,0));
1019 return state->Forbidden_instance_; 984 return Forbidden_instance_;
1020 } 985 }
986
1021 987
1022 /* 988 /*
1023 * Implementation of table unconditional. 989 * Implementation of table unconditional.
1024 * Specified by: See Section A5.7. 990 * Specified by: See Section A5.7.
1025 */ 991 */
1026 static inline const ClassDecoder &decode_unconditional( 992 const NamedClassDecoder &NamedArm32DecoderState::decode_unconditional(const Inst ruction insn) const {
1027 const Instruction insn, const NamedArm32DecoderState *state) {
1028 if (((insn & 0x0FF00000) == 0x0C400000) && (true) && (true)) { 993 if (((insn & 0x0FF00000) == 0x0C400000) && (true) && (true)) {
1029 return state->CoprocessorOp_instance_; 994 return CoprocessorOp_instance_;
1030 } 995 }
1031 996
1032 if (((insn & 0x0FF00000) == 0x0C500000) && (true) && (true)) { 997 if (((insn & 0x0FF00000) == 0x0C500000) && (true) && (true)) {
1033 return state->MoveDoubleFromCoprocessor_instance_; 998 return MoveDoubleFromCoprocessor_instance_;
1034 } 999 }
1035 1000
1036 if (((insn & 0x0FB00000) == 0x0C200000) && (true) && (true)) { 1001 if (((insn & 0x0FB00000) == 0x0C200000) && (true) && (true)) {
1037 return state->StoreCoprocessor_instance_; 1002 return StoreCoprocessor_instance_;
1038 } 1003 }
1039 1004
1040 if (((insn & 0x0FB00000) == 0x0C300000) && (true) && ((insn & 0x000F0000) != 0 x000F0000)) { 1005 if (((insn & 0x0FB00000) == 0x0C300000) && (true) && ((insn & 0x000F0000) != 0 x000F0000)) {
1041 return state->LoadCoprocessor_instance_; 1006 return LoadCoprocessor_instance_;
1042 } 1007 }
1043 1008
1044 if (((insn & 0x0F900000) == 0x0C800000) && (true) && (true)) { 1009 if (((insn & 0x0F900000) == 0x0C800000) && (true) && (true)) {
1045 return state->StoreCoprocessor_instance_; 1010 return StoreCoprocessor_instance_;
1046 } 1011 }
1047 1012
1048 if (((insn & 0x0F900000) == 0x0C900000) && (true) && ((insn & 0x000F0000) == 0 x000F0000)) { 1013 if (((insn & 0x0F900000) == 0x0C900000) && (true) && ((insn & 0x000F0000) == 0 x000F0000)) {
1049 return state->LoadCoprocessor_instance_; 1014 return LoadCoprocessor_instance_;
1050 } 1015 }
1051 1016
1052 if (((insn & 0x0E500000) == 0x08100000) && (true) && (true)) { 1017 if (((insn & 0x0E500000) == 0x08100000) && (true) && (true)) {
1053 return state->Forbidden_instance_; 1018 return Forbidden_instance_;
1054 } 1019 }
1055 1020
1056 if (((insn & 0x0E500000) == 0x08400000) && (true) && (true)) { 1021 if (((insn & 0x0E500000) == 0x08400000) && (true) && (true)) {
1057 return state->Forbidden_instance_; 1022 return Forbidden_instance_;
1058 } 1023 }
1059 1024
1060 if (((insn & 0x0F100000) == 0x0D000000) && (true) && (true)) { 1025 if (((insn & 0x0F100000) == 0x0D000000) && (true) && (true)) {
1061 return state->StoreCoprocessor_instance_; 1026 return StoreCoprocessor_instance_;
1062 } 1027 }
1063 1028
1064 if (((insn & 0x0F100000) == 0x0D100000) && (true) && ((insn & 0x000F0000) == 0 x000F0000)) { 1029 if (((insn & 0x0F100000) == 0x0D100000) && (true) && ((insn & 0x000F0000) == 0 x000F0000)) {
1065 return state->LoadCoprocessor_instance_; 1030 return LoadCoprocessor_instance_;
1066 } 1031 }
1067 1032
1068 if (((insn & 0x0F100000) == 0x0E000000) && ((insn & 0x00000010) == 0x00000010) && (true)) { 1033 if (((insn & 0x0F100000) == 0x0E000000) && ((insn & 0x00000010) == 0x00000010) && (true)) {
1069 return state->CoprocessorOp_instance_; 1034 return CoprocessorOp_instance_;
1070 } 1035 }
1071 1036
1072 if (((insn & 0x0F100000) == 0x0E100000) && ((insn & 0x00000010) == 0x00000010) && (true)) { 1037 if (((insn & 0x0F100000) == 0x0E100000) && ((insn & 0x00000010) == 0x00000010) && (true)) {
1073 return state->MoveFromCoprocessor_instance_; 1038 return MoveFromCoprocessor_instance_;
1074 } 1039 }
1075 1040
1076 if (((insn & 0x0F000000) == 0x0E000000) && ((insn & 0x00000010) == 0x00000000) && (true)) { 1041 if (((insn & 0x0F000000) == 0x0E000000) && ((insn & 0x00000010) == 0x00000000) && (true)) {
1077 return state->CoprocessorOp_instance_; 1042 return CoprocessorOp_instance_;
1078 } 1043 }
1079 1044
1080 if (((insn & 0x0E000000) == 0x0A000000) && (true) && (true)) { 1045 if (((insn & 0x0E000000) == 0x0A000000) && (true) && (true)) {
1081 return state->Forbidden_instance_; 1046 return Forbidden_instance_;
1082 } 1047 }
1083 1048
1084 if (((insn & 0x08000000) == 0x00000000) && (true) && (true)) { 1049 if (((insn & 0x08000000) == 0x00000000) && (true) && (true)) {
1085 return decode_misc_hints_simd(insn, state); 1050 return decode_misc_hints_simd(insn);
1086 } 1051 }
1087 1052
1088 if ((true) && (true) && (true)) { 1053 if ((true) && (true) && (true)) {
1089 return state->Undefined_instance_; 1054 return Undefined_instance_;
1090 } 1055 }
1091 1056
1092 // Catch any attempt to fall through... 1057 // Catch any attempt to fall through...
1093 fprintf(stderr, "TABLE IS INCOMPLETE: unconditional could not parse %08X",insn .bits(31,0)); 1058 fprintf(stderr, "TABLE IS INCOMPLETE: unconditional could not parse %08X",insn .bits(31,0));
1094 return state->Forbidden_instance_; 1059 return Forbidden_instance_;
1095 } 1060 }
1061
1096 1062
1097 /* 1063 /*
1098 * Implementation of table misc_hints_simd. 1064 * Implementation of table misc_hints_simd.
1099 * Specified by: See Section A5.7.1. 1065 * Specified by: See Section A5.7.1.
1100 */ 1066 */
1101 static inline const ClassDecoder &decode_misc_hints_simd( 1067 const NamedClassDecoder &NamedArm32DecoderState::decode_misc_hints_simd(const In struction insn) const {
1102 const Instruction insn, const NamedArm32DecoderState *state) {
1103 if (((insn & 0x07F00000) == 0x01000000) && ((insn & 0x000000F0) == 0x00000000) && ((insn & 0x00010000) == 0x00010000)) { 1068 if (((insn & 0x07F00000) == 0x01000000) && ((insn & 0x000000F0) == 0x00000000) && ((insn & 0x00010000) == 0x00010000)) {
1104 return state->Forbidden_instance_; 1069 return Forbidden_instance_;
1105 } 1070 }
1106 1071
1107 if (((insn & 0x07F00000) == 0x01000000) && ((insn & 0x00000020) == 0x00000000) && ((insn & 0x00010000) == 0x00000000)) { 1072 if (((insn & 0x07F00000) == 0x01000000) && ((insn & 0x00000020) == 0x00000000) && ((insn & 0x00010000) == 0x00000000)) {
1108 return state->Forbidden_instance_; 1073 return Forbidden_instance_;
1109 } 1074 }
1110 1075
1111 if (((insn & 0x07F00000) == 0x05700000) && ((insn & 0x000000F0) == 0x00000010) && (true)) { 1076 if (((insn & 0x07F00000) == 0x05700000) && ((insn & 0x000000F0) == 0x00000010) && (true)) {
1112 return state->EffectiveNoOp_instance_; 1077 return EffectiveNoOp_instance_;
1113 } 1078 }
1114 1079
1115 if (((insn & 0x07F00000) == 0x05700000) && ((insn & 0x000000F0) == 0x00000050) && (true)) { 1080 if (((insn & 0x07F00000) == 0x05700000) && ((insn & 0x000000F0) == 0x00000050) && (true)) {
1116 return state->EffectiveNoOp_instance_; 1081 return EffectiveNoOp_instance_;
1117 } 1082 }
1118 1083
1119 if (((insn & 0x07F00000) == 0x05700000) && ((insn & 0x000000D0) == 0x00000040) && (true)) { 1084 if (((insn & 0x07F00000) == 0x05700000) && ((insn & 0x000000D0) == 0x00000040) && (true)) {
1120 return state->EffectiveNoOp_instance_; 1085 return EffectiveNoOp_instance_;
1121 } 1086 }
1122 1087
1123 if (((insn & 0x07700000) == 0x04100000) && (true) && (true)) { 1088 if (((insn & 0x07700000) == 0x04100000) && (true) && (true)) {
1124 return state->EffectiveNoOp_instance_; 1089 return EffectiveNoOp_instance_;
1125 } 1090 }
1126 1091
1127 if (((insn & 0x07700000) == 0x04500000) && (true) && (true)) { 1092 if (((insn & 0x07700000) == 0x04500000) && (true) && (true)) {
1128 return state->EffectiveNoOp_instance_; 1093 return EffectiveNoOp_instance_;
1129 } 1094 }
1130 1095
1131 if (((insn & 0x07700000) == 0x05100000) && (true) && ((insn & 0x000F0000) != 0 x000F0000)) { 1096 if (((insn & 0x07700000) == 0x05100000) && (true) && ((insn & 0x000F0000) != 0 x000F0000)) {
1132 return state->EffectiveNoOp_instance_; 1097 return EffectiveNoOp_instance_;
1133 } 1098 }
1134 1099
1135 if (((insn & 0x07700000) == 0x05100000) && (true) && ((insn & 0x000F0000) == 0 x000F0000)) { 1100 if (((insn & 0x07700000) == 0x05100000) && (true) && ((insn & 0x000F0000) == 0 x000F0000)) {
1136 return state->Unpredictable_instance_; 1101 return Unpredictable_instance_;
1137 } 1102 }
1138 1103
1139 if (((insn & 0x07700000) == 0x05500000) && (true) && (true)) { 1104 if (((insn & 0x07700000) == 0x05500000) && (true) && (true)) {
1140 return state->EffectiveNoOp_instance_; 1105 return EffectiveNoOp_instance_;
1141 } 1106 }
1142 1107
1143 if (((insn & 0x07700000) == 0x06500000) && ((insn & 0x00000010) == 0x00000000) && (true)) { 1108 if (((insn & 0x07700000) == 0x06500000) && ((insn & 0x00000010) == 0x00000000) && (true)) {
1144 return state->EffectiveNoOp_instance_; 1109 return EffectiveNoOp_instance_;
1145 } 1110 }
1146 1111
1147 if (((insn & 0x07700000) == 0x07500000) && ((insn & 0x00000010) == 0x00000000) && (true)) { 1112 if (((insn & 0x07700000) == 0x07500000) && ((insn & 0x00000010) == 0x00000000) && (true)) {
1148 return state->EffectiveNoOp_instance_; 1113 return EffectiveNoOp_instance_;
1149 } 1114 }
1150 1115
1151 if (((insn & 0x06700000) == 0x06100000) && ((insn & 0x00000010) == 0x00000000) && (true)) { 1116 if (((insn & 0x06700000) == 0x06100000) && ((insn & 0x00000010) == 0x00000000) && (true)) {
1152 return state->EffectiveNoOp_instance_; 1117 return EffectiveNoOp_instance_;
1153 } 1118 }
1154 1119
1155 if (((insn & 0x06300000) == 0x04300000) && (true) && (true)) { 1120 if (((insn & 0x06300000) == 0x04300000) && (true) && (true)) {
1156 return state->Unpredictable_instance_; 1121 return Unpredictable_instance_;
1157 } 1122 }
1158 1123
1159 if (((insn & 0x06300000) == 0x06300000) && ((insn & 0x00000010) == 0x00000000) && (true)) { 1124 if (((insn & 0x06300000) == 0x06300000) && ((insn & 0x00000010) == 0x00000000) && (true)) {
1160 return state->Unpredictable_instance_; 1125 return Unpredictable_instance_;
1161 } 1126 }
1162 1127
1163 if (((insn & 0x07100000) == 0x04000000) && (true) && (true)) { 1128 if (((insn & 0x07100000) == 0x04000000) && (true) && (true)) {
1164 return decode_simd_load_store(insn, state); 1129 return decode_simd_load_store(insn);
1165 } 1130 }
1166 1131
1167 if (((insn & 0x06000000) == 0x02000000) && (true) && (true)) { 1132 if (((insn & 0x06000000) == 0x02000000) && (true) && (true)) {
1168 return decode_simd_dp(insn, state); 1133 return decode_simd_dp(insn);
1169 } 1134 }
1170 1135
1171 if ((true) && (true) && (true)) { 1136 if ((true) && (true) && (true)) {
1172 return state->Undefined_instance_; 1137 return Undefined_instance_;
1173 } 1138 }
1174 1139
1175 // Catch any attempt to fall through... 1140 // Catch any attempt to fall through...
1176 fprintf(stderr, "TABLE IS INCOMPLETE: misc_hints_simd could not parse %08X",in sn.bits(31,0)); 1141 fprintf(stderr, "TABLE IS INCOMPLETE: misc_hints_simd could not parse %08X",in sn.bits(31,0));
1177 return state->Forbidden_instance_; 1142 return Forbidden_instance_;
1178 } 1143 }
1144
1179 1145
1180 /* 1146 /*
1181 * Implementation of table simd_dp. 1147 * Implementation of table simd_dp.
1182 * Specified by: See Section A7.4. 1148 * Specified by: See Section A7.4.
1183 */ 1149 */
1184 static inline const ClassDecoder &decode_simd_dp( 1150 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_dp(const Instructio n insn) const {
1185 const Instruction insn, const NamedArm32DecoderState *state) {
1186 if (((insn & 0x01000000) == 0x00000000) && ((insn & 0x00B00000) == 0x00B00000) && (true) && ((insn & 0x00000010) == 0x00000000)) { 1151 if (((insn & 0x01000000) == 0x00000000) && ((insn & 0x00B00000) == 0x00B00000) && (true) && ((insn & 0x00000010) == 0x00000000)) {
1187 return state->EffectiveNoOp_instance_; 1152 return EffectiveNoOp_instance_;
1188 } 1153 }
1189 1154
1190 if (((insn & 0x01000000) == 0x01000000) && ((insn & 0x00B00000) == 0x00B00000) && ((insn & 0x00000F00) == 0x00000C00) && ((insn & 0x00000090) == 0x00000000)) { 1155 if (((insn & 0x01000000) == 0x01000000) && ((insn & 0x00B00000) == 0x00B00000) && ((insn & 0x00000F00) == 0x00000C00) && ((insn & 0x00000090) == 0x00000000)) {
1191 return state->EffectiveNoOp_instance_; 1156 return EffectiveNoOp_instance_;
1192 } 1157 }
1193 1158
1194 if (((insn & 0x01000000) == 0x01000000) && ((insn & 0x00B00000) == 0x00B00000) && ((insn & 0x00000C00) == 0x00000800) && ((insn & 0x00000010) == 0x00000000)) { 1159 if (((insn & 0x01000000) == 0x01000000) && ((insn & 0x00B00000) == 0x00B00000) && ((insn & 0x00000C00) == 0x00000800) && ((insn & 0x00000010) == 0x00000000)) {
1195 return state->EffectiveNoOp_instance_; 1160 return EffectiveNoOp_instance_;
1196 } 1161 }
1197 1162
1198 if (((insn & 0x01000000) == 0x01000000) && ((insn & 0x00B00000) == 0x00B00000) && ((insn & 0x00000800) == 0x00000000) && ((insn & 0x00000010) == 0x00000000)) { 1163 if (((insn & 0x01000000) == 0x01000000) && ((insn & 0x00B00000) == 0x00B00000) && ((insn & 0x00000800) == 0x00000000) && ((insn & 0x00000010) == 0x00000000)) {
1199 return decode_simd_dp_2misc(insn, state); 1164 return decode_simd_dp_2misc(insn);
1200 } 1165 }
1201 1166
1202 if ((true) && ((insn & 0x00B80000) == 0x00800000) && (true) && ((insn & 0x0000 0090) == 0x00000010)) { 1167 if ((true) && ((insn & 0x00B80000) == 0x00800000) && (true) && ((insn & 0x0000 0090) == 0x00000010)) {
1203 return decode_simd_dp_1imm(insn, state); 1168 return decode_simd_dp_1imm(insn);
1204 } 1169 }
1205 1170
1206 if ((true) && ((insn & 0x00B80000) == 0x00880000) && (true) && ((insn & 0x0000 0090) == 0x00000010)) { 1171 if ((true) && ((insn & 0x00B80000) == 0x00880000) && (true) && ((insn & 0x0000 0090) == 0x00000010)) {
1207 return decode_simd_dp_2shift(insn, state); 1172 return decode_simd_dp_2shift(insn);
1208 } 1173 }
1209 1174
1210 if ((true) && ((insn & 0x00B00000) == 0x00900000) && (true) && ((insn & 0x0000 0090) == 0x00000010)) { 1175 if ((true) && ((insn & 0x00B00000) == 0x00900000) && (true) && ((insn & 0x0000 0090) == 0x00000010)) {
1211 return decode_simd_dp_2shift(insn, state); 1176 return decode_simd_dp_2shift(insn);
1212 } 1177 }
1213 1178
1214 if ((true) && ((insn & 0x00B00000) == 0x00A00000) && (true) && ((insn & 0x0000 0050) == 0x00000000)) { 1179 if ((true) && ((insn & 0x00B00000) == 0x00A00000) && (true) && ((insn & 0x0000 0050) == 0x00000000)) {
1215 return decode_simd_dp_3diff(insn, state); 1180 return decode_simd_dp_3diff(insn);
1216 } 1181 }
1217 1182
1218 if ((true) && ((insn & 0x00B00000) == 0x00A00000) && (true) && ((insn & 0x0000 0050) == 0x00000040)) { 1183 if ((true) && ((insn & 0x00B00000) == 0x00A00000) && (true) && ((insn & 0x0000 0050) == 0x00000040)) {
1219 return decode_simd_dp_2scalar(insn, state); 1184 return decode_simd_dp_2scalar(insn);
1220 } 1185 }
1221 1186
1222 if ((true) && ((insn & 0x00A00000) == 0x00800000) && (true) && ((insn & 0x0000 0050) == 0x00000000)) { 1187 if ((true) && ((insn & 0x00A00000) == 0x00800000) && (true) && ((insn & 0x0000 0050) == 0x00000000)) {
1223 return decode_simd_dp_3diff(insn, state); 1188 return decode_simd_dp_3diff(insn);
1224 } 1189 }
1225 1190
1226 if ((true) && ((insn & 0x00A00000) == 0x00800000) && (true) && ((insn & 0x0000 0050) == 0x00000040)) { 1191 if ((true) && ((insn & 0x00A00000) == 0x00800000) && (true) && ((insn & 0x0000 0050) == 0x00000040)) {
1227 return decode_simd_dp_2scalar(insn, state); 1192 return decode_simd_dp_2scalar(insn);
1228 } 1193 }
1229 1194
1230 if ((true) && ((insn & 0x00A00000) == 0x00A00000) && (true) && ((insn & 0x0000 0090) == 0x00000010)) { 1195 if ((true) && ((insn & 0x00A00000) == 0x00A00000) && (true) && ((insn & 0x0000 0090) == 0x00000010)) {
1231 return decode_simd_dp_2shift(insn, state); 1196 return decode_simd_dp_2shift(insn);
1232 } 1197 }
1233 1198
1234 if ((true) && ((insn & 0x00800000) == 0x00000000) && (true) && (true)) { 1199 if ((true) && ((insn & 0x00800000) == 0x00000000) && (true) && (true)) {
1235 return decode_simd_dp_3same(insn, state); 1200 return decode_simd_dp_3same(insn);
1236 } 1201 }
1237 1202
1238 if ((true) && ((insn & 0x00800000) == 0x00800000) && (true) && ((insn & 0x0000 0090) == 0x00000090)) { 1203 if ((true) && ((insn & 0x00800000) == 0x00800000) && (true) && ((insn & 0x0000 0090) == 0x00000090)) {
1239 return decode_simd_dp_2shift(insn, state); 1204 return decode_simd_dp_2shift(insn);
1240 } 1205 }
1241 1206
1242 if ((true) && (true) && (true) && (true)) { 1207 if ((true) && (true) && (true) && (true)) {
1243 return state->Undefined_instance_; 1208 return Undefined_instance_;
1244 } 1209 }
1245 1210
1246 // Catch any attempt to fall through... 1211 // Catch any attempt to fall through...
1247 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp could not parse %08X",insn.bits( 31,0)); 1212 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp could not parse %08X",insn.bits( 31,0));
1248 return state->Forbidden_instance_; 1213 return Forbidden_instance_;
1249 } 1214 }
1215
1250 1216
1251 /* 1217 /*
1252 * Implementation of table simd_dp_3same. 1218 * Implementation of table simd_dp_3same.
1253 * Specified by: See Section A7.4.1. 1219 * Specified by: See Section A7.4.1.
1254 */ 1220 */
1255 static inline const ClassDecoder &decode_simd_dp_3same( 1221 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_dp_3same(const Inst ruction insn) const {
1256 const Instruction insn, const NamedArm32DecoderState *state) {
1257 if (((insn & 0x00000F00) == 0x00000100) && ((insn & 0x00000010) == 0x00000010) && (true) && (true)) { 1222 if (((insn & 0x00000F00) == 0x00000100) && ((insn & 0x00000010) == 0x00000010) && (true) && (true)) {
1258 return state->EffectiveNoOp_instance_; 1223 return EffectiveNoOp_instance_;
1259 } 1224 }
1260 1225
1261 if (((insn & 0x00000F00) == 0x00000500) && (true) && (true) && (true)) { 1226 if (((insn & 0x00000F00) == 0x00000500) && (true) && (true) && (true)) {
1262 return state->EffectiveNoOp_instance_; 1227 return EffectiveNoOp_instance_;
1263 } 1228 }
1264 1229
1265 if (((insn & 0x00000F00) == 0x00000900) && (true) && (true) && (true)) { 1230 if (((insn & 0x00000F00) == 0x00000900) && (true) && (true) && (true)) {
1266 return state->EffectiveNoOp_instance_; 1231 return EffectiveNoOp_instance_;
1267 } 1232 }
1268 1233
1269 if (((insn & 0x00000F00) == 0x00000B00) && ((insn & 0x00000010) == 0x00000000) && (true) && (true)) { 1234 if (((insn & 0x00000F00) == 0x00000B00) && ((insn & 0x00000010) == 0x00000000) && (true) && (true)) {
1270 return state->EffectiveNoOp_instance_; 1235 return EffectiveNoOp_instance_;
1271 } 1236 }
1272 1237
1273 if (((insn & 0x00000F00) == 0x00000D00) && ((insn & 0x00000010) == 0x00000000) && ((insn & 0x01000000) == 0x01000000) && (true)) { 1238 if (((insn & 0x00000F00) == 0x00000D00) && ((insn & 0x00000010) == 0x00000000) && ((insn & 0x01000000) == 0x01000000) && (true)) {
1274 return state->EffectiveNoOp_instance_; 1239 return EffectiveNoOp_instance_;
1275 } 1240 }
1276 1241
1277 if (((insn & 0x00000F00) == 0x00000D00) && ((insn & 0x00000010) == 0x00000010) && ((insn & 0x01000000) == 0x01000000) && ((insn & 0x00200000) == 0x00000000)) { 1242 if (((insn & 0x00000F00) == 0x00000D00) && ((insn & 0x00000010) == 0x00000010) && ((insn & 0x01000000) == 0x01000000) && ((insn & 0x00200000) == 0x00000000)) {
1278 return state->EffectiveNoOp_instance_; 1243 return EffectiveNoOp_instance_;
1279 } 1244 }
1280 1245
1281 if (((insn & 0x00000F00) == 0x00000D00) && (true) && ((insn & 0x01000000) == 0 x00000000) && (true)) { 1246 if (((insn & 0x00000F00) == 0x00000D00) && (true) && ((insn & 0x01000000) == 0 x00000000) && (true)) {
1282 return state->EffectiveNoOp_instance_; 1247 return EffectiveNoOp_instance_;
1283 } 1248 }
1284 1249
1285 if (((insn & 0x00000F00) == 0x00000E00) && ((insn & 0x00000010) == 0x00000000) && ((insn & 0x01000000) == 0x01000000) && ((insn & 0x00200000) == 0x00200000)) { 1250 if (((insn & 0x00000F00) == 0x00000E00) && ((insn & 0x00000010) == 0x00000000) && ((insn & 0x01000000) == 0x01000000) && ((insn & 0x00200000) == 0x00200000)) {
1286 return state->EffectiveNoOp_instance_; 1251 return EffectiveNoOp_instance_;
1287 } 1252 }
1288 1253
1289 if (((insn & 0x00000F00) == 0x00000E00) && ((insn & 0x00000010) == 0x00000000) && (true) && ((insn & 0x00200000) == 0x00000000)) { 1254 if (((insn & 0x00000F00) == 0x00000E00) && ((insn & 0x00000010) == 0x00000000) && (true) && ((insn & 0x00200000) == 0x00000000)) {
1290 return state->EffectiveNoOp_instance_; 1255 return EffectiveNoOp_instance_;
1291 } 1256 }
1292 1257
1293 if (((insn & 0x00000F00) == 0x00000E00) && ((insn & 0x00000010) == 0x00000010) && ((insn & 0x01000000) == 0x01000000) && (true)) { 1258 if (((insn & 0x00000F00) == 0x00000E00) && ((insn & 0x00000010) == 0x00000010) && ((insn & 0x01000000) == 0x01000000) && (true)) {
1294 return state->EffectiveNoOp_instance_; 1259 return EffectiveNoOp_instance_;
1295 } 1260 }
1296 1261
1297 if (((insn & 0x00000700) == 0x00000700) && ((insn & 0x00000010) == 0x00000000) && (true) && (true)) { 1262 if (((insn & 0x00000700) == 0x00000700) && ((insn & 0x00000010) == 0x00000000) && (true) && (true)) {
1298 return state->EffectiveNoOp_instance_; 1263 return EffectiveNoOp_instance_;
1299 } 1264 }
1300 1265
1301 if (((insn & 0x00000B00) == 0x00000300) && ((insn & 0x00000010) == 0x00000010) && (true) && (true)) { 1266 if (((insn & 0x00000B00) == 0x00000300) && ((insn & 0x00000010) == 0x00000010) && (true) && (true)) {
1302 return state->EffectiveNoOp_instance_; 1267 return EffectiveNoOp_instance_;
1303 } 1268 }
1304 1269
1305 if (((insn & 0x00000B00) == 0x00000B00) && ((insn & 0x00000010) == 0x00000010) && ((insn & 0x01000000) == 0x00000000) && (true)) { 1270 if (((insn & 0x00000B00) == 0x00000B00) && ((insn & 0x00000010) == 0x00000010) && ((insn & 0x01000000) == 0x00000000) && (true)) {
1306 return state->EffectiveNoOp_instance_; 1271 return EffectiveNoOp_instance_;
1307 } 1272 }
1308 1273
1309 if (((insn & 0x00000D00) == 0x00000100) && ((insn & 0x00000010) == 0x00000000) && (true) && (true)) { 1274 if (((insn & 0x00000D00) == 0x00000100) && ((insn & 0x00000010) == 0x00000000) && (true) && (true)) {
1310 return state->EffectiveNoOp_instance_; 1275 return EffectiveNoOp_instance_;
1311 } 1276 }
1312 1277
1313 if (((insn & 0x00000D00) == 0x00000800) && (true) && (true) && (true)) { 1278 if (((insn & 0x00000D00) == 0x00000800) && (true) && (true) && (true)) {
1314 return state->EffectiveNoOp_instance_; 1279 return EffectiveNoOp_instance_;
1315 } 1280 }
1316 1281
1317 if (((insn & 0x00000900) == 0x00000000) && (true) && (true) && (true)) { 1282 if (((insn & 0x00000900) == 0x00000000) && (true) && (true) && (true)) {
1318 return state->EffectiveNoOp_instance_; 1283 return EffectiveNoOp_instance_;
1319 } 1284 }
1320 1285
1321 if ((true) && (true) && (true) && (true)) { 1286 if ((true) && (true) && (true) && (true)) {
1322 return state->Undefined_instance_; 1287 return Undefined_instance_;
1323 } 1288 }
1324 1289
1325 // Catch any attempt to fall through... 1290 // Catch any attempt to fall through...
1326 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_3same could not parse %08X",insn .bits(31,0)); 1291 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_3same could not parse %08X",insn .bits(31,0));
1327 return state->Forbidden_instance_; 1292 return Forbidden_instance_;
1328 } 1293 }
1294
1329 1295
1330 /* 1296 /*
1331 * Implementation of table simd_dp_3diff. 1297 * Implementation of table simd_dp_3diff.
1332 * Specified by: See Section A7.4.2. 1298 * Specified by: See Section A7.4.2.
1333 */ 1299 */
1334 static inline const ClassDecoder &decode_simd_dp_3diff( 1300 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_dp_3diff(const Inst ruction insn) const {
1335 const Instruction insn, const NamedArm32DecoderState *state) {
1336 if (((insn & 0x00000F00) == 0x00000D00) && ((insn & 0x01000000) == 0x00000000) ) { 1301 if (((insn & 0x00000F00) == 0x00000D00) && ((insn & 0x01000000) == 0x00000000) ) {
1337 return state->EffectiveNoOp_instance_; 1302 return EffectiveNoOp_instance_;
1338 } 1303 }
1339 1304
1340 if (((insn & 0x00000D00) == 0x00000900) && ((insn & 0x01000000) == 0x00000000) ) { 1305 if (((insn & 0x00000D00) == 0x00000900) && ((insn & 0x01000000) == 0x00000000) ) {
1341 return state->EffectiveNoOp_instance_; 1306 return EffectiveNoOp_instance_;
1342 } 1307 }
1343 1308
1344 if (((insn & 0x00000900) == 0x00000800) && (true)) { 1309 if (((insn & 0x00000900) == 0x00000800) && (true)) {
1345 return state->EffectiveNoOp_instance_; 1310 return EffectiveNoOp_instance_;
1346 } 1311 }
1347 1312
1348 if (((insn & 0x00000800) == 0x00000000) && (true)) { 1313 if (((insn & 0x00000800) == 0x00000000) && (true)) {
1349 return state->EffectiveNoOp_instance_; 1314 return EffectiveNoOp_instance_;
1350 } 1315 }
1351 1316
1352 if ((true) && (true)) { 1317 if ((true) && (true)) {
1353 return state->Undefined_instance_; 1318 return Undefined_instance_;
1354 } 1319 }
1355 1320
1356 // Catch any attempt to fall through... 1321 // Catch any attempt to fall through...
1357 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_3diff could not parse %08X",insn .bits(31,0)); 1322 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_3diff could not parse %08X",insn .bits(31,0));
1358 return state->Forbidden_instance_; 1323 return Forbidden_instance_;
1359 } 1324 }
1325
1360 1326
1361 /* 1327 /*
1362 * Implementation of table simd_dp_2scalar. 1328 * Implementation of table simd_dp_2scalar.
1363 * Specified by: See Section A7.4.3. 1329 * Specified by: See Section A7.4.3.
1364 */ 1330 */
1365 static inline const ClassDecoder &decode_simd_dp_2scalar( 1331 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_dp_2scalar(const In struction insn) const {
1366 const Instruction insn, const NamedArm32DecoderState *state) {
1367 if (((insn & 0x00000F00) == 0x00000A00) && (true)) { 1332 if (((insn & 0x00000F00) == 0x00000A00) && (true)) {
1368 return state->EffectiveNoOp_instance_; 1333 return EffectiveNoOp_instance_;
1369 } 1334 }
1370 1335
1371 if (((insn & 0x00000F00) == 0x00000B00) && ((insn & 0x01000000) == 0x00000000) ) { 1336 if (((insn & 0x00000F00) == 0x00000B00) && ((insn & 0x01000000) == 0x00000000) ) {
1372 return state->EffectiveNoOp_instance_; 1337 return EffectiveNoOp_instance_;
1373 } 1338 }
1374 1339
1375 if (((insn & 0x00000B00) == 0x00000200) && (true)) { 1340 if (((insn & 0x00000B00) == 0x00000200) && (true)) {
1376 return state->EffectiveNoOp_instance_; 1341 return EffectiveNoOp_instance_;
1377 } 1342 }
1378 1343
1379 if (((insn & 0x00000B00) == 0x00000300) && ((insn & 0x01000000) == 0x00000000) ) { 1344 if (((insn & 0x00000B00) == 0x00000300) && ((insn & 0x01000000) == 0x00000000) ) {
1380 return state->EffectiveNoOp_instance_; 1345 return EffectiveNoOp_instance_;
1381 } 1346 }
1382 1347
1383 if (((insn & 0x00000200) == 0x00000000) && (true)) { 1348 if (((insn & 0x00000200) == 0x00000000) && (true)) {
1384 return state->EffectiveNoOp_instance_; 1349 return EffectiveNoOp_instance_;
1385 } 1350 }
1386 1351
1387 if ((true) && (true)) { 1352 if ((true) && (true)) {
1388 return state->Undefined_instance_; 1353 return Undefined_instance_;
1389 } 1354 }
1390 1355
1391 // Catch any attempt to fall through... 1356 // Catch any attempt to fall through...
1392 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_2scalar could not parse %08X",in sn.bits(31,0)); 1357 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_2scalar could not parse %08X",in sn.bits(31,0));
1393 return state->Forbidden_instance_; 1358 return Forbidden_instance_;
1394 } 1359 }
1360
1395 1361
1396 /* 1362 /*
1397 * Implementation of table simd_dp_2shift. 1363 * Implementation of table simd_dp_2shift.
1398 * Specified by: See Section A7.4.4. 1364 * Specified by: See Section A7.4.4.
1399 */ 1365 */
1400 static inline const ClassDecoder &decode_simd_dp_2shift( 1366 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_dp_2shift(const Ins truction insn) const {
1401 const Instruction insn, const NamedArm32DecoderState *state) {
1402 if (((insn & 0x00000F00) == 0x00000500) && ((insn & 0x01000000) == 0x00000000) && (true) && (true)) { 1367 if (((insn & 0x00000F00) == 0x00000500) && ((insn & 0x01000000) == 0x00000000) && (true) && (true)) {
1403 return state->EffectiveNoOp_instance_; 1368 return EffectiveNoOp_instance_;
1404 } 1369 }
1405 1370
1406 if (((insn & 0x00000F00) == 0x00000800) && ((insn & 0x01000000) == 0x00000000) && ((insn & 0x00000040) == 0x00000000) && ((insn & 0x00000080) == 0x00000000)) { 1371 if (((insn & 0x00000F00) == 0x00000800) && ((insn & 0x01000000) == 0x00000000) && ((insn & 0x00000040) == 0x00000000) && ((insn & 0x00000080) == 0x00000000)) {
1407 return state->EffectiveNoOp_instance_; 1372 return EffectiveNoOp_instance_;
1408 } 1373 }
1409 1374
1410 if (((insn & 0x00000F00) == 0x00000800) && ((insn & 0x01000000) == 0x01000000) && ((insn & 0x00000040) == 0x00000000) && (true)) { 1375 if (((insn & 0x00000F00) == 0x00000800) && ((insn & 0x01000000) == 0x01000000) && ((insn & 0x00000040) == 0x00000000) && (true)) {
1411 return state->EffectiveNoOp_instance_; 1376 return EffectiveNoOp_instance_;
1412 } 1377 }
1413 1378
1414 if (((insn & 0x00000F00) == 0x00000800) && (true) && ((insn & 0x00000040) == 0 x00000040) && (true)) { 1379 if (((insn & 0x00000F00) == 0x00000800) && (true) && ((insn & 0x00000040) == 0 x00000040) && (true)) {
1415 return state->EffectiveNoOp_instance_; 1380 return EffectiveNoOp_instance_;
1416 } 1381 }
1417 1382
1418 if (((insn & 0x00000F00) == 0x00000900) && (true) && (true) && (true)) { 1383 if (((insn & 0x00000F00) == 0x00000900) && (true) && (true) && (true)) {
1419 return state->EffectiveNoOp_instance_; 1384 return EffectiveNoOp_instance_;
1420 } 1385 }
1421 1386
1422 if (((insn & 0x00000F00) == 0x00000A00) && (true) && ((insn & 0x00000040) == 0 x00000000) && (true)) { 1387 if (((insn & 0x00000F00) == 0x00000A00) && (true) && ((insn & 0x00000040) == 0 x00000000) && (true)) {
1423 return state->EffectiveNoOp_instance_; 1388 return EffectiveNoOp_instance_;
1424 } 1389 }
1425 1390
1426 if (((insn & 0x00000E00) == 0x00000400) && ((insn & 0x01000000) == 0x01000000) && (true) && (true)) { 1391 if (((insn & 0x00000E00) == 0x00000400) && ((insn & 0x01000000) == 0x01000000) && (true) && (true)) {
1427 return state->EffectiveNoOp_instance_; 1392 return EffectiveNoOp_instance_;
1428 } 1393 }
1429 1394
1430 if (((insn & 0x00000600) == 0x00000600) && (true) && (true) && (true)) { 1395 if (((insn & 0x00000600) == 0x00000600) && (true) && (true) && (true)) {
1431 return state->EffectiveNoOp_instance_; 1396 return EffectiveNoOp_instance_;
1432 } 1397 }
1433 1398
1434 if (((insn & 0x00000C00) == 0x00000000) && (true) && (true) && (true)) { 1399 if (((insn & 0x00000C00) == 0x00000000) && (true) && (true) && (true)) {
1435 return state->EffectiveNoOp_instance_; 1400 return EffectiveNoOp_instance_;
1436 } 1401 }
1437 1402
1438 if ((true) && (true) && (true) && (true)) { 1403 if ((true) && (true) && (true) && (true)) {
1439 return state->Undefined_instance_; 1404 return Undefined_instance_;
1440 } 1405 }
1441 1406
1442 // Catch any attempt to fall through... 1407 // Catch any attempt to fall through...
1443 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_2shift could not parse %08X",ins n.bits(31,0)); 1408 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_2shift could not parse %08X",ins n.bits(31,0));
1444 return state->Forbidden_instance_; 1409 return Forbidden_instance_;
1445 } 1410 }
1411
1446 1412
1447 /* 1413 /*
1448 * Implementation of table simd_dp_2misc. 1414 * Implementation of table simd_dp_2misc.
1449 * Specified by: See Section A7.4.5. 1415 * Specified by: See Section A7.4.5.
1450 */ 1416 */
1451 static inline const ClassDecoder &decode_simd_dp_2misc( 1417 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_dp_2misc(const Inst ruction insn) const {
1452 const Instruction insn, const NamedArm32DecoderState *state) {
1453 if (((insn & 0x00030000) == 0x00000000) && ((insn & 0x00000780) == 0x00000700) ) { 1418 if (((insn & 0x00030000) == 0x00000000) && ((insn & 0x00000780) == 0x00000700) ) {
1454 return state->EffectiveNoOp_instance_; 1419 return EffectiveNoOp_instance_;
1455 } 1420 }
1456 1421
1457 if (((insn & 0x00030000) == 0x00000000) && ((insn & 0x00000380) == 0x00000100) ) { 1422 if (((insn & 0x00030000) == 0x00000000) && ((insn & 0x00000380) == 0x00000100) ) {
1458 return state->EffectiveNoOp_instance_; 1423 return EffectiveNoOp_instance_;
1459 } 1424 }
1460 1425
1461 if (((insn & 0x00030000) == 0x00000000) && ((insn & 0x00000580) == 0x00000580) ) { 1426 if (((insn & 0x00030000) == 0x00000000) && ((insn & 0x00000580) == 0x00000580) ) {
1462 return state->EffectiveNoOp_instance_; 1427 return EffectiveNoOp_instance_;
1463 } 1428 }
1464 1429
1465 if (((insn & 0x00030000) == 0x00000000) && ((insn & 0x00000100) == 0x00000000) ) { 1430 if (((insn & 0x00030000) == 0x00000000) && ((insn & 0x00000100) == 0x00000000) ) {
1466 return state->EffectiveNoOp_instance_; 1431 return EffectiveNoOp_instance_;
1467 } 1432 }
1468 1433
1469 if (((insn & 0x00030000) == 0x00010000) && ((insn & 0x00000380) == 0x00000380) ) { 1434 if (((insn & 0x00030000) == 0x00010000) && ((insn & 0x00000380) == 0x00000380) ) {
1470 return state->EffectiveNoOp_instance_; 1435 return EffectiveNoOp_instance_;
1471 } 1436 }
1472 1437
1473 if (((insn & 0x00030000) == 0x00010000) && ((insn & 0x00000280) == 0x00000200) ) { 1438 if (((insn & 0x00030000) == 0x00010000) && ((insn & 0x00000280) == 0x00000200) ) {
1474 return state->EffectiveNoOp_instance_; 1439 return EffectiveNoOp_instance_;
1475 } 1440 }
1476 1441
1477 if (((insn & 0x00030000) == 0x00010000) && ((insn & 0x00000200) == 0x00000000) ) { 1442 if (((insn & 0x00030000) == 0x00010000) && ((insn & 0x00000200) == 0x00000000) ) {
1478 return state->EffectiveNoOp_instance_; 1443 return EffectiveNoOp_instance_;
1479 } 1444 }
1480 1445
1481 if (((insn & 0x00030000) == 0x00020000) && ((insn & 0x000007C0) == 0x00000300) ) { 1446 if (((insn & 0x00030000) == 0x00020000) && ((insn & 0x000007C0) == 0x00000300) ) {
1482 return state->EffectiveNoOp_instance_; 1447 return EffectiveNoOp_instance_;
1483 } 1448 }
1484 1449
1485 if (((insn & 0x00030000) == 0x00020000) && ((insn & 0x000006C0) == 0x00000600) ) { 1450 if (((insn & 0x00030000) == 0x00020000) && ((insn & 0x000006C0) == 0x00000600) ) {
1486 return state->EffectiveNoOp_instance_; 1451 return EffectiveNoOp_instance_;
1487 } 1452 }
1488 1453
1489 if (((insn & 0x00030000) == 0x00020000) && ((insn & 0x00000700) == 0x00000200) ) { 1454 if (((insn & 0x00030000) == 0x00020000) && ((insn & 0x00000700) == 0x00000200) ) {
1490 return state->EffectiveNoOp_instance_; 1455 return EffectiveNoOp_instance_;
1491 } 1456 }
1492 1457
1493 if (((insn & 0x00030000) == 0x00020000) && ((insn & 0x00000600) == 0x00000000) ) { 1458 if (((insn & 0x00030000) == 0x00020000) && ((insn & 0x00000600) == 0x00000000) ) {
1494 return state->EffectiveNoOp_instance_; 1459 return EffectiveNoOp_instance_;
1495 } 1460 }
1496 1461
1497 if (((insn & 0x00030000) == 0x00030000) && ((insn & 0x00000400) == 0x00000400) ) { 1462 if (((insn & 0x00030000) == 0x00030000) && ((insn & 0x00000400) == 0x00000400) ) {
1498 return state->EffectiveNoOp_instance_; 1463 return EffectiveNoOp_instance_;
1499 } 1464 }
1500 1465
1501 if ((true) && (true)) { 1466 if ((true) && (true)) {
1502 return state->Undefined_instance_; 1467 return Undefined_instance_;
1503 } 1468 }
1504 1469
1505 // Catch any attempt to fall through... 1470 // Catch any attempt to fall through...
1506 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_2misc could not parse %08X",insn .bits(31,0)); 1471 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_2misc could not parse %08X",insn .bits(31,0));
1507 return state->Forbidden_instance_; 1472 return Forbidden_instance_;
1508 } 1473 }
1474
1509 1475
1510 /* 1476 /*
1511 * Implementation of table simd_dp_1imm. 1477 * Implementation of table simd_dp_1imm.
1512 * Specified by: See Section A7.4.6. 1478 * Specified by: See Section A7.4.6.
1513 */ 1479 */
1514 static inline const ClassDecoder &decode_simd_dp_1imm( 1480 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_dp_1imm(const Instr uction insn) const {
1515 const Instruction insn, const NamedArm32DecoderState *state) {
1516 if (((insn & 0x00000020) == 0x00000000) && (true)) { 1481 if (((insn & 0x00000020) == 0x00000000) && (true)) {
1517 return state->EffectiveNoOp_instance_; 1482 return EffectiveNoOp_instance_;
1518 } 1483 }
1519 1484
1520 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000F00) == 0x00000E00) ) { 1485 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000F00) == 0x00000E00) ) {
1521 return state->EffectiveNoOp_instance_; 1486 return EffectiveNoOp_instance_;
1522 } 1487 }
1523 1488
1524 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000F00) == 0x00000F00) ) { 1489 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000F00) == 0x00000F00) ) {
1525 return state->Undefined_instance_; 1490 return Undefined_instance_;
1526 } 1491 }
1527 1492
1528 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000E00) == 0x00000C00) ) { 1493 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000E00) == 0x00000C00) ) {
1529 return state->EffectiveNoOp_instance_; 1494 return EffectiveNoOp_instance_;
1530 } 1495 }
1531 1496
1532 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000C00) == 0x00000800) ) { 1497 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000C00) == 0x00000800) ) {
1533 return state->EffectiveNoOp_instance_; 1498 return EffectiveNoOp_instance_;
1534 } 1499 }
1535 1500
1536 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000800) == 0x00000000) ) { 1501 if (((insn & 0x00000020) == 0x00000020) && ((insn & 0x00000800) == 0x00000000) ) {
1537 return state->EffectiveNoOp_instance_; 1502 return EffectiveNoOp_instance_;
1538 } 1503 }
1539 1504
1540 // Catch any attempt to fall through... 1505 // Catch any attempt to fall through...
1541 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_1imm could not parse %08X",insn. bits(31,0)); 1506 fprintf(stderr, "TABLE IS INCOMPLETE: simd_dp_1imm could not parse %08X",insn. bits(31,0));
1542 return state->Forbidden_instance_; 1507 return Forbidden_instance_;
1543 } 1508 }
1509
1544 1510
1545 /* 1511 /*
1546 * Implementation of table simd_load_store. 1512 * Implementation of table simd_load_store.
1547 * Specified by: See Section A7.7. 1513 * Specified by: See Section A7.7.
1548 */ 1514 */
1549 static inline const ClassDecoder &decode_simd_load_store( 1515 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_load_store(const In struction insn) const {
1550 const Instruction insn, const NamedArm32DecoderState *state) {
1551 if (((insn & 0x00200000) == 0x00000000)) { 1516 if (((insn & 0x00200000) == 0x00000000)) {
1552 return decode_simd_load_store_l0(insn, state); 1517 return decode_simd_load_store_l0(insn);
1553 } 1518 }
1554 1519
1555 if (((insn & 0x00200000) == 0x00200000)) { 1520 if (((insn & 0x00200000) == 0x00200000)) {
1556 return decode_simd_load_store_l1(insn, state); 1521 return decode_simd_load_store_l1(insn);
1557 } 1522 }
1558 1523
1559 // Catch any attempt to fall through... 1524 // Catch any attempt to fall through...
1560 fprintf(stderr, "TABLE IS INCOMPLETE: simd_load_store could not parse %08X",in sn.bits(31,0)); 1525 fprintf(stderr, "TABLE IS INCOMPLETE: simd_load_store could not parse %08X",in sn.bits(31,0));
1561 return state->Forbidden_instance_; 1526 return Forbidden_instance_;
1562 } 1527 }
1528
1563 1529
1564 /* 1530 /*
1565 * Implementation of table simd_load_store_l0. 1531 * Implementation of table simd_load_store_l0.
1566 * Specified by: See Section A7.7, Table A7-20. 1532 * Specified by: See Section A7.7, Table A7-20.
1567 */ 1533 */
1568 static inline const ClassDecoder &decode_simd_load_store_l0( 1534 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_load_store_l0(const Instruction insn) const {
1569 const Instruction insn, const NamedArm32DecoderState *state) {
1570 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000F00) == 0x00000300) ) { 1535 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000F00) == 0x00000300) ) {
1571 return state->VectorStore_instance_; 1536 return VectorStore_instance_;
1572 } 1537 }
1573 1538
1574 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000700) == 0x00000200) ) { 1539 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000700) == 0x00000200) ) {
1575 return state->VectorStore_instance_; 1540 return VectorStore_instance_;
1576 } 1541 }
1577 1542
1578 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000600) == 0x00000000) ) { 1543 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000600) == 0x00000000) ) {
1579 return state->VectorStore_instance_; 1544 return VectorStore_instance_;
1580 } 1545 }
1581 1546
1582 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000C00) == 0x00000400) ) { 1547 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000C00) == 0x00000400) ) {
1583 return state->VectorStore_instance_; 1548 return VectorStore_instance_;
1584 } 1549 }
1585 1550
1586 if (((insn & 0x00800000) == 0x00800000) && ((insn & 0x00000C00) == 0x00000800) ) { 1551 if (((insn & 0x00800000) == 0x00800000) && ((insn & 0x00000C00) == 0x00000800) ) {
1587 return state->VectorStore_instance_; 1552 return VectorStore_instance_;
1588 } 1553 }
1589 1554
1590 if (((insn & 0x00800000) == 0x00800000) && ((insn & 0x00000800) == 0x00000000) ) { 1555 if (((insn & 0x00800000) == 0x00800000) && ((insn & 0x00000800) == 0x00000000) ) {
1591 return state->VectorStore_instance_; 1556 return VectorStore_instance_;
1592 } 1557 }
1593 1558
1594 if ((true) && (true)) { 1559 if ((true) && (true)) {
1595 return state->Undefined_instance_; 1560 return Undefined_instance_;
1596 } 1561 }
1597 1562
1598 // Catch any attempt to fall through... 1563 // Catch any attempt to fall through...
1599 fprintf(stderr, "TABLE IS INCOMPLETE: simd_load_store_l0 could not parse %08X" ,insn.bits(31,0)); 1564 fprintf(stderr, "TABLE IS INCOMPLETE: simd_load_store_l0 could not parse %08X" ,insn.bits(31,0));
1600 return state->Forbidden_instance_; 1565 return Forbidden_instance_;
1601 } 1566 }
1567
1602 1568
1603 /* 1569 /*
1604 * Implementation of table simd_load_store_l1. 1570 * Implementation of table simd_load_store_l1.
1605 * Specified by: See Section A7.7, Table A7-21. 1571 * Specified by: See Section A7.7, Table A7-21.
1606 */ 1572 */
1607 static inline const ClassDecoder &decode_simd_load_store_l1( 1573 const NamedClassDecoder &NamedArm32DecoderState::decode_simd_load_store_l1(const Instruction insn) const {
1608 const Instruction insn, const NamedArm32DecoderState *state) {
1609 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000F00) == 0x00000300) ) { 1574 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000F00) == 0x00000300) ) {
1610 return state->VectorLoad_instance_; 1575 return VectorLoad_instance_;
1611 } 1576 }
1612 1577
1613 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000700) == 0x00000200) ) { 1578 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000700) == 0x00000200) ) {
1614 return state->VectorLoad_instance_; 1579 return VectorLoad_instance_;
1615 } 1580 }
1616 1581
1617 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000600) == 0x00000000) ) { 1582 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000600) == 0x00000000) ) {
1618 return state->VectorLoad_instance_; 1583 return VectorLoad_instance_;
1619 } 1584 }
1620 1585
1621 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000C00) == 0x00000400) ) { 1586 if (((insn & 0x00800000) == 0x00000000) && ((insn & 0x00000C00) == 0x00000400) ) {
1622 return state->VectorLoad_instance_; 1587 return VectorLoad_instance_;
1623 } 1588 }
1624 1589
1625 if (((insn & 0x00800000) == 0x00800000) && (true)) { 1590 if (((insn & 0x00800000) == 0x00800000) && (true)) {
1626 return state->VectorLoad_instance_; 1591 return VectorLoad_instance_;
1627 } 1592 }
1628 1593
1629 if ((true) && (true)) { 1594 if ((true) && (true)) {
1630 return state->Undefined_instance_; 1595 return Undefined_instance_;
1631 } 1596 }
1632 1597
1633 // Catch any attempt to fall through... 1598 // Catch any attempt to fall through...
1634 fprintf(stderr, "TABLE IS INCOMPLETE: simd_load_store_l1 could not parse %08X" ,insn.bits(31,0)); 1599 fprintf(stderr, "TABLE IS INCOMPLETE: simd_load_store_l1 could not parse %08X" ,insn.bits(31,0));
1635 return state->Forbidden_instance_; 1600 return Forbidden_instance_;
1636 } 1601 }
1637 1602
1638 NamedArm32DecoderState::NamedArm32DecoderState() : 1603 NamedArm32DecoderState::NamedArm32DecoderState() :
1639 DecoderState() 1604 DecoderState()
1640 , CoprocessorOp_instance_() 1605 , CoprocessorOp_instance_()
1606 , MoveToStatusRegister_instance_()
1641 , ImmediateBic_instance_() 1607 , ImmediateBic_instance_()
1642 , LoadMultiple_instance_() 1608 , LoadMultiple_instance_()
1643 , LoadCoprocessor_instance_() 1609 , LoadCoprocessor_instance_()
1644 , LoadDoubleExclusive_instance_() 1610 , LongMultiply_instance_()
1645 , Branch_instance_() 1611 , Branch_instance_()
1646 , Test_instance_() 1612 , Test_instance_()
1647 , StoreRegister_instance_() 1613 , StoreRegister_instance_()
1648 , MoveDoubleFromCoprocessor_instance_() 1614 , LoadRegister_instance_()
1649 , TestImmediate_instance_() 1615 , TestImmediate_instance_()
1650 , BxBlx_instance_() 1616 , VectorLoad_instance_()
1651 , EffectiveNoOp_instance_() 1617 , EffectiveNoOp_instance_()
1652 , LongMultiply_instance_() 1618 , LoadDoubleExclusive_instance_()
1653 , Binary4RegisterShiftedOp_instance_() 1619 , Binary4RegisterShiftedOp_instance_()
1654 , Breakpoint_instance_() 1620 , Breakpoint_instance_()
1655 , Multiply_instance_() 1621 , Multiply_instance_()
1622 , Add_Rule_7_A1_P26_instance_()
1656 , PackSatRev_instance_() 1623 , PackSatRev_instance_()
1657 , LoadExclusive_instance_() 1624 , LoadExclusive_instance_()
1658 , VectorStore_instance_() 1625 , VectorStore_instance_()
1659 , Unary3RegisterShiftedOp_instance_() 1626 , Unary3RegisterShiftedOp_instance_()
1660 , Undefined_instance_() 1627 , Undefined_instance_()
1661 , DataProc_instance_() 1628 , DataProc_instance_()
1662 , Deprecated_instance_() 1629 , Deprecated_instance_()
1663 , LoadImmediate_instance_() 1630 , LoadImmediate_instance_()
1664 , StoreCoprocessor_instance_() 1631 , StoreCoprocessor_instance_()
1665 , Roadblock_instance_() 1632 , Roadblock_instance_()
1666 , LoadDoubleR_instance_() 1633 , MoveFromCoprocessor_instance_()
1667 , StoreExclusive_instance_() 1634 , StoreExclusive_instance_()
1668 , StoreImmediate_instance_() 1635 , StoreImmediate_instance_()
1669 , MoveFromCoprocessor_instance_() 1636 , MoveDoubleFromCoprocessor_instance_()
1670 , LoadRegister_instance_() 1637 , SatAddSub_instance_()
1671 , LoadDoubleI_instance_() 1638 , LoadDoubleI_instance_()
1672 , Binary3RegisterShiftedTest_instance_() 1639 , Binary3RegisterShiftedTest_instance_()
1673 , Unpredictable_instance_() 1640 , Unpredictable_instance_()
1674 , Forbidden_instance_() 1641 , Forbidden_instance_()
1675 , VectorLoad_instance_() 1642 , BxBlx_instance_()
1676 , MoveToStatusRegister_instance_() 1643 , LoadDoubleR_instance_()
1677 , SatAddSub_instance_()
1678 { 1644 {
1679 } 1645 }
1680 1646
1681 NamedArm32DecoderState::~NamedArm32DecoderState() { 1647 NamedArm32DecoderState::~NamedArm32DecoderState() {
1682 } 1648 }
1683 1649
1684 const ClassDecoder &NamedArm32DecoderState::decode(const Instruction insn) const { 1650 const ClassDecoder &NamedArm32DecoderState::decode(const Instruction insn) const {
1685 return decode_ARMv7(insn, this); 1651 return decode_named(insn).named_decoder();
1652 }
1653
1654 const NamedClassDecoder &NamedArm32DecoderState::decode_named(
1655 const Instruction insn) const {
1656 return decode_ARMv7(insn);
1686 } 1657 }
1687 1658
1688 } // namespace 1659 } // namespace
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