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Issue 9835083: MIPS: Port count-based profiler (Closed)
Patch Set: Created 8 years, 9 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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112 } 112 }
113 113
114 114
115 void Deoptimizer::PatchStackCheckCodeAt(Code* unoptimized_code, 115 void Deoptimizer::PatchStackCheckCodeAt(Code* unoptimized_code,
116 Address pc_after, 116 Address pc_after,
117 Code* check_code, 117 Code* check_code,
118 Code* replacement_code) { 118 Code* replacement_code) {
119 const int kInstrSize = Assembler::kInstrSize; 119 const int kInstrSize = Assembler::kInstrSize;
120 // This structure comes from FullCodeGenerator::EmitStackCheck. 120 // This structure comes from FullCodeGenerator::EmitStackCheck.
121 // The call of the stack guard check has the following form: 121 // The call of the stack guard check has the following form:
122 // sltu at, sp, t0 122 // sltu at, sp, t0 / slt at, a3, zero_reg (in case of count based interrupts)
123 // beq at, zero_reg, ok 123 // beq at, zero_reg, ok
124 // lui t9, <stack guard address> upper 124 // lui t9, <stack guard address> upper
125 // ori t9, <stack guard address> lower 125 // ori t9, <stack guard address> lower
126 // jalr t9 126 // jalr t9
127 // nop 127 // nop
128 // ----- pc_after points here 128 // ----- pc_after points here
129 129
130 ASSERT(Assembler::IsBeq(Assembler::instr_at(pc_after - 5 * kInstrSize))); 130 ASSERT(Assembler::IsBeq(Assembler::instr_at(pc_after - 5 * kInstrSize)));
131 131
132 // Replace the sltu instruction with load-imm 1 to at, so beq is not taken. 132 // Replace the sltu instruction with load-imm 1 to at, so beq is not taken.
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160 Code* check_code, 160 Code* check_code,
161 Code* replacement_code) { 161 Code* replacement_code) {
162 // Exact opposite of the function above. 162 // Exact opposite of the function above.
163 const int kInstrSize = Assembler::kInstrSize; 163 const int kInstrSize = Assembler::kInstrSize;
164 ASSERT(Assembler::IsAddImmediate( 164 ASSERT(Assembler::IsAddImmediate(
165 Assembler::instr_at(pc_after - 6 * kInstrSize))); 165 Assembler::instr_at(pc_after - 6 * kInstrSize)));
166 ASSERT(Assembler::IsBeq(Assembler::instr_at(pc_after - 5 * kInstrSize))); 166 ASSERT(Assembler::IsBeq(Assembler::instr_at(pc_after - 5 * kInstrSize)));
167 167
168 // Restore the sltu instruction so beq can be taken again. 168 // Restore the sltu instruction so beq can be taken again.
169 CodePatcher patcher(pc_after - 6 * kInstrSize, 1); 169 CodePatcher patcher(pc_after - 6 * kInstrSize, 1);
170 patcher.masm()->sltu(at, sp, t0); 170 if (FLAG_count_based_interrupts) {
171 patcher.masm()->slt(at, a3, zero_reg);
172 } else {
173 patcher.masm()->sltu(at, sp, t0);
174 }
171 175
172 // Replace the on-stack replacement address in the load-immediate (lui/ori 176 // Replace the on-stack replacement address in the load-immediate (lui/ori
173 // pair) with the entry address of the normal stack-check code. 177 // pair) with the entry address of the normal stack-check code.
174 ASSERT(reinterpret_cast<uint32_t>( 178 ASSERT(reinterpret_cast<uint32_t>(
175 Assembler::target_address_at(pc_after - 4 * kInstrSize)) == 179 Assembler::target_address_at(pc_after - 4 * kInstrSize)) ==
176 reinterpret_cast<uint32_t>(replacement_code->entry())); 180 reinterpret_cast<uint32_t>(replacement_code->entry()));
177 Assembler::set_target_address_at(pc_after - 4 * kInstrSize, 181 Assembler::set_target_address_at(pc_after - 4 * kInstrSize,
178 check_code->entry()); 182 check_code->entry());
179 183
180 check_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch( 184 check_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch(
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979 } 983 }
980 984
981 ASSERT_EQ(masm()->SizeOfCodeGeneratedSince(&table_start), 985 ASSERT_EQ(masm()->SizeOfCodeGeneratedSince(&table_start),
982 count() * table_entry_size_); 986 count() * table_entry_size_);
983 } 987 }
984 988
985 #undef __ 989 #undef __
986 990
987 991
988 } } // namespace v8::internal 992 } } // namespace v8::internal
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