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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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74 // Don't load NaNs or infinities, branch to the non number case instead. | 74 // Don't load NaNs or infinities, branch to the non number case instead. |
75 AVOID_NANS_AND_INFINITIES = 1 << 1 | 75 AVOID_NANS_AND_INFINITIES = 1 << 1 |
76 }; | 76 }; |
77 | 77 |
78 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls. | 78 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls. |
79 enum BranchDelaySlot { | 79 enum BranchDelaySlot { |
80 USE_DELAY_SLOT, | 80 USE_DELAY_SLOT, |
81 PROTECT | 81 PROTECT |
82 }; | 82 }; |
83 | 83 |
| 84 // Flags used for the li macro-assembler function. |
| 85 enum LiFlags { |
| 86 // If the constant value can be represented in just 16 bits, then |
| 87 // optimize the li to use a single instruction, rather than lui/ori pair. |
| 88 OPTIMIZE_SIZE = 0, |
| 89 // Always use 2 instructions (lui/ori pair), even if the constant could |
| 90 // be loaded with just one, so that this value is patchable later. |
| 91 CONSTANT_SIZE = 1 |
| 92 }; |
| 93 |
84 | 94 |
85 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET }; | 95 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET }; |
86 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK }; | 96 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK }; |
87 enum RAStatus { kRAHasNotBeenSaved, kRAHasBeenSaved }; | 97 enum RAStatus { kRAHasNotBeenSaved, kRAHasBeenSaved }; |
88 | 98 |
89 bool AreAliased(Register r1, Register r2, Register r3, Register r4); | 99 bool AreAliased(Register r1, Register r2, Register r3, Register r4); |
90 | 100 |
91 | 101 |
92 // ----------------------------------------------------------------------------- | 102 // ----------------------------------------------------------------------------- |
93 // Static helper functions. | 103 // Static helper functions. |
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177 void Call(Handle<Code> code, | 187 void Call(Handle<Code> code, |
178 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET, | 188 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET, |
179 unsigned ast_id = kNoASTId, | 189 unsigned ast_id = kNoASTId, |
180 COND_ARGS); | 190 COND_ARGS); |
181 void Ret(COND_ARGS); | 191 void Ret(COND_ARGS); |
182 inline void Ret(BranchDelaySlot bd, Condition cond = al, | 192 inline void Ret(BranchDelaySlot bd, Condition cond = al, |
183 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) { | 193 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) { |
184 Ret(cond, rs, rt, bd); | 194 Ret(cond, rs, rt, bd); |
185 } | 195 } |
186 | 196 |
| 197 void Branch(Label* L, |
| 198 Condition cond, |
| 199 Register rs, |
| 200 Heap::RootListIndex index, |
| 201 BranchDelaySlot bdslot = PROTECT); |
| 202 |
187 #undef COND_ARGS | 203 #undef COND_ARGS |
188 | 204 |
189 // Emit code to discard a non-negative number of pointer-sized elements | 205 // Emit code to discard a non-negative number of pointer-sized elements |
190 // from the stack, clobbering only the sp register. | 206 // from the stack, clobbering only the sp register. |
191 void Drop(int count, | 207 void Drop(int count, |
192 Condition cond = cc_always, | 208 Condition cond = cc_always, |
193 Register reg = no_reg, | 209 Register reg = no_reg, |
194 const Operand& op = Operand(no_reg)); | 210 const Operand& op = Operand(no_reg)); |
195 | 211 |
196 void DropAndRet(int drop = 0, | 212 void DropAndRet(int drop = 0, |
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237 | 253 |
238 // Jump unconditionally to given label. | 254 // Jump unconditionally to given label. |
239 // We NEED a nop in the branch delay slot, as it used by v8, for example in | 255 // We NEED a nop in the branch delay slot, as it used by v8, for example in |
240 // CodeGenerator::ProcessDeferred(). | 256 // CodeGenerator::ProcessDeferred(). |
241 // Currently the branch delay slot is filled by the MacroAssembler. | 257 // Currently the branch delay slot is filled by the MacroAssembler. |
242 // Use rather b(Label) for code generation. | 258 // Use rather b(Label) for code generation. |
243 void jmp(Label* L) { | 259 void jmp(Label* L) { |
244 Branch(L); | 260 Branch(L); |
245 } | 261 } |
246 | 262 |
247 | |
248 // Load an object from the root table. | 263 // Load an object from the root table. |
249 void LoadRoot(Register destination, | 264 void LoadRoot(Register destination, |
250 Heap::RootListIndex index); | 265 Heap::RootListIndex index); |
251 void LoadRoot(Register destination, | 266 void LoadRoot(Register destination, |
252 Heap::RootListIndex index, | 267 Heap::RootListIndex index, |
253 Condition cond, Register src1, const Operand& src2); | 268 Condition cond, Register src1, const Operand& src2); |
254 | 269 |
255 // Store an object to the root table. | 270 // Store an object to the root table. |
256 void StoreRoot(Register source, | 271 void StoreRoot(Register source, |
257 Heap::RootListIndex index); | 272 Heap::RootListIndex index); |
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568 #undef DEFINE_INSTRUCTION | 583 #undef DEFINE_INSTRUCTION |
569 #undef DEFINE_INSTRUCTION2 | 584 #undef DEFINE_INSTRUCTION2 |
570 | 585 |
571 | 586 |
572 // --------------------------------------------------------------------------- | 587 // --------------------------------------------------------------------------- |
573 // Pseudo-instructions. | 588 // Pseudo-instructions. |
574 | 589 |
575 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } | 590 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } |
576 | 591 |
577 // Load int32 in the rd register. | 592 // Load int32 in the rd register. |
578 void li(Register rd, Operand j, bool gen2instr = false); | 593 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE); |
579 inline void li(Register rd, int32_t j, bool gen2instr = false) { | 594 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) { |
580 li(rd, Operand(j), gen2instr); | 595 li(rd, Operand(j), mode); |
581 } | 596 } |
582 inline void li(Register dst, Handle<Object> value, bool gen2instr = false) { | 597 inline void li(Register dst, Handle<Object> value, |
583 li(dst, Operand(value), gen2instr); | 598 LiFlags mode = OPTIMIZE_SIZE) { |
| 599 li(dst, Operand(value), mode); |
584 } | 600 } |
585 | 601 |
586 // Push multiple registers on the stack. | 602 // Push multiple registers on the stack. |
587 // Registers are saved in numerical order, with higher numbered registers | 603 // Registers are saved in numerical order, with higher numbered registers |
588 // saved in higher memory addresses. | 604 // saved in higher memory addresses. |
589 void MultiPush(RegList regs); | 605 void MultiPush(RegList regs); |
590 void MultiPushReversed(RegList regs); | 606 void MultiPushReversed(RegList regs); |
591 | 607 |
592 void MultiPushFPU(RegList regs); | 608 void MultiPushFPU(RegList regs); |
593 void MultiPushReversedFPU(RegList regs); | 609 void MultiPushReversedFPU(RegList regs); |
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1486 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) | 1502 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) |
1487 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) | 1503 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) |
1488 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> | 1504 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> |
1489 #else | 1505 #else |
1490 #define ACCESS_MASM(masm) masm-> | 1506 #define ACCESS_MASM(masm) masm-> |
1491 #endif | 1507 #endif |
1492 | 1508 |
1493 } } // namespace v8::internal | 1509 } } // namespace v8::internal |
1494 | 1510 |
1495 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 1511 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
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