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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 132 | 132 |
| 133 | 133 |
| 134 bool RelocInfo::IsCodedSpecially() { | 134 bool RelocInfo::IsCodedSpecially() { |
| 135 // The deserializer needs to know whether a pointer is specially coded. Being | 135 // The deserializer needs to know whether a pointer is specially coded. Being |
| 136 // specially coded on ARM means that it is a movw/movt instruction. We don't | 136 // specially coded on ARM means that it is a movw/movt instruction. We don't |
| 137 // generate those yet. | 137 // generate those yet. |
| 138 return false; | 138 return false; |
| 139 } | 139 } |
| 140 | 140 |
| 141 | 141 |
| 142 | |
| 143 void RelocInfo::PatchCode(byte* instructions, int instruction_count) { | 142 void RelocInfo::PatchCode(byte* instructions, int instruction_count) { |
| 144 // Patch the code at the current address with the supplied instructions. | 143 // Patch the code at the current address with the supplied instructions. |
| 145 Instr* pc = reinterpret_cast<Instr*>(pc_); | 144 Instr* pc = reinterpret_cast<Instr*>(pc_); |
| 146 Instr* instr = reinterpret_cast<Instr*>(instructions); | 145 Instr* instr = reinterpret_cast<Instr*>(instructions); |
| 147 for (int i = 0; i < instruction_count; i++) { | 146 for (int i = 0; i < instruction_count; i++) { |
| 148 *(pc + i) = *(instr + i); | 147 *(pc + i) = *(instr + i); |
| 149 } | 148 } |
| 150 | 149 |
| 151 // Indicate that code has changed. | 150 // Indicate that code has changed. |
| 152 CPU::FlushICache(pc_, instruction_count * Assembler::kInstrSize); | 151 CPU::FlushICache(pc_, instruction_count * Assembler::kInstrSize); |
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| 2657 | 2656 |
| 2658 // Since a constant pool was just emitted, move the check offset forward by | 2657 // Since a constant pool was just emitted, move the check offset forward by |
| 2659 // the standard interval. | 2658 // the standard interval. |
| 2660 next_buffer_check_ = pc_offset() + kCheckPoolInterval; | 2659 next_buffer_check_ = pc_offset() + kCheckPoolInterval; |
| 2661 } | 2660 } |
| 2662 | 2661 |
| 2663 | 2662 |
| 2664 } } // namespace v8::internal | 2663 } } // namespace v8::internal |
| 2665 | 2664 |
| 2666 #endif // V8_TARGET_ARCH_ARM | 2665 #endif // V8_TARGET_ARCH_ARM |
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