MIPS: Branch delay slot and other optimizations.

MIPS: Branch delay slot and other optimizations.

List of changes:
-added a minor optimization to the Simulator that quickly skips nops in the delay slot
-slightly re-worked CEntryStub to save a few instructions
 CEntryStub now expects the following values:
  -s0: number of arguments including receiver
  -s1: size of arguments excluding receiver
  -s2: pointer to builtin function
 Two new MacroAssembler functions were added to make usage more convenient:
  -PrepareCEntryArgs(int num_args) to set up s0 and s1
  -PrepareCEntryFunction(const ExternalReference&) to set up s2
-removed branch delay slot nops from the most frequently used code areas
-reorganized some code to execute fewer instructions
-utilized the delay slot of most Ret instructions
 This does not cover all Rets, only the most obvious cases.
 Also added a special version of DropAndRet that utilizes the delay slot.
-added some comments to code areas where explanation of the register/delay slot usage may be needed
-added an optimization to Jump so it doesn't always pre-load the target register

BUG=
TEST=

Committed: https://code.google.com/p/v8/source/detail?r=11099

[danno, 2012-03-21 08:39:45]

lgtm