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Issue 9692048: MIPS: Added support for Loongson architectures. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 8 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 925 matching lines...) Expand 10 before | Expand all | Expand 10 after
936 936
937 Label not_special, done; 937 Label not_special, done;
938 // Move sign bit from source to destination. This works because the sign 938 // Move sign bit from source to destination. This works because the sign
939 // bit in the exponent word of the double has the same position and polarity 939 // bit in the exponent word of the double has the same position and polarity
940 // as the 2's complement sign bit in a Smi. 940 // as the 2's complement sign bit in a Smi.
941 ASSERT(kBinary32SignMask == 0x80000000u); 941 ASSERT(kBinary32SignMask == 0x80000000u);
942 942
943 __ And(fval, ival, Operand(kBinary32SignMask)); 943 __ And(fval, ival, Operand(kBinary32SignMask));
944 // Negate value if it is negative. 944 // Negate value if it is negative.
945 __ subu(scratch1, zero_reg, ival); 945 __ subu(scratch1, zero_reg, ival);
946 __ movn(ival, scratch1, fval); 946 __ Movn(ival, scratch1, fval);
947 947
948 // We have -1, 0 or 1, which we treat specially. Register ival contains 948 // We have -1, 0 or 1, which we treat specially. Register ival contains
949 // absolute value: it is either equal to 1 (special case of -1 and 1), 949 // absolute value: it is either equal to 1 (special case of -1 and 1),
950 // greater than 1 (not a special case) or less than 1 (special case of 0). 950 // greater than 1 (not a special case) or less than 1 (special case of 0).
951 __ Branch(&not_special, gt, ival, Operand(1)); 951 __ Branch(&not_special, gt, ival, Operand(1));
952 952
953 // For 1 or -1 we need to or in the 0 exponent (biased). 953 // For 1 or -1 we need to or in the 0 exponent (biased).
954 static const uint32_t exponent_word_for_1 = 954 static const uint32_t exponent_word_for_1 =
955 kBinary32ExponentBias << kBinary32ExponentShift; 955 kBinary32ExponentBias << kBinary32ExponentShift;
956 956
957 __ Xor(scratch1, ival, Operand(1)); 957 __ Xor(scratch1, ival, Operand(1));
958 __ li(scratch2, exponent_word_for_1); 958 __ li(scratch2, exponent_word_for_1);
959 __ or_(scratch2, fval, scratch2); 959 __ or_(scratch2, fval, scratch2);
960 __ movz(fval, scratch2, scratch1); // Only if ival is equal to 1. 960 __ Movz(fval, scratch2, scratch1); // Only if ival is equal to 1.
961 __ Branch(&done); 961 __ Branch(&done);
962 962
963 __ bind(&not_special); 963 __ bind(&not_special);
964 // Count leading zeros. 964 // Count leading zeros.
965 // Gets the wrong answer for 0, but we already checked for that case above. 965 // Gets the wrong answer for 0, but we already checked for that case above.
966 Register zeros = scratch2; 966 Register zeros = scratch2;
967 __ clz(zeros, ival); 967 __ Clz(zeros, ival);
968 968
969 // Compute exponent and or it into the exponent register. 969 // Compute exponent and or it into the exponent register.
970 __ li(scratch1, (kBitsPerInt - 1) + kBinary32ExponentBias); 970 __ li(scratch1, (kBitsPerInt - 1) + kBinary32ExponentBias);
971 __ subu(scratch1, scratch1, zeros); 971 __ subu(scratch1, scratch1, zeros);
972 972
973 __ sll(scratch1, scratch1, kBinary32ExponentShift); 973 __ sll(scratch1, scratch1, kBinary32ExponentShift);
974 __ or_(fval, fval, scratch1); 974 __ or_(fval, fval, scratch1);
975 975
976 // Shift up the source chopping the top bit off. 976 // Shift up the source chopping the top bit off.
977 __ Addu(zeros, zeros, Operand(1)); 977 __ Addu(zeros, zeros, Operand(1));
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3616 3616
3617 // Extract exponent to t5. 3617 // Extract exponent to t5.
3618 __ srl(t5, value, kBinary32MantissaBits); 3618 __ srl(t5, value, kBinary32MantissaBits);
3619 __ And(t5, t5, Operand(kBinary32ExponentMask >> kBinary32MantissaBits)); 3619 __ And(t5, t5, Operand(kBinary32ExponentMask >> kBinary32MantissaBits));
3620 3620
3621 Label exponent_rebiased; 3621 Label exponent_rebiased;
3622 __ Branch(&exponent_rebiased, eq, t5, Operand(zero_reg)); 3622 __ Branch(&exponent_rebiased, eq, t5, Operand(zero_reg));
3623 3623
3624 __ li(t0, 0x7ff); 3624 __ li(t0, 0x7ff);
3625 __ Xor(t1, t5, Operand(0xFF)); 3625 __ Xor(t1, t5, Operand(0xFF));
3626 __ movz(t5, t0, t1); // Set t5 to 0x7ff only if t5 is equal to 0xff. 3626 __ Movz(t5, t0, t1); // Set t5 to 0x7ff only if t5 is equal to 0xff.
3627 __ Branch(&exponent_rebiased, eq, t0, Operand(0xff)); 3627 __ Branch(&exponent_rebiased, eq, t0, Operand(0xff));
3628 3628
3629 // Rebias exponent. 3629 // Rebias exponent.
3630 __ Addu(t5, 3630 __ Addu(t5,
3631 t5, 3631 t5,
3632 Operand(-kBinary32ExponentBias + HeapNumber::kExponentBias)); 3632 Operand(-kBinary32ExponentBias + HeapNumber::kExponentBias));
3633 3633
3634 __ bind(&exponent_rebiased); 3634 __ bind(&exponent_rebiased);
3635 __ And(a2, value, Operand(kBinary32SignMask)); 3635 __ And(a2, value, Operand(kBinary32SignMask));
3636 value = no_reg; 3636 value = no_reg;
(...skipping 273 matching lines...) Expand 10 before | Expand all | Expand 10 after
3910 kBitsPerInt - kMantissaInHiWordShift; 3910 kBitsPerInt - kMantissaInHiWordShift;
3911 3911
3912 // Test for all special exponent values: zeros, subnormal numbers, NaNs 3912 // Test for all special exponent values: zeros, subnormal numbers, NaNs
3913 // and infinities. All these should be converted to 0. 3913 // and infinities. All these should be converted to 0.
3914 __ li(t5, HeapNumber::kExponentMask); 3914 __ li(t5, HeapNumber::kExponentMask);
3915 __ and_(t6, t3, t5); 3915 __ and_(t6, t3, t5);
3916 __ Branch(&nan_or_infinity_or_zero, eq, t6, Operand(zero_reg)); 3916 __ Branch(&nan_or_infinity_or_zero, eq, t6, Operand(zero_reg));
3917 3917
3918 __ xor_(t1, t6, t5); 3918 __ xor_(t1, t6, t5);
3919 __ li(t2, kBinary32ExponentMask); 3919 __ li(t2, kBinary32ExponentMask);
3920 __ movz(t6, t2, t1); // Only if t6 is equal to t5. 3920 __ Movz(t6, t2, t1); // Only if t6 is equal to t5.
3921 __ Branch(&nan_or_infinity_or_zero, eq, t6, Operand(t5)); 3921 __ Branch(&nan_or_infinity_or_zero, eq, t6, Operand(t5));
3922 3922
3923 // Rebias exponent. 3923 // Rebias exponent.
3924 __ srl(t6, t6, HeapNumber::kExponentShift); 3924 __ srl(t6, t6, HeapNumber::kExponentShift);
3925 __ Addu(t6, 3925 __ Addu(t6,
3926 t6, 3926 t6,
3927 Operand(kBinary32ExponentBias - HeapNumber::kExponentBias)); 3927 Operand(kBinary32ExponentBias - HeapNumber::kExponentBias));
3928 3928
3929 __ li(t1, Operand(kBinary32MaxExponent)); 3929 __ li(t1, Operand(kBinary32MaxExponent));
3930 __ Slt(t1, t1, t6); 3930 __ Slt(t1, t1, t6);
3931 __ And(t2, t3, Operand(HeapNumber::kSignMask)); 3931 __ And(t2, t3, Operand(HeapNumber::kSignMask));
3932 __ Or(t2, t2, Operand(kBinary32ExponentMask)); 3932 __ Or(t2, t2, Operand(kBinary32ExponentMask));
3933 __ movn(t3, t2, t1); // Only if t6 is gt kBinary32MaxExponent. 3933 __ Movn(t3, t2, t1); // Only if t6 is gt kBinary32MaxExponent.
3934 __ Branch(&done, gt, t6, Operand(kBinary32MaxExponent)); 3934 __ Branch(&done, gt, t6, Operand(kBinary32MaxExponent));
3935 3935
3936 __ Slt(t1, t6, Operand(kBinary32MinExponent)); 3936 __ Slt(t1, t6, Operand(kBinary32MinExponent));
3937 __ And(t2, t3, Operand(HeapNumber::kSignMask)); 3937 __ And(t2, t3, Operand(HeapNumber::kSignMask));
3938 __ movn(t3, t2, t1); // Only if t6 is lt kBinary32MinExponent. 3938 __ Movn(t3, t2, t1); // Only if t6 is lt kBinary32MinExponent.
3939 __ Branch(&done, lt, t6, Operand(kBinary32MinExponent)); 3939 __ Branch(&done, lt, t6, Operand(kBinary32MinExponent));
3940 3940
3941 __ And(t7, t3, Operand(HeapNumber::kSignMask)); 3941 __ And(t7, t3, Operand(HeapNumber::kSignMask));
3942 __ And(t3, t3, Operand(HeapNumber::kMantissaMask)); 3942 __ And(t3, t3, Operand(HeapNumber::kMantissaMask));
3943 __ sll(t3, t3, kMantissaInHiWordShift); 3943 __ sll(t3, t3, kMantissaInHiWordShift);
3944 __ or_(t7, t7, t3); 3944 __ or_(t7, t7, t3);
3945 __ srl(t4, t4, kMantissaInLoWordShift); 3945 __ srl(t4, t4, kMantissaInLoWordShift);
3946 __ or_(t7, t7, t4); 3946 __ or_(t7, t7, t4);
3947 __ sll(t6, t6, kBinary32ExponentShift); 3947 __ sll(t6, t6, kBinary32ExponentShift);
3948 __ or_(t3, t7, t6); 3948 __ or_(t3, t7, t6);
(...skipping 29 matching lines...) Expand all
3978 bool is_signed_type = IsElementTypeSigned(elements_kind); 3978 bool is_signed_type = IsElementTypeSigned(elements_kind);
3979 int meaningfull_bits = is_signed_type ? (kBitsPerInt - 1) : kBitsPerInt; 3979 int meaningfull_bits = is_signed_type ? (kBitsPerInt - 1) : kBitsPerInt;
3980 int32_t min_value = is_signed_type ? 0x80000000 : 0x00000000; 3980 int32_t min_value = is_signed_type ? 0x80000000 : 0x00000000;
3981 3981
3982 Label done, sign; 3982 Label done, sign;
3983 3983
3984 // Test for all special exponent values: zeros, subnormal numbers, NaNs 3984 // Test for all special exponent values: zeros, subnormal numbers, NaNs
3985 // and infinities. All these should be converted to 0. 3985 // and infinities. All these should be converted to 0.
3986 __ li(t5, HeapNumber::kExponentMask); 3986 __ li(t5, HeapNumber::kExponentMask);
3987 __ and_(t6, t3, t5); 3987 __ and_(t6, t3, t5);
3988 __ movz(t3, zero_reg, t6); // Only if t6 is equal to zero. 3988 __ Movz(t3, zero_reg, t6); // Only if t6 is equal to zero.
3989 __ Branch(&done, eq, t6, Operand(zero_reg)); 3989 __ Branch(&done, eq, t6, Operand(zero_reg));
3990 3990
3991 __ xor_(t2, t6, t5); 3991 __ xor_(t2, t6, t5);
3992 __ movz(t3, zero_reg, t2); // Only if t6 is equal to t5. 3992 __ Movz(t3, zero_reg, t2); // Only if t6 is equal to t5.
3993 __ Branch(&done, eq, t6, Operand(t5)); 3993 __ Branch(&done, eq, t6, Operand(t5));
3994 3994
3995 // Unbias exponent. 3995 // Unbias exponent.
3996 __ srl(t6, t6, HeapNumber::kExponentShift); 3996 __ srl(t6, t6, HeapNumber::kExponentShift);
3997 __ Subu(t6, t6, Operand(HeapNumber::kExponentBias)); 3997 __ Subu(t6, t6, Operand(HeapNumber::kExponentBias));
3998 // If exponent is negative then result is 0. 3998 // If exponent is negative then result is 0.
3999 __ slt(t2, t6, zero_reg); 3999 __ slt(t2, t6, zero_reg);
4000 __ movn(t3, zero_reg, t2); // Only if exponent is negative. 4000 __ Movn(t3, zero_reg, t2); // Only if exponent is negative.
4001 __ Branch(&done, lt, t6, Operand(zero_reg)); 4001 __ Branch(&done, lt, t6, Operand(zero_reg));
4002 4002
4003 // If exponent is too big then result is minimal value. 4003 // If exponent is too big then result is minimal value.
4004 __ slti(t1, t6, meaningfull_bits - 1); 4004 __ slti(t1, t6, meaningfull_bits - 1);
4005 __ li(t2, min_value); 4005 __ li(t2, min_value);
4006 __ movz(t3, t2, t1); // Only if t6 is ge meaningfull_bits - 1. 4006 __ Movz(t3, t2, t1); // Only if t6 is ge meaningfull_bits - 1.
4007 __ Branch(&done, ge, t6, Operand(meaningfull_bits - 1)); 4007 __ Branch(&done, ge, t6, Operand(meaningfull_bits - 1));
4008 4008
4009 __ And(t5, t3, Operand(HeapNumber::kSignMask)); 4009 __ And(t5, t3, Operand(HeapNumber::kSignMask));
4010 __ And(t3, t3, Operand(HeapNumber::kMantissaMask)); 4010 __ And(t3, t3, Operand(HeapNumber::kMantissaMask));
4011 __ Or(t3, t3, Operand(1u << HeapNumber::kMantissaBitsInTopWord)); 4011 __ Or(t3, t3, Operand(1u << HeapNumber::kMantissaBitsInTopWord));
4012 4012
4013 __ li(t9, HeapNumber::kMantissaBitsInTopWord); 4013 __ li(t9, HeapNumber::kMantissaBitsInTopWord);
4014 __ subu(t6, t9, t6); 4014 __ subu(t6, t9, t6);
4015 __ slt(t1, t6, zero_reg); 4015 __ slt(t1, t6, zero_reg);
4016 __ srlv(t2, t3, t6); 4016 __ srlv(t2, t3, t6);
4017 __ movz(t3, t2, t1); // Only if t6 is positive. 4017 __ Movz(t3, t2, t1); // Only if t6 is positive.
4018 __ Branch(&sign, ge, t6, Operand(zero_reg)); 4018 __ Branch(&sign, ge, t6, Operand(zero_reg));
4019 4019
4020 __ subu(t6, zero_reg, t6); 4020 __ subu(t6, zero_reg, t6);
4021 __ sllv(t3, t3, t6); 4021 __ sllv(t3, t3, t6);
4022 __ li(t9, meaningfull_bits); 4022 __ li(t9, meaningfull_bits);
4023 __ subu(t6, t9, t6); 4023 __ subu(t6, t9, t6);
4024 __ srlv(t4, t4, t6); 4024 __ srlv(t4, t4, t6);
4025 __ or_(t3, t3, t4); 4025 __ or_(t3, t3, t4);
4026 4026
4027 __ bind(&sign); 4027 __ bind(&sign);
4028 __ subu(t2, t3, zero_reg); 4028 __ subu(t2, t3, zero_reg);
4029 __ movz(t3, t2, t5); // Only if t5 is zero. 4029 __ Movz(t3, t2, t5); // Only if t5 is zero.
4030 4030
4031 __ bind(&done); 4031 __ bind(&done);
4032 4032
4033 // Result is in t3. 4033 // Result is in t3.
4034 // This switch block should be exactly the same as above (FPU mode). 4034 // This switch block should be exactly the same as above (FPU mode).
4035 switch (elements_kind) { 4035 switch (elements_kind) {
4036 case EXTERNAL_BYTE_ELEMENTS: 4036 case EXTERNAL_BYTE_ELEMENTS:
4037 case EXTERNAL_UNSIGNED_BYTE_ELEMENTS: 4037 case EXTERNAL_UNSIGNED_BYTE_ELEMENTS:
4038 __ srl(t8, key, 1); 4038 __ srl(t8, key, 1);
4039 __ addu(t8, a3, t8); 4039 __ addu(t8, a3, t8);
(...skipping 469 matching lines...) Expand 10 before | Expand all | Expand 10 after
4509 __ Jump(ic_slow, RelocInfo::CODE_TARGET); 4509 __ Jump(ic_slow, RelocInfo::CODE_TARGET);
4510 } 4510 }
4511 } 4511 }
4512 4512
4513 4513
4514 #undef __ 4514 #undef __
4515 4515
4516 } } // namespace v8::internal 4516 } } // namespace v8::internal
4517 4517
4518 #endif // V8_TARGET_ARCH_MIPS 4518 #endif // V8_TARGET_ARCH_MIPS
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