MIPS: Added support for Loongson architectures.

build/common.gypi

 # Copyright 2012 the V8 project authors. All rights reserved.
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are
 # met:
 #
 #     * Redistributions of source code must retain the above copyright
 #       notice, this list of conditions and the following disclaimer.
 #     * Redistributions in binary form must reproduce the above
 #       copyright notice, this list of conditions and the following
 #       disclaimer in the documentation and/or other materials provided
@@ skipping 44 matching lines @@
 
     # Setting v8_use_arm_eabi_hardfloat to true will turn on V8 support for ARM
     # EABI calling convention where double arguments are passed in VFP
     # registers. Note that the GCC flag '-mfloat-abi=hard' should be used as
     # well when compiling for the ARM target.
     'v8_use_arm_eabi_hardfloat%': 'false',
 
     # Similar to the ARM hard float ABI but on MIPS.
     'v8_use_mips_abi_hardfloat%': 'true',
 
+    # Default arch variant for MIPS.
+    'mips_arch_variant%': 'mips32r2',
+
     'v8_enable_debugger_support%': 1,
 
     'v8_enable_disassembler%': 0,
 
     'v8_object_print%': 0,
 
     'v8_enable_gdbjit%': 0,
 
     # Enable profiling support. Only required on Windows.
     'v8_enable_prof%': 0,
@@ skipping 100 matching lines @@
                     'cflags': ['-EL'],
                     'ldflags': ['-EL'],
                     'conditions': [
                       [ 'v8_use_mips_abi_hardfloat=="true"', {
                         'cflags': ['-mhard-float'],
                         'ldflags': ['-mhard-float'],
                       }, {
                         'cflags': ['-msoft-float'],
                         'ldflags': ['-msoft-float'],
                       }],
+                    ],
+                    'conditions': [
                       ['mips_arch_variant=="mips32r2"', {
                         'cflags': ['-mips32r2', '-Wa,-mips32r2'],
+                      }],
+                      ['mips_arch_variant=="loongson"', {
+                        'cflags': ['-mips3', '-Wa,-mips3'],
                       }, {
                         'cflags': ['-mips32', '-Wa,-mips32'],
                       }],
                     ],
                   }],
                 ],
               }],
               [ 'v8_can_use_fpu_instructions=="true"', {
                 'defines': [
                   'CAN_USE_FPU_INSTRUCTIONS',
                 ],
               }],
               [ 'v8_use_mips_abi_hardfloat=="true"', {
                 'defines': [
                   '__mips_hard_float=1',
                   'CAN_USE_FPU_INSTRUCTIONS',
                 ],
               }, {
                 'defines': [
                   '__mips_soft_float=1'
                 ],
               }],
               ['mips_arch_variant=="mips32r2"', {
                 'defines': ['_MIPS_ARCH_MIPS32R2',],
               }],
+              ['mips_arch_variant=="loongson"', {
+                'defines': ['_MIPS_ARCH_LOONGSON',],
+              }],
               # The MIPS assembler assumes the host is 32 bits,
               # so force building 32-bit host tools.
               ['host_arch=="x64"', {
                 'target_conditions': [
                   ['_toolset=="host"', {
                     'cflags': ['-m32'],
                     'ldflags': ['-m32'],
                   }],
                 ],
               }],
@@ skipping 161 matching lines @@
                 # some test cases can cause stack overflow.
                 # 'StackReserveSize': '297152',
               },
             },
           }],  # OS=="win"
         ],  # conditions
       },  # Release
     },  # configurations
   },  # target_defaults
 }