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1 # Copyright 2012 the V8 project authors. All rights reserved. | 1 # Copyright 2012 the V8 project authors. All rights reserved. |
2 # Redistribution and use in source and binary forms, with or without | 2 # Redistribution and use in source and binary forms, with or without |
3 # modification, are permitted provided that the following conditions are | 3 # modification, are permitted provided that the following conditions are |
4 # met: | 4 # met: |
5 # | 5 # |
6 # * Redistributions of source code must retain the above copyright | 6 # * Redistributions of source code must retain the above copyright |
7 # notice, this list of conditions and the following disclaimer. | 7 # notice, this list of conditions and the following disclaimer. |
8 # * Redistributions in binary form must reproduce the above | 8 # * Redistributions in binary form must reproduce the above |
9 # copyright notice, this list of conditions and the following | 9 # copyright notice, this list of conditions and the following |
10 # disclaimer in the documentation and/or other materials provided | 10 # disclaimer in the documentation and/or other materials provided |
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55 | 55 |
56 # Setting v8_use_arm_eabi_hardfloat to true will turn on V8 support for ARM | 56 # Setting v8_use_arm_eabi_hardfloat to true will turn on V8 support for ARM |
57 # EABI calling convention where double arguments are passed in VFP | 57 # EABI calling convention where double arguments are passed in VFP |
58 # registers. Note that the GCC flag '-mfloat-abi=hard' should be used as | 58 # registers. Note that the GCC flag '-mfloat-abi=hard' should be used as |
59 # well when compiling for the ARM target. | 59 # well when compiling for the ARM target. |
60 'v8_use_arm_eabi_hardfloat%': 'false', | 60 'v8_use_arm_eabi_hardfloat%': 'false', |
61 | 61 |
62 # Similar to the ARM hard float ABI but on MIPS. | 62 # Similar to the ARM hard float ABI but on MIPS. |
63 'v8_use_mips_abi_hardfloat%': 'true', | 63 'v8_use_mips_abi_hardfloat%': 'true', |
64 | 64 |
| 65 # Default arch variant for MIPS. |
| 66 'mips_arch_variant%': 'mips32r2', |
| 67 |
65 'v8_enable_debugger_support%': 1, | 68 'v8_enable_debugger_support%': 1, |
66 | 69 |
67 'v8_enable_disassembler%': 0, | 70 'v8_enable_disassembler%': 0, |
68 | 71 |
69 'v8_object_print%': 0, | 72 'v8_object_print%': 0, |
70 | 73 |
71 'v8_enable_gdbjit%': 0, | 74 'v8_enable_gdbjit%': 0, |
72 | 75 |
73 # Enable profiling support. Only required on Windows. | 76 # Enable profiling support. Only required on Windows. |
74 'v8_enable_prof%': 0, | 77 'v8_enable_prof%': 0, |
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175 'cflags': ['-EL'], | 178 'cflags': ['-EL'], |
176 'ldflags': ['-EL'], | 179 'ldflags': ['-EL'], |
177 'conditions': [ | 180 'conditions': [ |
178 [ 'v8_use_mips_abi_hardfloat=="true"', { | 181 [ 'v8_use_mips_abi_hardfloat=="true"', { |
179 'cflags': ['-mhard-float'], | 182 'cflags': ['-mhard-float'], |
180 'ldflags': ['-mhard-float'], | 183 'ldflags': ['-mhard-float'], |
181 }, { | 184 }, { |
182 'cflags': ['-msoft-float'], | 185 'cflags': ['-msoft-float'], |
183 'ldflags': ['-msoft-float'], | 186 'ldflags': ['-msoft-float'], |
184 }], | 187 }], |
| 188 ], |
| 189 'conditions': [ |
185 ['mips_arch_variant=="mips32r2"', { | 190 ['mips_arch_variant=="mips32r2"', { |
186 'cflags': ['-mips32r2', '-Wa,-mips32r2'], | 191 'cflags': ['-mips32r2', '-Wa,-mips32r2'], |
| 192 }], |
| 193 ['mips_arch_variant=="loongson"', { |
| 194 'cflags': ['-mips3', '-Wa,-mips3'], |
187 }, { | 195 }, { |
188 'cflags': ['-mips32', '-Wa,-mips32'], | 196 'cflags': ['-mips32', '-Wa,-mips32'], |
189 }], | 197 }], |
190 ], | 198 ], |
191 }], | 199 }], |
192 ], | 200 ], |
193 }], | 201 }], |
194 [ 'v8_can_use_fpu_instructions=="true"', { | 202 [ 'v8_can_use_fpu_instructions=="true"', { |
195 'defines': [ | 203 'defines': [ |
196 'CAN_USE_FPU_INSTRUCTIONS', | 204 'CAN_USE_FPU_INSTRUCTIONS', |
197 ], | 205 ], |
198 }], | 206 }], |
199 [ 'v8_use_mips_abi_hardfloat=="true"', { | 207 [ 'v8_use_mips_abi_hardfloat=="true"', { |
200 'defines': [ | 208 'defines': [ |
201 '__mips_hard_float=1', | 209 '__mips_hard_float=1', |
202 'CAN_USE_FPU_INSTRUCTIONS', | 210 'CAN_USE_FPU_INSTRUCTIONS', |
203 ], | 211 ], |
204 }, { | 212 }, { |
205 'defines': [ | 213 'defines': [ |
206 '__mips_soft_float=1' | 214 '__mips_soft_float=1' |
207 ], | 215 ], |
208 }], | 216 }], |
209 ['mips_arch_variant=="mips32r2"', { | 217 ['mips_arch_variant=="mips32r2"', { |
210 'defines': ['_MIPS_ARCH_MIPS32R2',], | 218 'defines': ['_MIPS_ARCH_MIPS32R2',], |
211 }], | 219 }], |
| 220 ['mips_arch_variant=="loongson"', { |
| 221 'defines': ['_MIPS_ARCH_LOONGSON',], |
| 222 }], |
212 # The MIPS assembler assumes the host is 32 bits, | 223 # The MIPS assembler assumes the host is 32 bits, |
213 # so force building 32-bit host tools. | 224 # so force building 32-bit host tools. |
214 ['host_arch=="x64"', { | 225 ['host_arch=="x64"', { |
215 'target_conditions': [ | 226 'target_conditions': [ |
216 ['_toolset=="host"', { | 227 ['_toolset=="host"', { |
217 'cflags': ['-m32'], | 228 'cflags': ['-m32'], |
218 'ldflags': ['-m32'], | 229 'ldflags': ['-m32'], |
219 }], | 230 }], |
220 ], | 231 ], |
221 }], | 232 }], |
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383 # some test cases can cause stack overflow. | 394 # some test cases can cause stack overflow. |
384 # 'StackReserveSize': '297152', | 395 # 'StackReserveSize': '297152', |
385 }, | 396 }, |
386 }, | 397 }, |
387 }], # OS=="win" | 398 }], # OS=="win" |
388 ], # conditions | 399 ], # conditions |
389 }, # Release | 400 }, # Release |
390 }, # configurations | 401 }, # configurations |
391 }, # target_defaults | 402 }, # target_defaults |
392 } | 403 } |
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