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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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118 } | 118 } |
119 int bit() const { | 119 int bit() const { |
120 ASSERT(is_valid()); | 120 ASSERT(is_valid()); |
121 return 1 << code_; | 121 return 1 << code_; |
122 } | 122 } |
123 | 123 |
124 // Unfortunately we can't make this private in a struct. | 124 // Unfortunately we can't make this private in a struct. |
125 int code_; | 125 int code_; |
126 }; | 126 }; |
127 | 127 |
128 const Register no_reg = { -1 }; | 128 #define REGISTER(N, C) \ |
| 129 const int kRegister_ ## N ## _Code = C; \ |
| 130 const Register N = { C } |
129 | 131 |
130 const Register zero_reg = { 0 }; // Always zero. | 132 REGISTER(no_reg, -1); |
131 const Register at = { 1 }; // at: Reserved for synthetic instructions. | 133 // Always zero. |
132 const Register v0 = { 2 }; // v0, v1: Used when returning multiple values | 134 REGISTER(zero_reg, 0); |
133 const Register v1 = { 3 }; // from subroutines. | 135 // at: Reserved for synthetic instructions. |
134 const Register a0 = { 4 }; // a0 - a4: Used to pass non-FP parameters. | 136 REGISTER(at, 1); |
135 const Register a1 = { 5 }; | 137 // v0, v1: Used when returning multiple values from subroutines. |
136 const Register a2 = { 6 }; | 138 REGISTER(v0, 2); |
137 const Register a3 = { 7 }; | 139 REGISTER(v1, 3); |
138 const Register t0 = { 8 }; // t0 - t9: Can be used without reservation, act | 140 // a0 - a4: Used to pass non-FP parameters. |
139 const Register t1 = { 9 }; // as temporary registers and are allowed to | 141 REGISTER(a0, 4); |
140 const Register t2 = { 10 }; // be destroyed by subroutines. | 142 REGISTER(a1, 5); |
141 const Register t3 = { 11 }; | 143 REGISTER(a2, 6); |
142 const Register t4 = { 12 }; | 144 REGISTER(a3, 7); |
143 const Register t5 = { 13 }; | 145 // t0 - t9: Can be used without reservation, act as temporary registers and are |
144 const Register t6 = { 14 }; | 146 // allowed to be destroyed by subroutines. |
145 const Register t7 = { 15 }; | 147 REGISTER(t0, 8); |
146 const Register s0 = { 16 }; // s0 - s7: Subroutine register variables. | 148 REGISTER(t1, 9); |
147 const Register s1 = { 17 }; // Subroutines that write to these registers | 149 REGISTER(t2, 10); |
148 const Register s2 = { 18 }; // must restore their values before exiting so | 150 REGISTER(t3, 11); |
149 const Register s3 = { 19 }; // that the caller can expect the values to be | 151 REGISTER(t4, 12); |
150 const Register s4 = { 20 }; // preserved. | 152 REGISTER(t5, 13); |
151 const Register s5 = { 21 }; | 153 REGISTER(t6, 14); |
152 const Register s6 = { 22 }; | 154 REGISTER(t7, 15); |
153 const Register s7 = { 23 }; | 155 // s0 - s7: Subroutine register variables. Subroutines that write to these |
154 const Register t8 = { 24 }; | 156 // registers must restore their values before exiting so that the caller can |
155 const Register t9 = { 25 }; | 157 // expect the values to be preserved. |
156 const Register k0 = { 26 }; // k0, k1: Reserved for system calls and | 158 REGISTER(s0, 16); |
157 const Register k1 = { 27 }; // interrupt handlers. | 159 REGISTER(s1, 17); |
158 const Register gp = { 28 }; // gp: Reserved. | 160 REGISTER(s2, 18); |
159 const Register sp = { 29 }; // sp: Stack pointer. | 161 REGISTER(s3, 19); |
160 const Register s8_fp = { 30 }; // fp: Frame pointer. | 162 REGISTER(s4, 20); |
161 const Register ra = { 31 }; // ra: Return address pointer. | 163 REGISTER(s5, 21); |
| 164 REGISTER(s6, 22); |
| 165 REGISTER(s7, 23); |
| 166 REGISTER(t8, 24); |
| 167 REGISTER(t9, 25); |
| 168 // k0, k1: Reserved for system calls and interrupt handlers. |
| 169 REGISTER(k0, 26); |
| 170 REGISTER(k1, 27); |
| 171 // gp: Reserved. |
| 172 REGISTER(gp, 28); |
| 173 // sp: Stack pointer. |
| 174 REGISTER(sp, 29); |
| 175 // fp: Frame pointer. |
| 176 REGISTER(fp, 30); |
| 177 // ra: Return address pointer. |
| 178 REGISTER(ra, 31); |
| 179 |
| 180 #undef REGISTER |
162 | 181 |
163 | 182 |
164 int ToNumber(Register reg); | 183 int ToNumber(Register reg); |
165 | 184 |
166 Register ToRegister(int num); | 185 Register ToRegister(int num); |
167 | 186 |
168 // Coprocessor register. | 187 // Coprocessor register. |
169 struct FPURegister { | 188 struct FPURegister { |
170 static const int kNumRegisters = v8::internal::kNumFPURegisters; | 189 static const int kNumRegisters = v8::internal::kNumFPURegisters; |
171 | 190 |
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296 const FPURegister f29 = { 29 }; | 315 const FPURegister f29 = { 29 }; |
297 const FPURegister f30 = { 30 }; | 316 const FPURegister f30 = { 30 }; |
298 const FPURegister f31 = { 31 }; | 317 const FPURegister f31 = { 31 }; |
299 | 318 |
300 // Register aliases. | 319 // Register aliases. |
301 // cp is assumed to be a callee saved register. | 320 // cp is assumed to be a callee saved register. |
302 static const Register& kLithiumScratchReg = s3; // Scratch register. | 321 static const Register& kLithiumScratchReg = s3; // Scratch register. |
303 static const Register& kLithiumScratchReg2 = s4; // Scratch register. | 322 static const Register& kLithiumScratchReg2 = s4; // Scratch register. |
304 static const Register& kRootRegister = s6; // Roots array pointer. | 323 static const Register& kRootRegister = s6; // Roots array pointer. |
305 static const Register& cp = s7; // JavaScript context pointer. | 324 static const Register& cp = s7; // JavaScript context pointer. |
306 static const Register& fp = s8_fp; // Alias for fp. | |
307 static const DoubleRegister& kLithiumScratchDouble = f30; | 325 static const DoubleRegister& kLithiumScratchDouble = f30; |
308 static const FPURegister& kDoubleRegZero = f28; | 326 static const FPURegister& kDoubleRegZero = f28; |
309 | 327 |
310 // FPU (coprocessor 1) control registers. | 328 // FPU (coprocessor 1) control registers. |
311 // Currently only FCSR (#31) is implemented. | 329 // Currently only FCSR (#31) is implemented. |
312 struct FPUControlRegister { | 330 struct FPUControlRegister { |
313 bool is_valid() const { return code_ == kFCSRRegister; } | 331 bool is_valid() const { return code_ == kFCSRRegister; } |
314 bool is(FPUControlRegister creg) const { return code_ == creg.code_; } | 332 bool is(FPUControlRegister creg) const { return code_ == creg.code_; } |
315 int code() const { | 333 int code() const { |
316 ASSERT(is_valid()); | 334 ASSERT(is_valid()); |
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1259 class EnsureSpace BASE_EMBEDDED { | 1277 class EnsureSpace BASE_EMBEDDED { |
1260 public: | 1278 public: |
1261 explicit EnsureSpace(Assembler* assembler) { | 1279 explicit EnsureSpace(Assembler* assembler) { |
1262 assembler->CheckBuffer(); | 1280 assembler->CheckBuffer(); |
1263 } | 1281 } |
1264 }; | 1282 }; |
1265 | 1283 |
1266 } } // namespace v8::internal | 1284 } } // namespace v8::internal |
1267 | 1285 |
1268 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1286 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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