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| 1 /* Copyright (c) 2007, Google Inc. | 1 /* Copyright (c) 2007, Google Inc. |
| 2 * All rights reserved. | 2 * All rights reserved. |
| 3 * | 3 * |
| 4 * Redistribution and use in source and binary forms, with or without | 4 * Redistribution and use in source and binary forms, with or without |
| 5 * modification, are permitted provided that the following conditions are | 5 * modification, are permitted provided that the following conditions are |
| 6 * met: | 6 * met: |
| 7 * | 7 * |
| 8 * * Redistributions of source code must retain the above copyright | 8 * * Redistributions of source code must retain the above copyright |
| 9 * notice, this list of conditions and the following disclaimer. | 9 * notice, this list of conditions and the following disclaimer. |
| 10 * * Redistributions in binary form must reproduce the above | 10 * * Redistributions in binary form must reproduce the above |
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| 93 // the instruction gives us the full length of the instruction in bytes. | 93 // the instruction gives us the full length of the instruction in bytes. |
| 94 instruction_bytes += operand_bytes_ + (current_byte - start_byte); | 94 instruction_bytes += operand_bytes_ + (current_byte - start_byte); |
| 95 | 95 |
| 96 // Return the instruction type, which was set by ProcessOpcode(). | 96 // Return the instruction type, which was set by ProcessOpcode(). |
| 97 return instruction_type_; | 97 return instruction_type_; |
| 98 } | 98 } |
| 99 | 99 |
| 100 void MiniDisassembler::Initialize() { | 100 void MiniDisassembler::Initialize() { |
| 101 operand_is_32_bits_ = operand_default_is_32_bits_; | 101 operand_is_32_bits_ = operand_default_is_32_bits_; |
| 102 address_is_32_bits_ = address_default_is_32_bits_; | 102 address_is_32_bits_ = address_default_is_32_bits_; |
| 103 #ifdef _M_X64 | |
| 104 operand_default_support_64_bits_ = true; | |
| 105 #else | |
| 106 operand_default_support_64_bits_ = false; | |
| 107 #endif | |
| 108 operand_is_64_bits_ = false; | |
| 109 operand_bytes_ = 0; | 103 operand_bytes_ = 0; |
| 110 have_modrm_ = false; | 104 have_modrm_ = false; |
| 111 should_decode_modrm_ = false; | 105 should_decode_modrm_ = false; |
| 112 instruction_type_ = IT_UNKNOWN; | 106 instruction_type_ = IT_UNKNOWN; |
| 113 got_f2_prefix_ = false; | 107 got_f2_prefix_ = false; |
| 114 got_f3_prefix_ = false; | 108 got_f3_prefix_ = false; |
| 115 got_66_prefix_ = false; | 109 got_66_prefix_ = false; |
| 116 } | 110 } |
| 117 | 111 |
| 118 InstructionType MiniDisassembler::ProcessPrefixes(unsigned char* start_byte, | 112 InstructionType MiniDisassembler::ProcessPrefixes(unsigned char* start_byte, |
| 119 unsigned int& size) { | 113 unsigned int& size) { |
| 120 InstructionType instruction_type = IT_GENERIC; | 114 InstructionType instruction_type = IT_GENERIC; |
| 121 const Opcode& opcode = s_ia32_opcode_map_[0].table_[*start_byte]; | 115 const Opcode& opcode = s_ia32_opcode_map_[0].table_[*start_byte]; |
| 122 | 116 |
| 123 switch (opcode.type_) { | 117 switch (opcode.type_) { |
| 124 case IT_PREFIX_ADDRESS: | 118 case IT_PREFIX_ADDRESS: |
| 125 address_is_32_bits_ = !address_default_is_32_bits_; | 119 address_is_32_bits_ = !address_default_is_32_bits_; |
| 126 goto nochangeoperand; | 120 goto nochangeoperand; |
| 127 case IT_PREFIX_OPERAND: | 121 case IT_PREFIX_OPERAND: |
| 128 operand_is_32_bits_ = !operand_default_is_32_bits_; | 122 operand_is_32_bits_ = !operand_default_is_32_bits_; |
| 129 nochangeoperand: | 123 nochangeoperand: |
| 130 case IT_PREFIX: | 124 case IT_PREFIX: |
| 131 | 125 |
| 132 if (0xF2 == (*start_byte)) | 126 if (0xF2 == (*start_byte)) |
| 133 got_f2_prefix_ = true; | 127 got_f2_prefix_ = true; |
| 134 else if (0xF3 == (*start_byte)) | 128 else if (0xF3 == (*start_byte)) |
| 135 got_f3_prefix_ = true; | 129 got_f3_prefix_ = true; |
| 136 else if (0x66 == (*start_byte)) | 130 else if (0x66 == (*start_byte)) |
| 137 got_66_prefix_ = true; | 131 got_66_prefix_ = true; |
| 138 else if (operand_default_support_64_bits_ && (*start_byte) & 0x48) | |
| 139 operand_is_64_bits_ = true; | |
| 140 | 132 |
| 141 instruction_type = opcode.type_; | 133 instruction_type = opcode.type_; |
| 142 size ++; | 134 size ++; |
| 143 // we got a prefix, so add one and check next byte | 135 // we got a prefix, so add one and check next byte |
| 144 ProcessPrefixes(start_byte + 1, size); | 136 ProcessPrefixes(start_byte + 1, size); |
| 145 default: | 137 default: |
| 146 break; // not a prefix byte | 138 break; // not a prefix byte |
| 147 } | 139 } |
| 148 | 140 |
| 149 return instruction_type; | 141 return instruction_type; |
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| 315 case OT_PD: // Unaligned packed double-precision floating point value | 307 case OT_PD: // Unaligned packed double-precision floating point value |
| 316 operand_bytes_ += OS_DOUBLE_PRECISION_FLOATING; | 308 operand_bytes_ += OS_DOUBLE_PRECISION_FLOATING; |
| 317 break; | 309 break; |
| 318 case OT_SS: | 310 case OT_SS: |
| 319 // Scalar element of a 128-bit packed single-precision | 311 // Scalar element of a 128-bit packed single-precision |
| 320 // floating data. | 312 // floating data. |
| 321 // We simply return enItUnknown since we don't have to support | 313 // We simply return enItUnknown since we don't have to support |
| 322 // floating point | 314 // floating point |
| 323 succeeded = false; | 315 succeeded = false; |
| 324 break; | 316 break; |
| 325 case OT_V: // Word, doubleword or quadword, depending on operand-size | 317 case OT_V: // Word or doubleword, depending on operand-size attribute. |
| 326 // attribute. | 318 if (operand_is_32_bits_) |
| 327 if (operand_is_64_bits_ && flag_operand & AM_I && | |
| 328 flag_operand & IOS_64) | |
| 329 operand_bytes_ += OS_QUAD_WORD; | |
| 330 else if (operand_is_32_bits_) | |
| 331 operand_bytes_ += OS_DOUBLE_WORD; | 319 operand_bytes_ += OS_DOUBLE_WORD; |
| 332 else | 320 else |
| 333 operand_bytes_ += OS_WORD; | 321 operand_bytes_ += OS_WORD; |
| 334 break; | 322 break; |
| 335 case OT_W: // Word, regardless of operand-size attribute. | 323 case OT_W: // Word, regardless of operand-size attribute. |
| 336 operand_bytes_ += OS_WORD; | 324 operand_bytes_ += OS_WORD; |
| 337 break; | 325 break; |
| 338 | 326 |
| 339 // Can safely ignore these. | 327 // Can safely ignore these. |
| 340 case OT_A: // Two one-word operands in memory or two double-word | 328 case OT_A: // Two one-word operands in memory or two double-word |
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| 422 default: | 410 default: |
| 423 break; | 411 break; |
| 424 } | 412 } |
| 425 } | 413 } |
| 426 | 414 |
| 427 size++; | 415 size++; |
| 428 return true; | 416 return true; |
| 429 } | 417 } |
| 430 | 418 |
| 431 }; // namespace sidestep | 419 }; // namespace sidestep |
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