Ensure using byte registers for byte instructions on ia32 and x64.

src/x64/assembler-x64.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 757 matching lines @@
   emit(0x80);
   emit_operand(subcode, dst);
   emit(src.value_);
 }
 
 
 void Assembler::immediate_arithmetic_op_8(byte subcode,
                                           Register dst,
                                           Immediate src) {
   EnsureSpace ensure_space(this);
-  if (dst.code() > 3) {
+  if (!dst.is_byte_register()) {
     // Use 64-bit mode byte registers.
     emit_rex_64(dst);
   }
   ASSERT(is_int8(src.value_) || is_uint8(src.value_));
   emit(0x80);
   emit_modrm(subcode, dst);
   emit(src.value_);
 }
 
 
@@ skipping 263 matching lines @@
 void Assembler::decl(const Operand& dst) {
   EnsureSpace ensure_space(this);
   emit_optional_rex_32(dst);
   emit(0xFF);
   emit_operand(1, dst);
 }
 
 
 void Assembler::decb(Register dst) {
   EnsureSpace ensure_space(this);
-  if (dst.code() > 3) {
+  if (!dst.is_byte_register()) {
     // Register is not one of al, bl, cl, dl.  Its encoding needs REX.
     emit_rex_32(dst);
   }
   emit(0xFE);
   emit_modrm(0x1, dst);
 }
 
 
 void Assembler::decb(const Operand& dst) {
   EnsureSpace ensure_space(this);
@@ skipping 307 matching lines @@
 
 
 void Assembler::leave() {
   EnsureSpace ensure_space(this);
   emit(0xC9);
 }
 
 
 void Assembler::movb(Register dst, const Operand& src) {
   EnsureSpace ensure_space(this);
-  if (dst.code() > 3) {
+  if (!dst.is_byte_register()) {
     // Register is not one of al, bl, cl, dl.  Its encoding needs REX.
     emit_rex_32(dst, src);
   } else {
     emit_optional_rex_32(dst, src);
   }
   emit(0x8A);
   emit_operand(dst, src);
 }
 
 
 void Assembler::movb(Register dst, Immediate imm) {
   EnsureSpace ensure_space(this);
-  if (dst.code() > 3) {
+  if (!dst.is_byte_register()) {
     emit_rex_32(dst);
   }
   emit(0xB0 + dst.low_bits());
   emit(imm.value_);
 }
 
 
 void Assembler::movb(const Operand& dst, Register src) {
   EnsureSpace ensure_space(this);
-  if (src.code() > 3) {
+  if (!src.is_byte_register()) {
     emit_rex_32(src, dst);
   } else {
     emit_optional_rex_32(src, dst);
   }
   emit(0x88);
   emit_operand(src, dst);
 }
 
 
 void Assembler::movw(const Operand& dst, Register src) {
@@ skipping 500 matching lines @@
 }
 
 
 void Assembler::setcc(Condition cc, Register reg) {
   if (cc > last_condition) {
     movb(reg, Immediate(cc == always ? 1 : 0));
     return;
   }
   EnsureSpace ensure_space(this);
   ASSERT(is_uint4(cc));
-  if (reg.code() > 3) {  // Use x64 byte registers, where different.
+  if (!reg.is_byte_register()) {  // Use x64 byte registers, where different.
     emit_rex_32(reg);
   }
   emit(0x0F);
   emit(0x90 | cc);
   emit_modrm(0x0, reg);
 }
 
 
 void Assembler::shld(Register dst, Register src) {
   EnsureSpace ensure_space(this);
@@ skipping 44 matching lines @@
 }
 
 
 void Assembler::testb(Register dst, Register src) {
   EnsureSpace ensure_space(this);
   if (src.low_bits() == 4) {
     emit_rex_32(src, dst);
     emit(0x84);
     emit_modrm(src, dst);
   } else {
-    if (dst.code() > 3 || src.code() > 3) {
+    if (!dst.is_byte_register() || !src.is_byte_register()) {
       // Register is not one of al, bl, cl, dl.  Its encoding needs REX.
       emit_rex_32(dst, src);
     }
     emit(0x84);
     emit_modrm(dst, src);
   }
 }
 
 
 void Assembler::testb(Register reg, Immediate mask) {
   ASSERT(is_int8(mask.value_) || is_uint8(mask.value_));
   EnsureSpace ensure_space(this);
   if (reg.is(rax)) {
     emit(0xA8);
     emit(mask.value_);  // Low byte emitted.
   } else {
-    if (reg.code() > 3) {
+    if (!reg.is_byte_register()) {
       // Register is not one of al, bl, cl, dl.  Its encoding needs REX.
       emit_rex_32(reg);
     }
     emit(0xF6);
     emit_modrm(0x0, reg);
     emit(mask.value_);  // Low byte emitted.
   }
 }
 
 
 void Assembler::testb(const Operand& op, Immediate mask) {
   ASSERT(is_int8(mask.value_) || is_uint8(mask.value_));
   EnsureSpace ensure_space(this);
   emit_optional_rex_32(rax, op);
   emit(0xF6);
   emit_operand(rax, op);  // Operation code 0
   emit(mask.value_);  // Low byte emitted.
 }
 
 
 void Assembler::testb(const Operand& op, Register reg) {
   EnsureSpace ensure_space(this);
-  if (reg.code() > 3) {
+  if (!reg.is_byte_register()) {
     // Register is not one of al, bl, cl, dl.  Its encoding needs REX.
     emit_rex_32(reg, op);
   } else {
     emit_optional_rex_32(reg, op);
   }
   emit(0x84);
   emit_operand(reg, op);
 }
 
 
@@ skipping 991 matching lines @@
   // specially coded on x64 means that it is a relative 32 bit address, as used
   // by branch instructions.
   return (1 << rmode_) & kApplyMask;
 }
 
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_X64