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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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768 emit(0x80); | 768 emit(0x80); |
769 emit_operand(subcode, dst); | 769 emit_operand(subcode, dst); |
770 emit(src.value_); | 770 emit(src.value_); |
771 } | 771 } |
772 | 772 |
773 | 773 |
774 void Assembler::immediate_arithmetic_op_8(byte subcode, | 774 void Assembler::immediate_arithmetic_op_8(byte subcode, |
775 Register dst, | 775 Register dst, |
776 Immediate src) { | 776 Immediate src) { |
777 EnsureSpace ensure_space(this); | 777 EnsureSpace ensure_space(this); |
778 if (dst.code() > 3) { | 778 if (!dst.is_byte_register()) { |
779 // Use 64-bit mode byte registers. | 779 // Use 64-bit mode byte registers. |
780 emit_rex_64(dst); | 780 emit_rex_64(dst); |
781 } | 781 } |
782 ASSERT(is_int8(src.value_) || is_uint8(src.value_)); | 782 ASSERT(is_int8(src.value_) || is_uint8(src.value_)); |
783 emit(0x80); | 783 emit(0x80); |
784 emit_modrm(subcode, dst); | 784 emit_modrm(subcode, dst); |
785 emit(src.value_); | 785 emit(src.value_); |
786 } | 786 } |
787 | 787 |
788 | 788 |
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1052 void Assembler::decl(const Operand& dst) { | 1052 void Assembler::decl(const Operand& dst) { |
1053 EnsureSpace ensure_space(this); | 1053 EnsureSpace ensure_space(this); |
1054 emit_optional_rex_32(dst); | 1054 emit_optional_rex_32(dst); |
1055 emit(0xFF); | 1055 emit(0xFF); |
1056 emit_operand(1, dst); | 1056 emit_operand(1, dst); |
1057 } | 1057 } |
1058 | 1058 |
1059 | 1059 |
1060 void Assembler::decb(Register dst) { | 1060 void Assembler::decb(Register dst) { |
1061 EnsureSpace ensure_space(this); | 1061 EnsureSpace ensure_space(this); |
1062 if (dst.code() > 3) { | 1062 if (!dst.is_byte_register()) { |
1063 // Register is not one of al, bl, cl, dl. Its encoding needs REX. | 1063 // Register is not one of al, bl, cl, dl. Its encoding needs REX. |
1064 emit_rex_32(dst); | 1064 emit_rex_32(dst); |
1065 } | 1065 } |
1066 emit(0xFE); | 1066 emit(0xFE); |
1067 emit_modrm(0x1, dst); | 1067 emit_modrm(0x1, dst); |
1068 } | 1068 } |
1069 | 1069 |
1070 | 1070 |
1071 void Assembler::decb(const Operand& dst) { | 1071 void Assembler::decb(const Operand& dst) { |
1072 EnsureSpace ensure_space(this); | 1072 EnsureSpace ensure_space(this); |
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1380 | 1380 |
1381 | 1381 |
1382 void Assembler::leave() { | 1382 void Assembler::leave() { |
1383 EnsureSpace ensure_space(this); | 1383 EnsureSpace ensure_space(this); |
1384 emit(0xC9); | 1384 emit(0xC9); |
1385 } | 1385 } |
1386 | 1386 |
1387 | 1387 |
1388 void Assembler::movb(Register dst, const Operand& src) { | 1388 void Assembler::movb(Register dst, const Operand& src) { |
1389 EnsureSpace ensure_space(this); | 1389 EnsureSpace ensure_space(this); |
1390 if (dst.code() > 3) { | 1390 if (!dst.is_byte_register()) { |
1391 // Register is not one of al, bl, cl, dl. Its encoding needs REX. | 1391 // Register is not one of al, bl, cl, dl. Its encoding needs REX. |
1392 emit_rex_32(dst, src); | 1392 emit_rex_32(dst, src); |
1393 } else { | 1393 } else { |
1394 emit_optional_rex_32(dst, src); | 1394 emit_optional_rex_32(dst, src); |
1395 } | 1395 } |
1396 emit(0x8A); | 1396 emit(0x8A); |
1397 emit_operand(dst, src); | 1397 emit_operand(dst, src); |
1398 } | 1398 } |
1399 | 1399 |
1400 | 1400 |
1401 void Assembler::movb(Register dst, Immediate imm) { | 1401 void Assembler::movb(Register dst, Immediate imm) { |
1402 EnsureSpace ensure_space(this); | 1402 EnsureSpace ensure_space(this); |
1403 if (dst.code() > 3) { | 1403 if (!dst.is_byte_register()) { |
1404 emit_rex_32(dst); | 1404 emit_rex_32(dst); |
1405 } | 1405 } |
1406 emit(0xB0 + dst.low_bits()); | 1406 emit(0xB0 + dst.low_bits()); |
1407 emit(imm.value_); | 1407 emit(imm.value_); |
1408 } | 1408 } |
1409 | 1409 |
1410 | 1410 |
1411 void Assembler::movb(const Operand& dst, Register src) { | 1411 void Assembler::movb(const Operand& dst, Register src) { |
1412 EnsureSpace ensure_space(this); | 1412 EnsureSpace ensure_space(this); |
1413 if (src.code() > 3) { | 1413 if (!src.is_byte_register()) { |
1414 emit_rex_32(src, dst); | 1414 emit_rex_32(src, dst); |
1415 } else { | 1415 } else { |
1416 emit_optional_rex_32(src, dst); | 1416 emit_optional_rex_32(src, dst); |
1417 } | 1417 } |
1418 emit(0x88); | 1418 emit(0x88); |
1419 emit_operand(src, dst); | 1419 emit_operand(src, dst); |
1420 } | 1420 } |
1421 | 1421 |
1422 | 1422 |
1423 void Assembler::movw(const Operand& dst, Register src) { | 1423 void Assembler::movw(const Operand& dst, Register src) { |
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1924 } | 1924 } |
1925 | 1925 |
1926 | 1926 |
1927 void Assembler::setcc(Condition cc, Register reg) { | 1927 void Assembler::setcc(Condition cc, Register reg) { |
1928 if (cc > last_condition) { | 1928 if (cc > last_condition) { |
1929 movb(reg, Immediate(cc == always ? 1 : 0)); | 1929 movb(reg, Immediate(cc == always ? 1 : 0)); |
1930 return; | 1930 return; |
1931 } | 1931 } |
1932 EnsureSpace ensure_space(this); | 1932 EnsureSpace ensure_space(this); |
1933 ASSERT(is_uint4(cc)); | 1933 ASSERT(is_uint4(cc)); |
1934 if (reg.code() > 3) { // Use x64 byte registers, where different. | 1934 if (!reg.is_byte_register()) { // Use x64 byte registers, where different. |
1935 emit_rex_32(reg); | 1935 emit_rex_32(reg); |
1936 } | 1936 } |
1937 emit(0x0F); | 1937 emit(0x0F); |
1938 emit(0x90 | cc); | 1938 emit(0x90 | cc); |
1939 emit_modrm(0x0, reg); | 1939 emit_modrm(0x0, reg); |
1940 } | 1940 } |
1941 | 1941 |
1942 | 1942 |
1943 void Assembler::shld(Register dst, Register src) { | 1943 void Assembler::shld(Register dst, Register src) { |
1944 EnsureSpace ensure_space(this); | 1944 EnsureSpace ensure_space(this); |
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1989 } | 1989 } |
1990 | 1990 |
1991 | 1991 |
1992 void Assembler::testb(Register dst, Register src) { | 1992 void Assembler::testb(Register dst, Register src) { |
1993 EnsureSpace ensure_space(this); | 1993 EnsureSpace ensure_space(this); |
1994 if (src.low_bits() == 4) { | 1994 if (src.low_bits() == 4) { |
1995 emit_rex_32(src, dst); | 1995 emit_rex_32(src, dst); |
1996 emit(0x84); | 1996 emit(0x84); |
1997 emit_modrm(src, dst); | 1997 emit_modrm(src, dst); |
1998 } else { | 1998 } else { |
1999 if (dst.code() > 3 || src.code() > 3) { | 1999 if (!dst.is_byte_register() || !src.is_byte_register()) { |
2000 // Register is not one of al, bl, cl, dl. Its encoding needs REX. | 2000 // Register is not one of al, bl, cl, dl. Its encoding needs REX. |
2001 emit_rex_32(dst, src); | 2001 emit_rex_32(dst, src); |
2002 } | 2002 } |
2003 emit(0x84); | 2003 emit(0x84); |
2004 emit_modrm(dst, src); | 2004 emit_modrm(dst, src); |
2005 } | 2005 } |
2006 } | 2006 } |
2007 | 2007 |
2008 | 2008 |
2009 void Assembler::testb(Register reg, Immediate mask) { | 2009 void Assembler::testb(Register reg, Immediate mask) { |
2010 ASSERT(is_int8(mask.value_) || is_uint8(mask.value_)); | 2010 ASSERT(is_int8(mask.value_) || is_uint8(mask.value_)); |
2011 EnsureSpace ensure_space(this); | 2011 EnsureSpace ensure_space(this); |
2012 if (reg.is(rax)) { | 2012 if (reg.is(rax)) { |
2013 emit(0xA8); | 2013 emit(0xA8); |
2014 emit(mask.value_); // Low byte emitted. | 2014 emit(mask.value_); // Low byte emitted. |
2015 } else { | 2015 } else { |
2016 if (reg.code() > 3) { | 2016 if (!reg.is_byte_register()) { |
2017 // Register is not one of al, bl, cl, dl. Its encoding needs REX. | 2017 // Register is not one of al, bl, cl, dl. Its encoding needs REX. |
2018 emit_rex_32(reg); | 2018 emit_rex_32(reg); |
2019 } | 2019 } |
2020 emit(0xF6); | 2020 emit(0xF6); |
2021 emit_modrm(0x0, reg); | 2021 emit_modrm(0x0, reg); |
2022 emit(mask.value_); // Low byte emitted. | 2022 emit(mask.value_); // Low byte emitted. |
2023 } | 2023 } |
2024 } | 2024 } |
2025 | 2025 |
2026 | 2026 |
2027 void Assembler::testb(const Operand& op, Immediate mask) { | 2027 void Assembler::testb(const Operand& op, Immediate mask) { |
2028 ASSERT(is_int8(mask.value_) || is_uint8(mask.value_)); | 2028 ASSERT(is_int8(mask.value_) || is_uint8(mask.value_)); |
2029 EnsureSpace ensure_space(this); | 2029 EnsureSpace ensure_space(this); |
2030 emit_optional_rex_32(rax, op); | 2030 emit_optional_rex_32(rax, op); |
2031 emit(0xF6); | 2031 emit(0xF6); |
2032 emit_operand(rax, op); // Operation code 0 | 2032 emit_operand(rax, op); // Operation code 0 |
2033 emit(mask.value_); // Low byte emitted. | 2033 emit(mask.value_); // Low byte emitted. |
2034 } | 2034 } |
2035 | 2035 |
2036 | 2036 |
2037 void Assembler::testb(const Operand& op, Register reg) { | 2037 void Assembler::testb(const Operand& op, Register reg) { |
2038 EnsureSpace ensure_space(this); | 2038 EnsureSpace ensure_space(this); |
2039 if (reg.code() > 3) { | 2039 if (!reg.is_byte_register()) { |
2040 // Register is not one of al, bl, cl, dl. Its encoding needs REX. | 2040 // Register is not one of al, bl, cl, dl. Its encoding needs REX. |
2041 emit_rex_32(reg, op); | 2041 emit_rex_32(reg, op); |
2042 } else { | 2042 } else { |
2043 emit_optional_rex_32(reg, op); | 2043 emit_optional_rex_32(reg, op); |
2044 } | 2044 } |
2045 emit(0x84); | 2045 emit(0x84); |
2046 emit_operand(reg, op); | 2046 emit_operand(reg, op); |
2047 } | 2047 } |
2048 | 2048 |
2049 | 2049 |
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3041 // specially coded on x64 means that it is a relative 32 bit address, as used | 3041 // specially coded on x64 means that it is a relative 32 bit address, as used |
3042 // by branch instructions. | 3042 // by branch instructions. |
3043 return (1 << rmode_) & kApplyMask; | 3043 return (1 << rmode_) & kApplyMask; |
3044 } | 3044 } |
3045 | 3045 |
3046 | 3046 |
3047 | 3047 |
3048 } } // namespace v8::internal | 3048 } } // namespace v8::internal |
3049 | 3049 |
3050 #endif // V8_TARGET_ARCH_X64 | 3050 #endif // V8_TARGET_ARCH_X64 |
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