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Issue 9418005: Ensure using byte registers for byte instructions on ia32 and x64. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: . Created 8 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 557 matching lines...) Expand 10 before | Expand all | Expand 10 after
568 } 568 }
569 569
570 570
571 void Assembler::leave() { 571 void Assembler::leave() {
572 EnsureSpace ensure_space(this); 572 EnsureSpace ensure_space(this);
573 EMIT(0xC9); 573 EMIT(0xC9);
574 } 574 }
575 575
576 576
577 void Assembler::mov_b(Register dst, const Operand& src) { 577 void Assembler::mov_b(Register dst, const Operand& src) {
578 ASSERT(dst.code() < 4); 578 CHECK(dst.is_byte_register());
579 EnsureSpace ensure_space(this); 579 EnsureSpace ensure_space(this);
580 EMIT(0x8A); 580 EMIT(0x8A);
581 emit_operand(dst, src); 581 emit_operand(dst, src);
582 } 582 }
583 583
584 584
585 void Assembler::mov_b(const Operand& dst, int8_t imm8) { 585 void Assembler::mov_b(const Operand& dst, int8_t imm8) {
586 EnsureSpace ensure_space(this); 586 EnsureSpace ensure_space(this);
587 EMIT(0xC6); 587 EMIT(0xC6);
588 emit_operand(eax, dst); 588 emit_operand(eax, dst);
589 EMIT(imm8); 589 EMIT(imm8);
590 } 590 }
591 591
592 592
593 void Assembler::mov_b(const Operand& dst, Register src) { 593 void Assembler::mov_b(const Operand& dst, Register src) {
594 ASSERT(src.code() < 4); 594 CHECK(src.is_byte_register());
595 EnsureSpace ensure_space(this); 595 EnsureSpace ensure_space(this);
596 EMIT(0x88); 596 EMIT(0x88);
597 emit_operand(src, dst); 597 emit_operand(src, dst);
598 } 598 }
599 599
600 600
601 void Assembler::mov_w(Register dst, const Operand& src) { 601 void Assembler::mov_w(Register dst, const Operand& src) {
602 EnsureSpace ensure_space(this); 602 EnsureSpace ensure_space(this);
603 EMIT(0x66); 603 EMIT(0x66);
604 EMIT(0x8B); 604 EMIT(0x8B);
(...skipping 217 matching lines...) Expand 10 before | Expand all | Expand 10 after
822 EMIT(0x3C); 822 EMIT(0x3C);
823 } else { 823 } else {
824 EMIT(0x80); 824 EMIT(0x80);
825 emit_operand(edi, op); // edi == 7 825 emit_operand(edi, op); // edi == 7
826 } 826 }
827 EMIT(imm8); 827 EMIT(imm8);
828 } 828 }
829 829
830 830
831 void Assembler::cmpb(const Operand& op, Register reg) { 831 void Assembler::cmpb(const Operand& op, Register reg) {
832 ASSERT(reg.is_byte_register()); 832 CHECK(reg.is_byte_register());
833 EnsureSpace ensure_space(this); 833 EnsureSpace ensure_space(this);
834 EMIT(0x38); 834 EMIT(0x38);
835 emit_operand(reg, op); 835 emit_operand(reg, op);
836 } 836 }
837 837
838 838
839 void Assembler::cmpb(Register reg, const Operand& op) { 839 void Assembler::cmpb(Register reg, const Operand& op) {
840 ASSERT(reg.is_byte_register()); 840 CHECK(reg.is_byte_register());
841 EnsureSpace ensure_space(this); 841 EnsureSpace ensure_space(this);
842 EMIT(0x3A); 842 EMIT(0x3A);
843 emit_operand(reg, op); 843 emit_operand(reg, op);
844 } 844 }
845 845
846 846
847 void Assembler::cmpw(const Operand& op, Immediate imm16) { 847 void Assembler::cmpw(const Operand& op, Immediate imm16) {
848 ASSERT(imm16.is_int16()); 848 ASSERT(imm16.is_int16());
849 EnsureSpace ensure_space(this); 849 EnsureSpace ensure_space(this);
850 EMIT(0x66); 850 EMIT(0x66);
(...skipping 43 matching lines...) Expand 10 before | Expand all | Expand 10 after
894 894
895 void Assembler::cmpw_ax(const Operand& op) { 895 void Assembler::cmpw_ax(const Operand& op) {
896 EnsureSpace ensure_space(this); 896 EnsureSpace ensure_space(this);
897 EMIT(0x66); 897 EMIT(0x66);
898 EMIT(0x39); // CMP r/m16, r16 898 EMIT(0x39); // CMP r/m16, r16
899 emit_operand(eax, op); // eax has same code as register ax. 899 emit_operand(eax, op); // eax has same code as register ax.
900 } 900 }
901 901
902 902
903 void Assembler::dec_b(Register dst) { 903 void Assembler::dec_b(Register dst) {
904 CHECK(dst.is_byte_register());
904 EnsureSpace ensure_space(this); 905 EnsureSpace ensure_space(this);
905 EMIT(0xFE); 906 EMIT(0xFE);
906 EMIT(0xC8 | dst.code()); 907 EMIT(0xC8 | dst.code());
907 } 908 }
908 909
909 910
910 void Assembler::dec_b(const Operand& dst) { 911 void Assembler::dec_b(const Operand& dst) {
911 EnsureSpace ensure_space(this); 912 EnsureSpace ensure_space(this);
912 EMIT(0xFE); 913 EMIT(0xFE);
913 emit_operand(ecx, dst); 914 emit_operand(ecx, dst);
(...skipping 253 matching lines...) Expand 10 before | Expand all | Expand 10 after
1167 EnsureSpace ensure_space(this); 1168 EnsureSpace ensure_space(this);
1168 EMIT(0x29); 1169 EMIT(0x29);
1169 emit_operand(src, dst); 1170 emit_operand(src, dst);
1170 } 1171 }
1171 1172
1172 1173
1173 void Assembler::test(Register reg, const Immediate& imm) { 1174 void Assembler::test(Register reg, const Immediate& imm) {
1174 EnsureSpace ensure_space(this); 1175 EnsureSpace ensure_space(this);
1175 // Only use test against byte for registers that have a byte 1176 // Only use test against byte for registers that have a byte
1176 // variant: eax, ebx, ecx, and edx. 1177 // variant: eax, ebx, ecx, and edx.
1177 if (imm.rmode_ == RelocInfo::NONE && is_uint8(imm.x_) && reg.code() < 4) { 1178 if (imm.rmode_ == RelocInfo::NONE &&
1179 is_uint8(imm.x_) &&
1180 reg.is_byte_register()) {
1178 uint8_t imm8 = imm.x_; 1181 uint8_t imm8 = imm.x_;
1179 if (reg.is(eax)) { 1182 if (reg.is(eax)) {
1180 EMIT(0xA8); 1183 EMIT(0xA8);
1181 EMIT(imm8); 1184 EMIT(imm8);
1182 } else { 1185 } else {
1183 emit_arith_b(0xF6, 0xC0, reg, imm8); 1186 emit_arith_b(0xF6, 0xC0, reg, imm8);
1184 } 1187 }
1185 } else { 1188 } else {
1186 // This is not using emit_arith because test doesn't support 1189 // This is not using emit_arith because test doesn't support
1187 // sign-extension of 8-bit operands. 1190 // sign-extension of 8-bit operands.
1188 if (reg.is(eax)) { 1191 if (reg.is(eax)) {
1189 EMIT(0xA9); 1192 EMIT(0xA9);
1190 } else { 1193 } else {
1191 EMIT(0xF7); 1194 EMIT(0xF7);
1192 EMIT(0xC0 | reg.code()); 1195 EMIT(0xC0 | reg.code());
1193 } 1196 }
1194 emit(imm); 1197 emit(imm);
1195 } 1198 }
1196 } 1199 }
1197 1200
1198 1201
1199 void Assembler::test(Register reg, const Operand& op) { 1202 void Assembler::test(Register reg, const Operand& op) {
1200 EnsureSpace ensure_space(this); 1203 EnsureSpace ensure_space(this);
1201 EMIT(0x85); 1204 EMIT(0x85);
1202 emit_operand(reg, op); 1205 emit_operand(reg, op);
1203 } 1206 }
1204 1207
1205 1208
1206 void Assembler::test_b(Register reg, const Operand& op) { 1209 void Assembler::test_b(Register reg, const Operand& op) {
1210 CHECK(reg.is_byte_register());
1207 EnsureSpace ensure_space(this); 1211 EnsureSpace ensure_space(this);
1208 EMIT(0x84); 1212 EMIT(0x84);
1209 emit_operand(reg, op); 1213 emit_operand(reg, op);
1210 } 1214 }
1211 1215
1212 1216
1213 void Assembler::test(const Operand& op, const Immediate& imm) { 1217 void Assembler::test(const Operand& op, const Immediate& imm) {
1214 EnsureSpace ensure_space(this); 1218 EnsureSpace ensure_space(this);
1215 EMIT(0xF7); 1219 EMIT(0xF7);
1216 emit_operand(eax, op); 1220 emit_operand(eax, op);
1217 emit(imm); 1221 emit(imm);
1218 } 1222 }
1219 1223
1220 1224
1221 void Assembler::test_b(const Operand& op, uint8_t imm8) { 1225 void Assembler::test_b(const Operand& op, uint8_t imm8) {
1222 if (op.is_reg_only() && op.reg().code() >= 4) { 1226 if (op.is_reg_only() && !op.reg().is_byte_register()) {
1223 test(op, Immediate(imm8)); 1227 test(op, Immediate(imm8));
1224 return; 1228 return;
1225 } 1229 }
1226 EnsureSpace ensure_space(this); 1230 EnsureSpace ensure_space(this);
1227 EMIT(0xF6); 1231 EMIT(0xF6);
1228 emit_operand(eax, op); 1232 emit_operand(eax, op);
1229 EMIT(imm8); 1233 EMIT(imm8);
1230 } 1234 }
1231 1235
1232 1236
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2613 fprintf(coverage_log, "%s\n", file_line); 2617 fprintf(coverage_log, "%s\n", file_line);
2614 fflush(coverage_log); 2618 fflush(coverage_log);
2615 } 2619 }
2616 } 2620 }
2617 2621
2618 #endif 2622 #endif
2619 2623
2620 } } // namespace v8::internal 2624 } } // namespace v8::internal
2621 2625
2622 #endif // V8_TARGET_ARCH_IA32 2626 #endif // V8_TARGET_ARCH_IA32
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