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1 /* | |
2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. | |
3 * Use of this source code is governed by a BSD-style license that can be | |
4 * found in the LICENSE file. | |
5 */ | |
6 | |
7 #ifndef _VALIDATOR_X86_64_H_ | |
8 #define _VALIDATOR_X86_64_H_ | |
9 | |
10 #include <inttypes.h> | |
11 #include <stdbool.h> | |
12 | |
13 #ifdef __cplusplus | |
14 extern "C" { | |
15 #endif | |
16 | |
17 enum operand_type { | |
18 /* OperandSize8bit and OperandSize16bit don't affect sandboxing state of the | |
19 register: it may become different, but top half does not change it's value. | |
20 R15 can not be used even with these operands. */ | |
21 OperandNoSandboxEffect, | |
22 OperandSize8bit = 0, | |
23 OperandSize16bit = 0, | |
24 /* If we store to 32bit register then it's restricted. */ | |
25 OperandSandboxRestricted = 1, | |
26 OperandSize32bit = 1, | |
27 /* If we store to the 64bit register then it's unrestricted. */ | |
28 OperandSandboxUnrestricted = 2, | |
29 OperandSize64bit = 2, | |
30 /* All other combinations work with specialized registers, or can not actually | |
31 happen at all (for example they describe operand encoded in an instruction.
*/ | |
32 OperandSandboxIrrelevant = 3, | |
33 OperandSize2bit = 3, | |
34 OperandSize128bit = 3, | |
35 OperandSize256bit = 3, | |
36 OperandFloatSize16bit = 3, | |
37 OperandFloatSize32bit = 3, | |
38 OperandFloatSize64bit = 3, | |
39 OperandFloatSize80bit = 3, | |
40 OperandX87Size16bit = 3, | |
41 OperandX87Size32bit = 3, | |
42 OperandX87Size64bit = 3, | |
43 OperandX87BCD = 3, | |
44 OperandX87ENV = 3, | |
45 OperandX87STATE = 3, | |
46 OperandX87MMXXMMSTATE = 3, | |
47 OperandST = 3, | |
48 OperandSelector = 3, | |
49 OperandFarPtr = 3, | |
50 OperandSegmentRegister = 3, | |
51 OperandControlRegister = 3, | |
52 OperandDebugRegister = 3, | |
53 OperandMMX = 3, | |
54 OperandXMM = 3, | |
55 OperandYMM = 3 | |
56 }; | |
57 | |
58 enum register_name { | |
59 REG_RAX, | |
60 REG_RCX, | |
61 REG_RDX, | |
62 REG_RBX, | |
63 REG_RSP, | |
64 REG_RBP, | |
65 REG_RSI, | |
66 REG_RDI, | |
67 REG_R8, | |
68 REG_R9, | |
69 REG_R10, | |
70 REG_R11, | |
71 REG_R12, | |
72 REG_R13, | |
73 REG_R14, | |
74 REG_R15, | |
75 REG_RM, /* Address in memory via rm field. */ | |
76 REG_RIP, /* RIP - used as base in x86-64 mode. */ | |
77 REG_RIZ, /* EIZ/RIZ - used as "always zero index" register. */ | |
78 REG_IMM, /* Fixed value in imm field. */ | |
79 REG_IMM2, /* Fixed value in second imm field. */ | |
80 REG_DS_RBX, /* Fox xlat: %ds(%rbx). */ | |
81 REG_ES_RDI, /* For string instructions: %es:(%rsi). */ | |
82 REG_DS_RSI, /* For string instructions: %ds:(%rdi). */ | |
83 REG_PORT_DX, /* 16-bit DX: for in/out instructions. */ | |
84 REG_NONE, /* For modrm: both index and base can be absent. */ | |
85 REG_ST, /* For x87 instructions: implicit %st. */ | |
86 JMP_TO /* Operand is jump target address: usually %rip+offset. */ | |
87 }; | |
88 | |
89 typedef void (*process_error_func) (const uint8_t *ptr, void *userdata); | |
90 | |
91 int ValidateChunkAMD64(const uint8_t *data, size_t size, | |
92 process_error_func process_error, void *userdata); | |
93 | |
94 int ValidateChunkIA32(const uint8_t *data, size_t size, | |
95 process_error_func process_error, void *userdata); | |
96 | |
97 #ifdef __cplusplus | |
98 } | |
99 #endif | |
100 | |
101 #endif | |
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