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| 1 /* | |
| 2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. | |
| 3 * Use of this source code is governed by a BSD-style license that can be | |
| 4 * found in the LICENSE file. | |
| 5 */ | |
| 6 | |
| 7 #include <assert.h> | |
| 8 #include <elf.h> | |
| 9 #include <inttypes.h> | |
| 10 #include <stddef.h> | |
| 11 #include <stdio.h> | |
| 12 #include <stdlib.h> | |
| 13 #include <string.h> | |
| 14 #include "decoder.h" | |
| 15 | |
| 16 #undef TRUE | |
| 17 #define TRUE 1 | |
| 18 | |
| 19 #undef FALSE | |
| 20 #define FALSE 0 | |
| 21 | |
| 22 #include "decoder-x86_32-instruction-consts.c" | |
| 23 | |
| 24 %%{ | |
| 25 machine x86_32_decoder; | |
| 26 alphtype unsigned char; | |
| 27 | |
| 28 include decode_x86_32 "decoder-x86_32-instruction.rl"; | |
| 29 | |
| 30 main := (one_instruction | |
| 31 >{ | |
| 32 begin = p; | |
| 33 disp_type = DISPNONE; | |
| 34 imm_operand = IMMNONE; | |
| 35 imm2_operand = IMMNONE; | |
| 36 data16_prefix = FALSE; | |
| 37 lock_prefix = FALSE; | |
| 38 repnz_prefix = FALSE; | |
| 39 repz_prefix = FALSE; | |
| 40 branch_not_taken = FALSE; | |
| 41 branch_taken = FALSE; | |
| 42 vex_prefix3 = 0x00; | |
| 43 } | |
| 44 @{ | |
| 45 switch (disp_type) { | |
| 46 case DISPNONE: instruction.rm.offset = 0; break; | |
| 47 case DISP8: instruction.rm.offset = (uint64_t) *disp; break; | |
| 48 case DISP16: instruction.rm.offset = | |
| 49 (uint64_t) (disp[0] + 256U * disp[1]); | |
| 50 break; | |
| 51 case DISP32: instruction.rm.offset = (uint64_t) | |
| 52 (disp[0] + 256U * (disp[1] + 256U * (disp[2] + 256U * (disp[3])))); | |
| 53 break; | |
| 54 } | |
| 55 switch (imm_operand) { | |
| 56 case IMMNONE: instruction.imm[0] = 0; break; | |
| 57 case IMM2: instruction.imm[0] = imm[0] & 0x03; break; | |
| 58 case IMM8: instruction.imm[0] = imm[0]; break; | |
| 59 case IMM16: instruction.imm[0] = (uint64_t) (*imm + 256U * (imm[1])); | |
| 60 break; | |
| 61 case IMM32: instruction.imm[0] = (uint64_t) | |
| 62 (imm[0] + 256U * (imm[1] + 256U * (imm[2] + 256U * (imm[3])))); | |
| 63 break; | |
| 64 } | |
| 65 switch (imm2_operand) { | |
| 66 case IMMNONE: instruction.imm[1] = 0; break; | |
| 67 case IMM2: instruction.imm[1] = imm2[0] & 0x03; break; | |
| 68 case IMM8: instruction.imm[1] = imm2[0]; break; | |
| 69 case IMM16: instruction.imm[1] = (uint64_t) | |
| 70 (imm2[0] + 256U * (imm2[1])); | |
| 71 break; | |
| 72 case IMM32: instruction.imm[1] = (uint64_t) | |
| 73 (imm2[0] + 256U * (imm2[1] + 256U * (imm2[2] + 256U * (imm2[3])))); | |
| 74 break; | |
| 75 } | |
| 76 process_instruction(begin, p+1, &instruction, userdata); | |
| 77 })* | |
| 78 $!{ process_error(p, userdata); | |
| 79 result = 1; | |
| 80 goto error_detected; | |
| 81 }; | |
| 82 | |
| 83 }%% | |
| 84 | |
| 85 %% write data; | |
| 86 | |
| 87 #define base instruction.rm.base | |
| 88 #define index instruction.rm.index | |
| 89 #define scale instruction.rm.scale | |
| 90 #define data16_prefix instruction.prefix.data16 | |
| 91 #define lock_prefix instruction.prefix.lock | |
| 92 #define repz_prefix instruction.prefix.repz | |
| 93 #define repnz_prefix instruction.prefix.repnz | |
| 94 #define branch_not_taken instruction.prefix.branch_not_taken | |
| 95 #define branch_taken instruction.prefix.branch_taken | |
| 96 #define operand0_type instruction.operands[0].type | |
| 97 #define operand1_type instruction.operands[1].type | |
| 98 #define operand2_type instruction.operands[2].type | |
| 99 #define operand3_type instruction.operands[3].type | |
| 100 #define operand4_type instruction.operands[4].type | |
| 101 #define operand0 instruction.operands[0].name | |
| 102 #define operand1 instruction.operands[1].name | |
| 103 #define operand2 instruction.operands[2].name | |
| 104 #define operand3 instruction.operands[3].name | |
| 105 #define operand4 instruction.operands[4].name | |
| 106 #define operands_count instruction.operands_count | |
| 107 #define instruction_name instruction.name | |
| 108 | |
| 109 enum { | |
| 110 REX_B = 1, | |
| 111 REX_X = 2, | |
| 112 REX_R = 4, | |
| 113 REX_W = 8 | |
| 114 }; | |
| 115 | |
| 116 enum disp_mode { | |
| 117 DISPNONE, | |
| 118 DISP8, | |
| 119 DISP16, | |
| 120 DISP32 | |
| 121 }; | |
| 122 | |
| 123 enum imm_mode { | |
| 124 IMMNONE, | |
| 125 IMM2, | |
| 126 IMM8, | |
| 127 IMM16, | |
| 128 IMM32 | |
| 129 }; | |
| 130 | |
| 131 int DecodeChunkIA32(const uint8_t *data, size_t size, | |
| 132 process_instruction_func process_instruction, | |
| 133 process_error_func process_error, void *userdata) { | |
| 134 const uint8_t *p = data; | |
| 135 const uint8_t *pe = data + size; | |
| 136 const uint8_t *eof = pe; | |
| 137 const uint8_t *disp = NULL; | |
| 138 const uint8_t *imm = NULL; | |
| 139 const uint8_t *imm2 = NULL; | |
| 140 const uint8_t *begin; | |
| 141 uint8_t vex_prefix3; | |
| 142 enum disp_mode disp_type; | |
| 143 enum imm_mode imm_operand; | |
| 144 enum imm_mode imm2_operand; | |
| 145 struct instruction instruction; | |
| 146 int result = 0; | |
| 147 | |
| 148 int cs; | |
| 149 | |
| 150 /* Not used in ia32_mode. */ | |
| 151 instruction.prefix.rex = 0; | |
| 152 | |
| 153 %% write init; | |
| 154 %% write exec; | |
| 155 | |
| 156 error_detected: | |
| 157 return result; | |
| 158 } | |
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Chromium Code Reviews
Issue 9348082:
Move unreviewed files to unreviewed subdirectory (Closed)
Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/