Index: src/mips/cpu-mips.cc |
=================================================================== |
--- src/mips/cpu-mips.cc (revision 10518) |
+++ src/mips/cpu-mips.cc (working copy) |
@@ -1,4 +1,4 @@ |
-// Copyright 2011 the V8 project authors. All rights reserved. |
+// Copyright 2012 the V8 project authors. All rights reserved. |
// Redistribution and use in source and binary forms, with or without |
// modification, are permitted provided that the following conditions are |
// met: |
@@ -64,15 +64,19 @@ |
} |
#if !defined (USE_SIMULATOR) |
+#if defined(ANDROID) |
+ // Bionic cacheflush can typically run in userland, avoiding kernel call. |
+ char *end = reinterpret_cast<char *>(start) + size; |
+ cacheflush( |
+ reinterpret_cast<intptr_t>(start), reinterpret_cast<intptr_t>(end), 0); |
+#else // ANDROID |
int res; |
- |
// See http://www.linux-mips.org/wiki/Cacheflush_Syscall. |
res = syscall(__NR_cacheflush, start, size, ICACHE); |
- |
if (res) { |
V8_Fatal(__FILE__, __LINE__, "Failed to flush the instruction cache"); |
} |
- |
+#endif // ANDROID |
#else // USE_SIMULATOR. |
// Not generating mips instructions for C-code. This means that we are |
// building a mips emulator based target. We should notify the simulator |