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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 9150025: MIPS: Fix for an ARM register allocation bug. (Closed)
Patch Set: Created 8 years, 11 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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44 // 44 //
45 // The programmer should know that the MacroAssembler may clobber these three, 45 // The programmer should know that the MacroAssembler may clobber these three,
46 // but won't touch other registers except in special cases. 46 // but won't touch other registers except in special cases.
47 // 47 //
48 // Per the MIPS ABI, register t9 must be used for indirect function call 48 // Per the MIPS ABI, register t9 must be used for indirect function call
49 // via 'jalr t9' or 'jr t9' instructions. This is relied upon by gcc when 49 // via 'jalr t9' or 'jr t9' instructions. This is relied upon by gcc when
50 // trying to update gp register for position-independent-code. Whenever 50 // trying to update gp register for position-independent-code. Whenever
51 // MIPS generated code calls C code, it must be via t9 register. 51 // MIPS generated code calls C code, it must be via t9 register.
52 52
53 53
54 // Register aliases.
55 // cp is assumed to be a callee saved register.
56 const Register kLithiumScratchReg = s3; // Scratch register.
57 const Register kLithiumScratchReg2 = s4; // Scratch register.
58 const Register kCondReg = s5; // Simulated (partial) condition code for mips.
59 const Register kRootRegister = s6; // Roots array pointer.
60 const Register cp = s7; // JavaScript context pointer.
61 const Register fp = s8_fp; // Alias for fp.
62 const DoubleRegister kLithiumScratchDouble = f30; // Double scratch register.
63
64 // Flags used for the AllocateInNewSpace functions. 54 // Flags used for the AllocateInNewSpace functions.
65 enum AllocationFlags { 55 enum AllocationFlags {
66 // No special flags. 56 // No special flags.
67 NO_ALLOCATION_FLAGS = 0, 57 NO_ALLOCATION_FLAGS = 0,
68 // Return the pointer to the allocated already tagged as a heap object. 58 // Return the pointer to the allocated already tagged as a heap object.
69 TAG_OBJECT = 1 << 0, 59 TAG_OBJECT = 1 << 0,
70 // The content of the result register already contains the allocation top in 60 // The content of the result register already contains the allocation top in
71 // new space. 61 // new space.
72 RESULT_CONTAINS_TOP = 1 << 1, 62 RESULT_CONTAINS_TOP = 1 << 1,
73 // Specify that the requested size of the space to allocate is specified in 63 // Specify that the requested size of the space to allocate is specified in
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1454 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) 1444 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1455 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1445 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1456 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1446 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1457 #else 1447 #else
1458 #define ACCESS_MASM(masm) masm-> 1448 #define ACCESS_MASM(masm) masm->
1459 #endif 1449 #endif
1460 1450
1461 } } // namespace v8::internal 1451 } } // namespace v8::internal
1462 1452
1463 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1453 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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