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Issue 8932004: Implement target cache for constructor calls. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Addressed comments by Vyacheslav Egorov. Created 8 years, 11 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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248 // -- r2 : name 248 // -- r2 : name
249 // ----------------------------------- 249 // -----------------------------------
250 Generate_DebugBreakCallHelper(masm, r2.bit(), 0); 250 Generate_DebugBreakCallHelper(masm, r2.bit(), 0);
251 } 251 }
252 252
253 253
254 void Debug::GenerateConstructCallDebugBreak(MacroAssembler* masm) { 254 void Debug::GenerateConstructCallDebugBreak(MacroAssembler* masm) {
255 // Calling convention for construct call (from builtins-arm.cc) 255 // Calling convention for construct call (from builtins-arm.cc)
256 // -- r0 : number of arguments (not smi) 256 // -- r0 : number of arguments (not smi)
257 // -- r1 : constructor function 257 // -- r1 : constructor function
258 Generate_DebugBreakCallHelper(masm, r1.bit(), r0.bit()); 258 // -- r2 : cache cell for call target
259 Generate_DebugBreakCallHelper(masm, r1.bit() | r2.bit(), r0.bit());
259 } 260 }
260 261
261 262
262 void Debug::GenerateReturnDebugBreak(MacroAssembler* masm) { 263 void Debug::GenerateReturnDebugBreak(MacroAssembler* masm) {
263 // In places other than IC call sites it is expected that r0 is TOS which 264 // In places other than IC call sites it is expected that r0 is TOS which
264 // is an object - this is not generally the case so this should be used with 265 // is an object - this is not generally the case so this should be used with
265 // care. 266 // care.
266 Generate_DebugBreakCallHelper(masm, r0.bit(), 0); 267 Generate_DebugBreakCallHelper(masm, r0.bit(), 0);
267 } 268 }
268 269
269 270
270 void Debug::GenerateCallFunctionStubDebugBreak(MacroAssembler* masm) { 271 void Debug::GenerateCallFunctionStubDebugBreak(MacroAssembler* masm) {
272 // Register state for CallFunctionStub (from code-stubs-arm.cc).
271 // ----------- S t a t e ------------- 273 // ----------- S t a t e -------------
272 // -- r1 : function 274 // -- r1 : function
273 // ----------------------------------- 275 // -----------------------------------
274 Generate_DebugBreakCallHelper(masm, r1.bit(), 0); 276 Generate_DebugBreakCallHelper(masm, r1.bit(), 0);
275 } 277 }
276 278
277 279
278 void Debug::GenerateSlot(MacroAssembler* masm) { 280 void Debug::GenerateSlot(MacroAssembler* masm) {
279 // Generate enough nop's to make space for a call instruction. Avoid emitting 281 // Generate enough nop's to make space for a call instruction. Avoid emitting
280 // the constant pool in the debug break slot code. 282 // the constant pool in the debug break slot code.
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310 312
311 #undef __ 313 #undef __
312 314
313 315
314 316
315 #endif // ENABLE_DEBUGGER_SUPPORT 317 #endif // ENABLE_DEBUGGER_SUPPORT
316 318
317 } } // namespace v8::internal 319 } } // namespace v8::internal
318 320
319 #endif // V8_TARGET_ARCH_ARM 321 #endif // V8_TARGET_ARCH_ARM
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