| Index: src/x64/disasm-x64.cc
|
| diff --git a/src/x64/disasm-x64.cc b/src/x64/disasm-x64.cc
|
| index 0f879d10365615870cd4aae689ce47b52b287e3f..667561b7cf2571d6a2b60c444fc939baa2e54cf8 100644
|
| --- a/src/x64/disasm-x64.cc
|
| +++ b/src/x64/disasm-x64.cc
|
| @@ -1260,6 +1260,20 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) {
|
| byte_size_operand_ = idesc.byte_size_operation;
|
| current += PrintOperands(idesc.mnem, idesc.op_order_, current);
|
|
|
| + } else if (opcode == 0x54) {
|
| + // andps xmm, xmm/m128
|
| + int mod, regop, rm;
|
| + get_modrm(*current, &mod, ®op, &rm);
|
| + AppendToBuffer("andps %s,", NameOfXMMRegister(regop));
|
| + current += PrintRightXMMOperand(current);
|
| +
|
| + } else if (opcode == 0x56) {
|
| + // orps xmm, xmm/m128
|
| + int mod, regop, rm;
|
| + get_modrm(*current, &mod, ®op, &rm);
|
| + AppendToBuffer("orps %s,", NameOfXMMRegister(regop));
|
| + current += PrintRightXMMOperand(current);
|
| +
|
| } else if (opcode == 0x57) {
|
| // xorps xmm, xmm/m128
|
| int mod, regop, rm;
|
| @@ -1551,9 +1565,15 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
|
| } else {
|
| AppendToBuffer("mov%c ", operand_size_code());
|
| data += PrintRightOperand(data);
|
| - int32_t imm = *reinterpret_cast<int32_t*>(data);
|
| - AppendToBuffer(",0x%x", imm);
|
| - data += 4;
|
| + if (operand_size() == OPERAND_WORD_SIZE) {
|
| + int16_t imm = *reinterpret_cast<int16_t*>(data);
|
| + AppendToBuffer(",0x%x", imm);
|
| + data += 2;
|
| + } else {
|
| + int32_t imm = *reinterpret_cast<int32_t*>(data);
|
| + AppendToBuffer(",0x%x", imm);
|
| + data += 4;
|
| + }
|
| }
|
| }
|
| break;
|
|
|