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Issue 71163006: Merge bleeding_edge r17376:17693. (Closed) Base URL: https://v8.googlecode.com/svn/branches/experimental/parser
Patch Set: Fix all.gyp Created 7 years, 1 month ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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546 546
547 547
548 void Assembler::mov_w(const Operand& dst, Register src) { 548 void Assembler::mov_w(const Operand& dst, Register src) {
549 EnsureSpace ensure_space(this); 549 EnsureSpace ensure_space(this);
550 EMIT(0x66); 550 EMIT(0x66);
551 EMIT(0x89); 551 EMIT(0x89);
552 emit_operand(src, dst); 552 emit_operand(src, dst);
553 } 553 }
554 554
555 555
556 void Assembler::mov_w(const Operand& dst, int16_t imm16) {
557 EnsureSpace ensure_space(this);
558 EMIT(0x66);
559 EMIT(0xC7);
560 emit_operand(eax, dst);
561 EMIT(static_cast<int8_t>(imm16 & 0xff));
562 EMIT(static_cast<int8_t>(imm16 >> 8));
563 }
564
565
556 void Assembler::mov(Register dst, int32_t imm32) { 566 void Assembler::mov(Register dst, int32_t imm32) {
557 EnsureSpace ensure_space(this); 567 EnsureSpace ensure_space(this);
558 EMIT(0xB8 | dst.code()); 568 EMIT(0xB8 | dst.code());
559 emit(imm32); 569 emit(imm32);
560 } 570 }
561 571
562 572
563 void Assembler::mov(Register dst, const Immediate& x) { 573 void Assembler::mov(Register dst, const Immediate& x) {
564 EnsureSpace ensure_space(this); 574 EnsureSpace ensure_space(this);
565 EMIT(0xB8 | dst.code()); 575 EMIT(0xB8 | dst.code());
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2052 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { 2062 void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
2053 ASSERT(IsEnabled(SSE2)); 2063 ASSERT(IsEnabled(SSE2));
2054 EnsureSpace ensure_space(this); 2064 EnsureSpace ensure_space(this);
2055 EMIT(0x66); 2065 EMIT(0x66);
2056 EMIT(0x0F); 2066 EMIT(0x0F);
2057 EMIT(0x57); 2067 EMIT(0x57);
2058 emit_sse_operand(dst, src); 2068 emit_sse_operand(dst, src);
2059 } 2069 }
2060 2070
2061 2071
2072 void Assembler::andps(XMMRegister dst, XMMRegister src) {
2073 EnsureSpace ensure_space(this);
2074 EMIT(0x0F);
2075 EMIT(0x54);
2076 emit_sse_operand(dst, src);
2077 }
2078
2079
2080 void Assembler::orps(XMMRegister dst, XMMRegister src) {
2081 EnsureSpace ensure_space(this);
2082 EMIT(0x0F);
2083 EMIT(0x56);
2084 emit_sse_operand(dst, src);
2085 }
2086
2087
2062 void Assembler::xorps(XMMRegister dst, XMMRegister src) { 2088 void Assembler::xorps(XMMRegister dst, XMMRegister src) {
2063 EnsureSpace ensure_space(this); 2089 EnsureSpace ensure_space(this);
2064 EMIT(0x0F); 2090 EMIT(0x0F);
2065 EMIT(0x57); 2091 EMIT(0x57);
2066 emit_sse_operand(dst, src); 2092 emit_sse_operand(dst, src);
2067 } 2093 }
2068 2094
2069 2095
2070 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { 2096 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
2071 ASSERT(IsEnabled(SSE2)); 2097 ASSERT(IsEnabled(SSE2));
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2681 fprintf(coverage_log, "%s\n", file_line); 2707 fprintf(coverage_log, "%s\n", file_line);
2682 fflush(coverage_log); 2708 fflush(coverage_log);
2683 } 2709 }
2684 } 2710 }
2685 2711
2686 #endif 2712 #endif
2687 2713
2688 } } // namespace v8::internal 2714 } } // namespace v8::internal
2689 2715
2690 #endif // V8_TARGET_ARCH_IA32 2716 #endif // V8_TARGET_ARCH_IA32
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