[WASM SIMD] Replace primitive shuffles with general Shuffle.

src/wasm/wasm-opcodes.h

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_WASM_OPCODES_H_
 #define V8_WASM_OPCODES_H_
 
 #include "src/globals.h"
 #include "src/machine-type.h"
 #include "src/runtime/runtime.h"
@@ skipping 369 matching lines @@
   V(I8x16LtU, 0xe572, s1x16_ss)          \
   V(I8x16LeU, 0xe573, s1x16_ss)          \
   V(I8x16GtU, 0xe574, s1x16_ss)          \
   V(I8x16GeU, 0xe575, s1x16_ss)          \
   V(I8x16SConvertI16x8, 0xe59e, s_ss)    \
   V(I8x16UConvertI16x8, 0xe59f, s_ss)    \
   V(S128And, 0xe576, s_ss)               \
   V(S128Or, 0xe577, s_ss)                \
   V(S128Xor, 0xe578, s_ss)               \
   V(S128Not, 0xe579, s_s)                \
-  V(S32x4ZipLeft, 0xe5a0, s_ss)          \
-  V(S32x4ZipRight, 0xe5a1, s_ss)         \
-  V(S32x4UnzipLeft, 0xe5a2, s_ss)        \
-  V(S32x4UnzipRight, 0xe5a3, s_ss)       \
-  V(S32x4TransposeLeft, 0xe5a4, s_ss)    \
-  V(S32x4TransposeRight, 0xe5a5, s_ss)   \
   V(S32x4Select, 0xe52c, s_s1x4ss)       \
-  V(S16x8ZipLeft, 0xe5a6, s_ss)          \
-  V(S16x8ZipRight, 0xe5a7, s_ss)         \
-  V(S16x8UnzipLeft, 0xe5a8, s_ss)        \
-  V(S16x8UnzipRight, 0xe5a9, s_ss)       \
-  V(S16x8TransposeLeft, 0xe5aa, s_ss)    \
-  V(S16x8TransposeRight, 0xe5ab, s_ss)   \
   V(S16x8Select, 0xe54b, s_s1x8ss)       \
-  V(S8x16ZipLeft, 0xe5ac, s_ss)          \
-  V(S8x16ZipRight, 0xe5ad, s_ss)         \
-  V(S8x16UnzipLeft, 0xe5ae, s_ss)        \
-  V(S8x16UnzipRight, 0xe5af, s_ss)       \
-  V(S8x16TransposeLeft, 0xe5b0, s_ss)    \
-  V(S8x16TransposeRight, 0xe5b1, s_ss)   \
   V(S8x16Select, 0xe56a, s_s1x16ss)      \
-  V(S32x2Reverse, 0xe5b2, s_s)           \
-  V(S16x4Reverse, 0xe5b3, s_s)           \
-  V(S16x2Reverse, 0xe5b4, s_s)           \
-  V(S8x8Reverse, 0xe5b5, s_s)            \
-  V(S8x4Reverse, 0xe5b6, s_s)            \
-  V(S8x2Reverse, 0xe5b7, s_s)            \
   V(S1x4And, 0xe580, s1x4_s1x4s1x4)      \
   V(S1x4Or, 0xe581, s1x4_s1x4s1x4)       \
   V(S1x4Xor, 0xe582, s1x4_s1x4s1x4)      \
   V(S1x4Not, 0xe583, s1x4_s1x4)          \
   V(S1x4AnyTrue, 0xe584, i_s1x4)         \
   V(S1x4AllTrue, 0xe585, i_s1x4)         \
   V(S1x8And, 0xe586, s1x8_s1x8s1x8)      \
   V(S1x8Or, 0xe587, s1x8_s1x8s1x8)       \
   V(S1x8Xor, 0xe588, s1x8_s1x8s1x8)      \
   V(S1x8Not, 0xe589, s1x8_s1x8)          \
@@ skipping 16 matching lines @@
   V(I32x4ShrU, 0xe532, _)                \
   V(I16x8ExtractLane, 0xe539, _)         \
   V(I16x8ReplaceLane, 0xe53a, _)         \
   V(I16x8Shl, 0xe543, _)                 \
   V(I16x8ShrS, 0xe544, _)                \
   V(I16x8ShrU, 0xe552, _)                \
   V(I8x16ExtractLane, 0xe558, _)         \
   V(I8x16ReplaceLane, 0xe559, _)         \
   V(I8x16Shl, 0xe562, _)                 \
   V(I8x16ShrS, 0xe563, _)                \
-  V(I8x16ShrU, 0xe571, _)                \
-  V(S8x16Concat, 0xe5b8, _)
+  V(I8x16ShrU, 0xe571, _)
+
+#define FOREACH_SIMD_MASK_OPERAND_OPCODE(V) \
+  V(S32x4Shuffle, 0xe52d, s_ss)             \
+  V(S16x8Shuffle, 0xe54c, s_ss)             \
+  V(S8x16Shuffle, 0xe56b, s_ss)
 
 #define FOREACH_ATOMIC_OPCODE(V)               \
   V(I32AtomicAdd8S, 0xe601, i_ii)              \
   V(I32AtomicAdd8U, 0xe602, i_ii)              \
   V(I32AtomicAdd16S, 0xe603, i_ii)             \
   V(I32AtomicAdd16U, 0xe604, i_ii)             \
   V(I32AtomicAdd, 0xe605, i_ii)                \
   V(I32AtomicAnd8S, 0xe606, i_ii)              \
   V(I32AtomicAnd8U, 0xe607, i_ii)              \
   V(I32AtomicAnd16S, 0xe608, i_ii)             \
@@ skipping 19 matching lines @@
   V(I32AtomicSub16S, 0xe61c, i_ii)             \
   V(I32AtomicSub16U, 0xe61d, i_ii)             \
   V(I32AtomicSub, 0xe61e, i_ii)                \
   V(I32AtomicXor8S, 0xe61f, i_ii)              \
   V(I32AtomicXor8U, 0xe620, i_ii)              \
   V(I32AtomicXor16S, 0xe621, i_ii)             \
   V(I32AtomicXor16U, 0xe622, i_ii)             \
   V(I32AtomicXor, 0xe623, i_ii)
 
 // All opcodes.
-#define FOREACH_OPCODE(V)          \
-  FOREACH_CONTROL_OPCODE(V)        \
-  FOREACH_MISC_OPCODE(V)           \
-  FOREACH_SIMPLE_OPCODE(V)         \
-  FOREACH_STORE_MEM_OPCODE(V)      \
-  FOREACH_LOAD_MEM_OPCODE(V)       \
-  FOREACH_MISC_MEM_OPCODE(V)       \
-  FOREACH_ASMJS_COMPAT_OPCODE(V)   \
-  FOREACH_SIMD_0_OPERAND_OPCODE(V) \
-  FOREACH_SIMD_1_OPERAND_OPCODE(V) \
+#define FOREACH_OPCODE(V)             \
+  FOREACH_CONTROL_OPCODE(V)           \
+  FOREACH_MISC_OPCODE(V)              \
+  FOREACH_SIMPLE_OPCODE(V)            \
+  FOREACH_STORE_MEM_OPCODE(V)         \
+  FOREACH_LOAD_MEM_OPCODE(V)          \
+  FOREACH_MISC_MEM_OPCODE(V)          \
+  FOREACH_ASMJS_COMPAT_OPCODE(V)      \
+  FOREACH_SIMD_0_OPERAND_OPCODE(V)    \
+  FOREACH_SIMD_1_OPERAND_OPCODE(V)    \
+  FOREACH_SIMD_MASK_OPERAND_OPCODE(V) \
   FOREACH_ATOMIC_OPCODE(V)
 
 // All signatures.
 #define FOREACH_SIGNATURE(V)            \
   FOREACH_SIMD_SIGNATURE(V)             \
   V(i_ii, kWasmI32, kWasmI32, kWasmI32) \
   V(i_i, kWasmI32, kWasmI32)            \
   V(i_v, kWasmI32)                      \
   V(i_ff, kWasmI32, kWasmF32, kWasmF32) \
   V(i_f, kWasmI32, kWasmF32)            \
@@ skipping 224 matching lines @@
       default:
         return "<unknown>";
     }
   }
 };
 }  // namespace wasm
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_WASM_OPCODES_H_