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Issue 2799863002: [Atomics] use TFJ builtins for atomic add, sub, and, or, and xor (Closed)
Patch Set: [Atomics] use TFJ builtins for atomic add, sub, and, or, and xor Created 3 years, 8 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 690 matching lines...) Expand 10 before | Expand all | Expand 10 after
701 } 701 }
702 702
703 703
704 void Assembler::xchg(Register dst, const Operand& src) { 704 void Assembler::xchg(Register dst, const Operand& src) {
705 EnsureSpace ensure_space(this); 705 EnsureSpace ensure_space(this);
706 EMIT(0x87); 706 EMIT(0x87);
707 emit_operand(dst, src); 707 emit_operand(dst, src);
708 } 708 }
709 709
710 void Assembler::xchg_b(Register reg, const Operand& op) { 710 void Assembler::xchg_b(Register reg, const Operand& op) {
711 DCHECK(reg.is_byte_register());
711 EnsureSpace ensure_space(this); 712 EnsureSpace ensure_space(this);
712 EMIT(0x86); 713 EMIT(0x86);
713 emit_operand(reg, op); 714 emit_operand(reg, op);
714 } 715 }
715 716
716 void Assembler::xchg_w(Register reg, const Operand& op) { 717 void Assembler::xchg_w(Register reg, const Operand& op) {
717 EnsureSpace ensure_space(this); 718 EnsureSpace ensure_space(this);
718 EMIT(0x66); 719 EMIT(0x66);
719 EMIT(0x87); 720 EMIT(0x87);
720 emit_operand(reg, op); 721 emit_operand(reg, op);
721 } 722 }
722 723
723 void Assembler::lock() { 724 void Assembler::lock() {
724 EnsureSpace ensure_space(this); 725 EnsureSpace ensure_space(this);
725 EMIT(0xF0); 726 EMIT(0xF0);
726 } 727 }
727 728
728 void Assembler::cmpxchg(const Operand& dst, Register src) { 729 void Assembler::cmpxchg(const Operand& dst, Register src) {
729 EnsureSpace ensure_space(this); 730 EnsureSpace ensure_space(this);
730 EMIT(0x0F); 731 EMIT(0x0F);
731 EMIT(0xB1); 732 EMIT(0xB1);
732 emit_operand(src, dst); 733 emit_operand(src, dst);
733 } 734 }
734 735
735 void Assembler::cmpxchg_b(const Operand& dst, Register src) { 736 void Assembler::cmpxchg_b(const Operand& dst, Register src) {
737 DCHECK(src.is_byte_register());
736 EnsureSpace ensure_space(this); 738 EnsureSpace ensure_space(this);
737 EMIT(0x0F); 739 EMIT(0x0F);
738 EMIT(0xB0); 740 EMIT(0xB0);
739 emit_operand(src, dst); 741 emit_operand(src, dst);
740 } 742 }
741 743
742 void Assembler::cmpxchg_w(const Operand& dst, Register src) { 744 void Assembler::cmpxchg_w(const Operand& dst, Register src) {
743 EnsureSpace ensure_space(this); 745 EnsureSpace ensure_space(this);
744 EMIT(0x66); 746 EMIT(0x66);
745 EMIT(0x0F); 747 EMIT(0x0F);
(...skipping 2372 matching lines...) Expand 10 before | Expand all | Expand 10 after
3118 } 3120 }
3119 RelocInfo rinfo(pc_, rmode, data, NULL); 3121 RelocInfo rinfo(pc_, rmode, data, NULL);
3120 reloc_info_writer.Write(&rinfo); 3122 reloc_info_writer.Write(&rinfo);
3121 } 3123 }
3122 3124
3123 3125
3124 } // namespace internal 3126 } // namespace internal
3125 } // namespace v8 3127 } // namespace v8
3126 3128
3127 #endif // V8_TARGET_ARCH_IA32 3129 #endif // V8_TARGET_ARCH_IA32
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